804ba0d6aa73399a91c10624037d591a5ca7519d
[openwrt/openwrt.git] / target / linux / mvebu / files / arch / arm / boot / dts / armada-385-linksys-rango.dts
1 /*
2 * Device Tree file for the Linksys WRT3200ACM (Rango)
3 *
4 * Copyright (C) 2016 Imre Kaloz <kaloz@openwrt.org>
5 *
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without
14 * any warranty of any kind, whether express or implied.
15 *
16 * Or, alternatively,
17 *
18 * b) Permission is hereby granted, free of charge, to any person
19 * obtaining a copy of this software and associated documentation
20 * files (the "Software"), to deal in the Software without
21 * restriction, including without limitation the rights to use,
22 * copy, modify, merge, publish, distribute, sublicense, and/or
23 * sell copies of the Software, and to permit persons to whom the
24 * Software is furnished to do so, subject to the following
25 * conditions:
26 *
27 * The above copyright notice and this permission notice shall be
28 * included in all copies or substantial portions of the Software.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
31 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
32 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
33 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
34 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
35 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
36 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
37 * OTHER DEALINGS IN THE SOFTWARE.
38 */
39
40 /dts-v1/;
41 #include <dt-bindings/gpio/gpio.h>
42 #include <dt-bindings/input/input.h>
43 #include "armada-385.dtsi"
44
45 / {
46 model = "Linksys WRT3200ACM";
47 compatible = "linksys,rango", "linksys,armada385", "marvell,armada385",
48 "marvell,armada380";
49
50 chosen {
51 stdout-path = "serial0:115200n8";
52 };
53
54 memory {
55 device_type = "memory";
56 reg = <0x00000000 0x20000000>; /* 512 MB */
57 };
58
59 soc {
60 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
61 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
62 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
63 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
64 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
65
66 internal-regs {
67
68 spi@10600 {
69 status = "disabled";
70 };
71
72 i2c@11000 {
73 pinctrl-names = "default";
74 pinctrl-0 = <&i2c0_pins>;
75 status = "okay";
76
77 tmp421@4c {
78 compatible = "ti,tmp421";
79 reg = <0x4c>;
80 };
81
82 pca9635@68 {
83 #address-cells = <1>;
84 #size-cells = <0>;
85 compatible = "nxp,pca9635";
86 reg = <0x68>;
87
88 wan_amber@0 {
89 label = "rango:amber:wan";
90 reg = <0x0>;
91 };
92
93 wan_white@1 {
94 label = "rango:white:wan";
95 reg = <0x1>;
96 };
97
98 usb2@5 {
99 label = "rango:white:usb2";
100 reg = <0x5>;
101 };
102
103 usb3_1@6 {
104 label = "rango:white:usb3_1";
105 reg = <0x6>;
106 };
107
108 usb3_2@7 {
109 label = "rango:white:usb3_2";
110 reg = <0x7>;
111 };
112
113 wps_white@8 {
114 label = "rango:white:wps";
115 reg = <0x8>;
116 };
117
118 wps_amber@9 {
119 label = "rango:amber:wps";
120 reg = <0x9>;
121 };
122 };
123 };
124
125 /* J10: VCC, NC, RX, NC, TX, GND */
126 serial@12000 {
127 status = "okay";
128 };
129
130 ethernet@70000 {
131 status = "okay";
132 phy-mode = "rgmii-id";
133 buffer-manager = <&bm>;
134 bm,pool-long = <0>;
135 bm,pool-short = <3>;
136 fixed-link {
137 speed = <1000>;
138 full-duplex;
139 };
140 };
141
142 ethernet@34000 {
143 status = "okay";
144 phy-mode = "sgmii";
145 buffer-manager = <&bm>;
146 bm,pool-long = <2>;
147 bm,pool-short = <3>;
148 fixed-link {
149 speed = <1000>;
150 full-duplex;
151 };
152 };
153
154 mdio {
155 status = "okay";
156 };
157
158 bm@c8000 {
159 status = "okay";
160 };
161
162 sata@a8000 {
163 status = "okay";
164 };
165
166 /* USB part of the eSATA/USB 2.0 port */
167 usb@58000 {
168 status = "okay";
169 };
170
171 usb3@f8000 {
172 status = "okay";
173 usb-phy = <&usb3_phy>;
174 };
175
176 flash@d0000 {
177 status = "okay";
178 num-cs = <1>;
179 marvell,nand-keep-config;
180 marvell,nand-enable-arbiter;
181 nand-on-flash-bbt;
182
183 partition@0 {
184 label = "u-boot";
185 reg = <0x0000000 0x200000>; /* 2MB */
186 read-only;
187 };
188
189 partition@200000 {
190 label = "u_env";
191 reg = <0x200000 0x20000>; /* 128KB */
192 };
193
194 partition@220000 {
195 label = "s_env";
196 reg = <0x220000 0x40000>; /* 256KB */
197 };
198
199 partition@7e0000 {
200 label = "devinfo";
201 reg = <0x7e0000 0x40000>; /* 256KB */
202 read-only;
203 };
204
205 partition@820000 {
206 label = "sysdiag";
207 reg = <0x820000 0x1e0000>; /* 1920KB */
208 read-only;
209 };
210
211 /* kernel1 overlaps with rootfs1 by design */
212 partition@a00000 {
213 label = "kernel1";
214 reg = <0xa00000 0x5000000>; /* 80MB */
215 };
216
217 partition@1000000 {
218 label = "rootfs1";
219 reg = <0x1000000 0x4a00000>; /* 74MB */
220 };
221
222 /* kernel2 overlaps with rootfs2 by design */
223 partition@5a00000 {
224 label = "kernel2";
225 reg = <0x5a00000 0x5000000>; /* 80MB */
226 };
227
228 partition@6000000 {
229 label = "rootfs2";
230 reg = <0x6000000 0x4a00000>; /* 74MB */
231 };
232
233 /*
234 * 86MB, last MB is for the BBT, not writable
235 */
236 partition@aa00000 {
237 label = "syscfg";
238 reg = <0xaa00000 0x5600000>;
239 };
240
241 /*
242 * Unused area between "s_env" and "devinfo".
243 * Moved here because otherwise the renumbered
244 * partitions would break the bootloader
245 * supplied bootargs
246 */
247 partition@180000 {
248 label = "unused_area";
249 reg = <0x260000 0x5c0000>; /* 5.75MB */
250 };
251 };
252 };
253
254 bm-bppi {
255 status = "okay";
256 };
257
258 pcie-controller {
259 status = "okay";
260
261 pcie@1,0 {
262 /* Marvell 88W8964, 5GHz-only */
263 status = "okay";
264
265 mwlwifi {
266 marvell,2ghz = <0>;
267 marvell,chainmask = <4 4>;
268 };
269
270 };
271
272 pcie@2,0 {
273 /* Marvell 88W8964, 2GHz-only */
274 status = "okay";
275
276 mwlwifi {
277 marvell,5ghz = <0>;
278 marvell,chainmask = <4 4>;
279 };
280
281 };
282 };
283 };
284
285 usb3_phy: usb3_phy {
286 compatible = "usb-nop-xceiv";
287 vcc-supply = <&reg_xhci0_vbus>;
288 };
289
290 reg_xhci0_vbus: xhci0-vbus {
291 compatible = "regulator-fixed";
292 pinctrl-names = "default";
293 pinctrl-0 = <&xhci0_vbus_pins>;
294 regulator-name = "xhci0-vbus";
295 regulator-min-microvolt = <5000000>;
296 regulator-max-microvolt = <5000000>;
297 enable-active-high;
298 gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
299 };
300
301 gpio_keys {
302 compatible = "gpio-keys";
303 #address-cells = <1>;
304 #size-cells = <0>;
305 pinctrl-0 = <&reset_key_pin &wps_key_pin>;
306 pinctrl-names = "default";
307
308 button@1 {
309 label = "WPS";
310 linux,code = <KEY_WPS_BUTTON>;
311 gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
312 };
313
314 button@2 {
315 label = "Factory Reset Button";
316 linux,code = <KEY_RESTART>;
317 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
318 };
319 };
320
321 gpio-leds {
322 compatible = "gpio-leds";
323 pinctrl-0 = <&power_led_pin &sata_led_pin &wlan_2g_led_pin &wlan_5g_led_pin>;
324 pinctrl-names = "default";
325
326 sata {
327 label = "rango:white:sata";
328 gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
329 };
330
331 wlan_2g {
332 label = "rango:white:wlan_2g";
333 gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
334 };
335
336 wlan_5g {
337 label = "rango:white:wlan_5g";
338 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
339 };
340
341 power {
342 label = "rango:white:power";
343 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
344 default-state = "on";
345 };
346 };
347
348 dsa@0 {
349 compatible = "marvell,dsa";
350 #address-cells = <2>;
351 #size-cells = <0>;
352
353 dsa,ethernet = <&eth2>;
354 dsa,mii-bus = <&mdio>;
355
356 switch@0 {
357 #address-cells = <1>;
358 #size-cells = <0>;
359 reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
360
361 port@0 {
362 reg = <0>;
363 label = "lan4";
364 };
365
366 port@1 {
367 reg = <1>;
368 label = "lan3";
369 };
370
371 port@2 {
372 reg = <2>;
373 label = "lan2";
374 };
375
376 port@3 {
377 reg = <3>;
378 label = "lan1";
379 };
380
381 port@4 {
382 reg = <4>;
383 label = "wan";
384 };
385
386 port@5 {
387 reg = <5>;
388 label = "cpu";
389 };
390 };
391 };
392
393 mvsw61xx {
394 #address-cells = <1>;
395 #size-cells = <0>;
396 compatible = "marvell,88e6352";
397 status = "okay";
398 reg = <0x10>;
399
400 mii-bus = <&mdio>;
401 cpu-port-0 = <5>;
402 cpu-port-1 = <6>;
403 };
404
405 };
406
407 &pinctrl {
408 sata_led_pin: sata-led-pin {
409 marvell,pins = "mpp21";
410 marvell,function = "gpio";
411 };
412
413 wps_key_pin: wps-key-pin {
414 marvell,pins = "mpp24";
415 marvell,function = "gpio";
416 };
417
418 reset_key_pin: reset-key-pin {
419 marvell,pins = "mpp29";
420 marvell,function = "gpio";
421 };
422
423 wlan_2g_led_pin: wlan-2g-led-pin {
424 marvell,pins = "mpp45";
425 marvell,function = "gpio";
426 };
427
428 wlan_5g_led_pin: wlan-5g-led-pin {
429 marvell,pins = "mpp46";
430 marvell,function = "gpio";
431 };
432
433 xhci0_vbus_pins: xhci0-vbus-pins {
434 marvell,pins = "mpp47";
435 marvell,function = "gpio";
436 };
437
438 power_led_pin: power-led-pin {
439 marvell,pins = "mpp56";
440 marvell,function = "gpio";
441 };
442 };