preliminary support for the WRT1900AC (work in progress)
[openwrt/openwrt.git] / target / linux / mvebu / files / arch / arm / boot / dts / armada-xp-mamba.dts
1 /*
2 * Device Tree file for the Linksys WRT1900AC (Mamba).
3 *
4 * Note: this board is shipped with a new generation boot loader that
5 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
6 * is used, the CONFIG_DEBUG_MVEBU_UART_ALTERNATE option should be
7 * used.
8 *
9 * Copyright (C) 2013 Marvell
10 *
11 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 *
13 * This file is licensed under the terms of the GNU General Public
14 * License version 2. This program is licensed "as is" without any
15 * warranty of any kind, whether express or implied.
16 */
17
18 /dts-v1/;
19 #include "armada-xp-mv78230.dtsi"
20
21 / {
22 model = "Linksys WRT1900AC (Mamba)";
23 compatible = "linksys,mamba", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
24
25 chosen {
26 bootargs = "console=ttyS0,115200 earlyprintk";
27 };
28
29 memory {
30 device_type = "memory";
31 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
32 };
33
34 soc {
35 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
36 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
37
38 pcie-controller {
39 status = "okay";
40
41 /* Etron EJ168 USB 3.0 controller */
42 pcie@1,0 {
43 /* Port 0, Lane 0 */
44 status = "okay";
45 };
46
47 /* First mini-PCIe port */
48 pcie@2,0 {
49 /* Port 0, Lane 1 */
50 status = "okay";
51 };
52
53 /* Second mini-PCIe port */
54 pcie@3,0 {
55 /* Port 0, Lane 3 */
56 status = "okay";
57 };
58 };
59
60 internal-regs {
61 pinctrl {
62 pinctrl-0 = <&pmx_phy_int>;
63 pinctrl-names = "default";
64
65 pmx_ge0: pmx-ge0 {
66 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
67 "mpp4", "mpp5", "mpp6", "mpp7",
68 "mpp8", "mpp9", "mpp10", "mpp11";
69 marvell,function = "ge0";
70 };
71
72 pmx_ge1: pmx-ge1 {
73 marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15",
74 "mpp16", "mpp17", "mpp18", "mpp19",
75 "mpp20", "mpp21", "mpp22", "mpp23";
76 marvell,function = "ge1";
77 };
78
79 pmx_keys: pmx-keys {
80 marvell,pins = "mpp33";
81 marvell,function = "gpio";
82 };
83
84 pmx_spi: pmx-spi {
85 marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39";
86 marvell,function = "spi";
87 };
88
89 pmx_phy_int: pmx-phy-int {
90 marvell,pins = "mpp32";
91 marvell,function = "gpio";
92 };
93 };
94
95 serial@12000 {
96 clock-frequency = <250000000>;
97 status = "okay";
98 };
99
100 serial@12100 {
101 clock-frequency = <250000000>;
102 status = "okay";
103 };
104
105 sata@a0000 {
106 nr-ports = <1>;
107 status = "okay";
108 };
109
110 mdio {
111 disabled;
112 };
113
114 ethernet@70000 {
115 pinctrl-0 = <&pmx_ge0>;
116 pinctrl-names = "default";
117 status = "okay";
118 phy-mode = "rgmii-id";
119 fixed-link {
120 speed = <1000>;
121 full-duplex;
122 };
123 };
124
125 ethernet@74000 {
126 pinctrl-0 = <&pmx_ge1>;
127 pinctrl-names = "default";
128 status = "okay";
129 phy-mode = "rgmii-id";
130 fixed-link {
131 speed = <1000>;
132 full-duplex;
133 };
134 };
135
136 /* USB part of the eSATA/USB 2.0 port */
137 usb@50000 {
138 status = "okay";
139 };
140
141 i2c@11000 {
142 status = "okay";
143 clock-frequency = <100000>;
144
145 tlc59116@68 {
146 #gpio-cells = <2>;
147 compatible = "gpio,tlc59116";
148 reg = <0x68>;
149 gpio-controller;
150 };
151 };
152
153 nand@d0000 {
154 status = "okay";
155 num-cs = <1>;
156 marvell,nand-keep-config;
157 marvell,nand-enable-arbiter;
158 nand-on-flash-bbt;
159 nand-ecc-strength = <4>;
160 nand-ecc-step-size = <512>;
161
162
163 partition@0 {
164 label = "u-boot";
165 reg = <0x0000000 0x100000>; /* 1MB */
166 read-only;
167 };
168
169 partition@100000 {
170 label = "u_env"; //u-boot-env?
171 reg = <0x100000 0x40000>; /* 256KB */
172 read-only;
173 };
174
175 partition@140000 {
176 label = "s_env";
177 reg = <0x140000 0x40000>; /* 256KB */
178 read-only;
179 };
180
181 partition@900000 {
182 label = "devinfo";
183 reg = <0x900000 0x100000>; /* 1MB */
184 };
185
186 partition@a00000 {
187 label = "kernel";
188 reg = <0xa00000 0x2800000>; /* 40MB */
189 };
190
191 partition@d00000 {
192 label = "rootfs";
193 reg = <0xd00000 0x2500000>; /* 37MB */
194 };
195
196 partition@3200000 {
197 label = "alt_kernel";
198 reg = <0x3200000 0x2800000>; /* 40MB */
199 };
200
201 partition@3500000 {
202 label = "alt_rootfs";
203 reg = <0x3500000 0x2500000>; /* 37MB */
204 };
205
206 /* Last MB is for the BBT, i.e. not writable */
207 partition@5a00000 {
208 label = "syscfg";
209 reg = <0x5a00000 0x2600000>; /* ?MB */
210 };
211 };
212
213 spi0: spi@10600 {
214 status = "okay";
215 pinctrl-0 = <&pmx_spi>;
216 pinctrl-names = "default";
217
218 spi-flash@0 {
219 #address-cells = <1>;
220 #size-cells = <1>;
221 compatible = "mr25h256";
222 reg = <0>; /* Chip select 0 */
223 spi-max-frequency = <108000000>;
224 };
225 };
226 };
227 };
228
229 gpio_keys {
230 compatible = "gpio-keys";
231 #address-cells = <1>;
232 #size-cells = <0>;
233 pinctrl-0 = <&pmx_keys>;
234 pinctrl-names = "default";
235
236 button@1 {
237 label = "Factory Reset Button";
238 linux,code = <141>; /* KEY_SETUP */
239 gpios = <&gpio1 1 1>;
240 };
241 };
242 };