mvebu: refresh patches
[openwrt/openwrt.git] / target / linux / mvebu / patches-3.8 / 021-arm_mvebu_add_rd_a370_a1_dts.patch
1 From fcc7654b592cb80cfb33c509db1005ce9252192b Mon Sep 17 00:00:00 2001
2 From: Florian Fainelli <florian@openwrt.org>
3 Date: Wed, 9 Jan 2013 20:39:55 +0100
4 Subject: [PATCH] arm: mvebu: add DTS file for Marvell RD-A370-A1 board
5
6 This patch adds the DTS file to support the Marvell RD-A370-A1
7 (Reference Design board) also known as RD-88F6710 board. It is almost
8 entirely similar to the DB-A370 board except that the first Ethernet PHY
9 is SGMII-wired and the second is a switch which is RGMII-wired.
10
11 Signed-off-by: Florian Fainelli <florian@openwrt.org>
12 ---
13 arch/arm/boot/dts/Makefile | 1 +
14 arch/arm/boot/dts/armada-370-rd.dts | 61 +++++++++++++++++++++++++++++++++++
15 2 files changed, 62 insertions(+)
16 create mode 100644 arch/arm/boot/dts/armada-370-rd.dts
17
18 --- a/arch/arm/boot/dts/Makefile
19 +++ b/arch/arm/boot/dts/Makefile
20 @@ -77,6 +77,7 @@ dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.d
21 msm8960-cdp.dtb
22 dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
23 armada-370-mirabox.dtb \
24 + armada-370-rd.dtb \
25 armada-xp-db.dtb \
26 armada-xp-openblocks-ax3-4.dtb
27 dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \
28 --- /dev/null
29 +++ b/arch/arm/boot/dts/armada-370-rd.dts
30 @@ -0,0 +1,61 @@
31 +/*
32 + * Device Tree file for Marvell Armada 370 Reference Design board
33 + * (RD-88F6710-A1)
34 + *
35 + * Copied from arch/arm/boot/dts/armada-370-db.dts
36 + *
37 + * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
38 + *
39 + * This file is licensed under the terms of the GNU General Public
40 + * License version 2. This program is licensed "as is" without any
41 + * warranty of any kind, whether express or implied.
42 + */
43 +
44 +/dts-v1/;
45 +/include/ "armada-370.dtsi"
46 +
47 +/ {
48 + model = "Marvell Armada 370 Reference Design";
49 + compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp";
50 +
51 + chosen {
52 + bootargs = "console=ttyS0,115200 earlyprintk";
53 + };
54 +
55 + memory {
56 + device_type = "memory";
57 + reg = <0x00000000 0x20000000>; /* 512 MB */
58 + };
59 +
60 + soc {
61 + serial@d0012000 {
62 + clock-frequency = <200000000>;
63 + status = "okay";
64 + };
65 + sata@d00a0000 {
66 + nr-ports = <2>;
67 + status = "okay";
68 + };
69 +
70 + mdio {
71 + phy0: ethernet-phy@0 {
72 + reg = <0>;
73 + };
74 +
75 + phy1: ethernet-phy@1 {
76 + reg = <1>;
77 + };
78 + };
79 +
80 + ethernet@d0070000 {
81 + status = "okay";
82 + phy = <&phy0>;
83 + phy-mode = "sgmii";
84 + };
85 + ethernet@d0074000 {
86 + status = "okay";
87 + phy = <&phy1>;
88 + phy-mode = "rgmii-id";
89 + };
90 + };
91 +};