mvebu: fix portability issues in the image makefile code
[openwrt/openwrt.git] / target / linux / mvebu / patches-4.1 / 204-mvebu_xp_add_pwm_properties_to_dtsi_files.patch
1 Add properties to the gpio nodes to allow them to be also used
2 as pwm lines.
3
4 Signed-off-by: Andrew Lunn <andrew@lunn.ch>
5 ---
6 arch/arm/boot/dts/armada-370.dtsi | 10 ++++++++--
7 arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
8 arch/arm/boot/dts/armada-xp-mv78260.dtsi | 8 ++++++--
9 arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
10 4 files changed, 30 insertions(+), 8 deletions(-)
11
12 --- a/arch/arm/boot/dts/armada-370.dtsi
13 +++ b/arch/arm/boot/dts/armada-370.dtsi
14 @@ -158,24 +158,30 @@
15
16 gpio0: gpio@18100 {
17 compatible = "marvell,orion-gpio";
18 - reg = <0x18100 0x40>;
19 + reg = <0x18100 0x40>, <0x181c0 0x08>;
20 + reg-names = "gpio", "pwm";
21 ngpios = <32>;
22 gpio-controller;
23 #gpio-cells = <2>;
24 + #pwm-cells = <2>;
25 interrupt-controller;
26 #interrupt-cells = <2>;
27 interrupts = <82>, <83>, <84>, <85>;
28 + clocks = <&coreclk 0>;
29 };
30
31 gpio1: gpio@18140 {
32 compatible = "marvell,orion-gpio";
33 - reg = <0x18140 0x40>;
34 + reg = <0x18140 0x40>, <0x181c8 0x08>;
35 + reg-names = "gpio", "pwm";
36 ngpios = <32>;
37 gpio-controller;
38 #gpio-cells = <2>;
39 + #pwm-cells = <2>;
40 interrupt-controller;
41 #interrupt-cells = <2>;
42 interrupts = <87>, <88>, <89>, <90>;
43 + clocks = <&coreclk 0>;
44 };
45
46 gpio2: gpio@18180 {
47 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
48 +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
49 @@ -203,24 +203,30 @@
50 internal-regs {
51 gpio0: gpio@18100 {
52 compatible = "marvell,orion-gpio";
53 - reg = <0x18100 0x40>;
54 + reg = <0x18100 0x40>, <0x181c0 0x08>;
55 + reg-names = "gpio", "pwm";
56 ngpios = <32>;
57 gpio-controller;
58 #gpio-cells = <2>;
59 + #pwm-cells = <2>;
60 interrupt-controller;
61 #interrupt-cells = <2>;
62 interrupts = <82>, <83>, <84>, <85>;
63 + clocks = <&coreclk 0>;
64 };
65
66 gpio1: gpio@18140 {
67 compatible = "marvell,orion-gpio";
68 - reg = <0x18140 0x40>;
69 + reg = <0x18140 0x40>, <0x181c8 0x08>;
70 + reg-names = "gpio", "pwm";
71 ngpios = <17>;
72 gpio-controller;
73 #gpio-cells = <2>;
74 + #pwm-cells = <2>;
75 interrupt-controller;
76 #interrupt-cells = <2>;
77 interrupts = <87>, <88>, <89>;
78 + clocks = <&coreclk 0>;
79 };
80 };
81 };
82 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
83 +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
84 @@ -286,24 +286,28 @@
85 internal-regs {
86 gpio0: gpio@18100 {
87 compatible = "marvell,orion-gpio";
88 - reg = <0x18100 0x40>;
89 + reg = <0x18100 0x40>, <0x181c0 0x08>;
90 + reg-names = "gpio", "pwm";
91 ngpios = <32>;
92 gpio-controller;
93 #gpio-cells = <2>;
94 + #pwm-cells = <2>;
95 interrupt-controller;
96 #interrupt-cells = <2>;
97 interrupts = <82>, <83>, <84>, <85>;
98 + clocks = <&coreclk 0>;
99 };
100
101 gpio1: gpio@18140 {
102 compatible = "marvell,orion-gpio";
103 - reg = <0x18140 0x40>;
104 + reg = <0x18140 0x40>, <0x181c8 0x08>;
105 ngpios = <32>;
106 gpio-controller;
107 #gpio-cells = <2>;
108 interrupt-controller;
109 #interrupt-cells = <2>;
110 interrupts = <87>, <88>, <89>, <90>;
111 + clocks = <&coreclk 0>;
112 };
113
114 gpio2: gpio@18180 {
115 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
116 +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
117 @@ -324,24 +324,30 @@
118 internal-regs {
119 gpio0: gpio@18100 {
120 compatible = "marvell,orion-gpio";
121 - reg = <0x18100 0x40>;
122 + reg = <0x18100 0x40>, <0x181c0 0x08>;
123 + reg-names = "gpio", "pwm";
124 ngpios = <32>;
125 gpio-controller;
126 #gpio-cells = <2>;
127 + #pwm-cells = <2>;
128 interrupt-controller;
129 #interrupt-cells = <2>;
130 interrupts = <82>, <83>, <84>, <85>;
131 + clocks = <&coreclk 0>;
132 };
133
134 gpio1: gpio@18140 {
135 compatible = "marvell,orion-gpio";
136 - reg = <0x18140 0x40>;
137 + reg = <0x18140 0x40>, <0x181c8 0x08>;
138 + reg-names = "gpio", "pwm";
139 ngpios = <32>;
140 gpio-controller;
141 #gpio-cells = <2>;
142 + #pwm-cells = <2>;
143 interrupt-controller;
144 #interrupt-cells = <2>;
145 interrupts = <87>, <88>, <89>, <90>;
146 + clocks = <&coreclk 0>;
147 };
148
149 gpio2: gpio@18180 {