kernel: bump 4.4 to 4.4.110
[openwrt/openwrt.git] / target / linux / mvebu / patches-4.4 / 040-net-mvneta-Modify-the-queue-related-fields-from-each.patch
1 From: Gregory CLEMENT <gregory.clement@free-electrons.com>
2 Date: Thu, 4 Feb 2016 22:09:27 +0100
3 Subject: [PATCH] net: mvneta: Modify the queue related fields from each cpu
4
5 In the MVNETA_INTR_* registers, the queues related fields are per cpu,
6 according to the datasheet (comment in [] are added by me):
7 "In a multi-CPU system, bits of RX[or TX] queues for which the access by
8 the reading[or writing] CPU is disabled are read as 0, and cannot be
9 cleared[or written]."
10
11 That means that each time we want to manipulate these bits we had to do
12 it on each cpu and not only on the current cpu.
13
14 Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
15 Signed-off-by: David S. Miller <davem@davemloft.net>
16 ---
17
18 --- a/drivers/net/ethernet/marvell/mvneta.c
19 +++ b/drivers/net/ethernet/marvell/mvneta.c
20 @@ -1040,6 +1040,43 @@ static void mvneta_set_autoneg(struct mv
21 }
22 }
23
24 +static void mvneta_percpu_unmask_interrupt(void *arg)
25 +{
26 + struct mvneta_port *pp = arg;
27 +
28 + /* All the queue are unmasked, but actually only the ones
29 + * mapped to this CPU will be unmasked
30 + */
31 + mvreg_write(pp, MVNETA_INTR_NEW_MASK,
32 + MVNETA_RX_INTR_MASK_ALL |
33 + MVNETA_TX_INTR_MASK_ALL |
34 + MVNETA_MISCINTR_INTR_MASK);
35 +}
36 +
37 +static void mvneta_percpu_mask_interrupt(void *arg)
38 +{
39 + struct mvneta_port *pp = arg;
40 +
41 + /* All the queue are masked, but actually only the ones
42 + * mapped to this CPU will be masked
43 + */
44 + mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
45 + mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
46 + mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
47 +}
48 +
49 +static void mvneta_percpu_clear_intr_cause(void *arg)
50 +{
51 + struct mvneta_port *pp = arg;
52 +
53 + /* All the queue are cleared, but actually only the ones
54 + * mapped to this CPU will be cleared
55 + */
56 + mvreg_write(pp, MVNETA_INTR_NEW_CAUSE, 0);
57 + mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
58 + mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0);
59 +}
60 +
61 /* This method sets defaults to the NETA port:
62 * Clears interrupt Cause and Mask registers.
63 * Clears all MAC tables.
64 @@ -1057,14 +1094,10 @@ static void mvneta_defaults_set(struct m
65 int max_cpu = num_present_cpus();
66
67 /* Clear all Cause registers */
68 - mvreg_write(pp, MVNETA_INTR_NEW_CAUSE, 0);
69 - mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0);
70 - mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
71 + on_each_cpu(mvneta_percpu_clear_intr_cause, pp, true);
72
73 /* Mask all interrupts */
74 - mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
75 - mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
76 - mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
77 + on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
78 mvreg_write(pp, MVNETA_INTR_ENABLE, 0);
79
80 /* Enable MBUS Retry bit16 */
81 @@ -2530,31 +2563,6 @@ static int mvneta_setup_txqs(struct mvne
82 return 0;
83 }
84
85 -static void mvneta_percpu_unmask_interrupt(void *arg)
86 -{
87 - struct mvneta_port *pp = arg;
88 -
89 - /* All the queue are unmasked, but actually only the ones
90 - * maped to this CPU will be unmasked
91 - */
92 - mvreg_write(pp, MVNETA_INTR_NEW_MASK,
93 - MVNETA_RX_INTR_MASK_ALL |
94 - MVNETA_TX_INTR_MASK_ALL |
95 - MVNETA_MISCINTR_INTR_MASK);
96 -}
97 -
98 -static void mvneta_percpu_mask_interrupt(void *arg)
99 -{
100 - struct mvneta_port *pp = arg;
101 -
102 - /* All the queue are masked, but actually only the ones
103 - * maped to this CPU will be masked
104 - */
105 - mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
106 - mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
107 - mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
108 -}
109 -
110 static void mvneta_start_dev(struct mvneta_port *pp)
111 {
112 int cpu;
113 @@ -2605,13 +2613,10 @@ static void mvneta_stop_dev(struct mvnet
114 mvneta_port_disable(pp);
115
116 /* Clear all ethernet port interrupts */
117 - mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
118 - mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0);
119 + on_each_cpu(mvneta_percpu_clear_intr_cause, pp, true);
120
121 /* Mask all ethernet port interrupts */
122 - mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
123 - mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
124 - mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
125 + on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
126
127 mvneta_tx_reset(pp);
128 mvneta_rx_reset(pp);
129 @@ -2923,9 +2928,7 @@ static int mvneta_percpu_notifier(struct
130 }
131
132 /* Mask all ethernet port interrupts */
133 - mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
134 - mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
135 - mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
136 + on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
137 napi_enable(&port->napi);
138
139
140 @@ -2940,14 +2943,8 @@ static int mvneta_percpu_notifier(struct
141 */
142 mvneta_percpu_elect(pp);
143
144 - /* Unmask all ethernet port interrupts, as this
145 - * notifier is called for each CPU then the CPU to
146 - * Queue mapping is applied
147 - */
148 - mvreg_write(pp, MVNETA_INTR_NEW_MASK,
149 - MVNETA_RX_INTR_MASK(rxq_number) |
150 - MVNETA_TX_INTR_MASK(txq_number) |
151 - MVNETA_MISCINTR_INTR_MASK);
152 + /* Unmask all ethernet port interrupts */
153 + on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true);
154 mvreg_write(pp, MVNETA_INTR_MISC_MASK,
155 MVNETA_CAUSE_PHY_STATUS_CHANGE |
156 MVNETA_CAUSE_LINK_CHANGE |
157 @@ -2958,9 +2955,7 @@ static int mvneta_percpu_notifier(struct
158 case CPU_DOWN_PREPARE_FROZEN:
159 netif_tx_stop_all_queues(pp->dev);
160 /* Mask all ethernet port interrupts */
161 - mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
162 - mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
163 - mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
164 + on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
165
166 napi_synchronize(&port->napi);
167 napi_disable(&port->napi);
168 @@ -2976,10 +2971,7 @@ static int mvneta_percpu_notifier(struct
169 /* Check if a new CPU must be elected now this on is down */
170 mvneta_percpu_elect(pp);
171 /* Unmask all ethernet port interrupts */
172 - mvreg_write(pp, MVNETA_INTR_NEW_MASK,
173 - MVNETA_RX_INTR_MASK(rxq_number) |
174 - MVNETA_TX_INTR_MASK(txq_number) |
175 - MVNETA_MISCINTR_INTR_MASK);
176 + on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true);
177 mvreg_write(pp, MVNETA_INTR_MISC_MASK,
178 MVNETA_CAUSE_PHY_STATUS_CHANGE |
179 MVNETA_CAUSE_LINK_CHANGE |