mvebu: backport upstream ethernet driver improvements and enable buffer manager support
[openwrt/openwrt.git] / target / linux / mvebu / patches-4.4 / 052-ARM-dts-armada-xp-add-buffer-manager-nodes.patch
1 From: Marcin Wojtas <mw@semihalf.com>
2 Date: Mon, 14 Mar 2016 09:38:59 +0100
3 Subject: [PATCH] ARM: dts: armada-xp: add buffer manager nodes
4
5 Armada XP network controller supports hardware buffer management (BM).
6 Since it is now enabled in mvneta driver, appropriate nodes can be added
7 to armada-xp.dtsi - for the actual common BM unit (bm@c0000) and its
8 internal SRAM (bm-bppi), which is used for indirect access to buffer
9 pointer ring residing in DRAM.
10
11 Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
12 parameters are supposed to be set in board files.
13
14 Signed-off-by: Marcin Wojtas <mw@semihalf.com>
15 Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
16 Signed-off-by: David S. Miller <davem@davemloft.net>
17 ---
18
19 --- a/arch/arm/boot/dts/armada-xp.dtsi
20 +++ b/arch/arm/boot/dts/armada-xp.dtsi
21 @@ -253,6 +253,14 @@
22 marvell,crypto-sram-size = <0x800>;
23 };
24
25 + bm: bm@c0000 {
26 + compatible = "marvell,armada-380-neta-bm";
27 + reg = <0xc0000 0xac>;
28 + clocks = <&gateclk 13>;
29 + internal-mem = <&bm_bppi>;
30 + status = "disabled";
31 + };
32 +
33 xor@f0900 {
34 compatible = "marvell,orion-xor";
35 reg = <0xF0900 0x100
36 @@ -291,6 +299,17 @@
37 #size-cells = <1>;
38 ranges = <0 MBUS_ID(0x09, 0x05) 0 0x800>;
39 };
40 +
41 + bm_bppi: bm-bppi {
42 + compatible = "mmio-sram";
43 + reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>;
44 + ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>;
45 + #address-cells = <1>;
46 + #size-cells = <1>;
47 + clocks = <&gateclk 13>;
48 + no-memory-wc;
49 + status = "disabled";
50 + };
51 };
52
53 clocks {