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[openwrt/openwrt.git] / target / linux / mvebu / patches-4.4 / 120-phy-move-fixed_phy-MII-register-generation-to-a-libr.patch
1 From 4d5621372f6e7ddbfd5879602f82073987bcc722 Mon Sep 17 00:00:00 2001
2 From: Russell King <rmk+kernel@arm.linux.org.uk>
3 Date: Sun, 20 Sep 2015 09:57:10 +0100
4 Subject: [PATCH 709/744] phy: move fixed_phy MII register generation to a
5 library
6
7 Move the fixed_phy MII register generation to a library to allow other
8 software phy implementations to use this code.
9
10 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
11 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
12 ---
13 drivers/net/phy/Kconfig | 4 ++
14 drivers/net/phy/Makefile | 3 +-
15 drivers/net/phy/fixed_phy.c | 95 ++-------------------------------
16 drivers/net/phy/swphy.c | 126 ++++++++++++++++++++++++++++++++++++++++++++
17 drivers/net/phy/swphy.h | 8 +++
18 5 files changed, 143 insertions(+), 93 deletions(-)
19 create mode 100644 drivers/net/phy/swphy.c
20 create mode 100644 drivers/net/phy/swphy.h
21
22 --- a/drivers/net/phy/Kconfig
23 +++ b/drivers/net/phy/Kconfig
24 @@ -26,6 +26,9 @@ config SWCONFIG_LEDS
25 bool "Switch LED trigger support"
26 depends on (SWCONFIG && LEDS_TRIGGERS)
27
28 +config SWPHY
29 + bool
30 +
31 comment "MII PHY device drivers"
32
33 config AQUANTIA_PHY
34 @@ -210,6 +213,7 @@ config RTL8306_PHY
35 config FIXED_PHY
36 tristate "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs"
37 depends on PHYLIB
38 + select SWPHY
39 ---help---
40 Adds the platform "fixed" MDIO Bus to cover the boards that use
41 PHYs that are not connected to the real MDIO bus.
42 --- a/drivers/net/phy/Makefile
43 +++ b/drivers/net/phy/Makefile
44 @@ -1,6 +1,7 @@
45 # Makefile for Linux PHY drivers
46
47 -libphy-objs := phy.o phy_device.o mdio_bus.o
48 +libphy-y := phy.o phy_device.o mdio_bus.o
49 +libphy-$(CONFIG_SWPHY) += swphy.o
50
51 obj-$(CONFIG_MDIO_BOARDINFO) += mdio-boardinfo.o
52
53 --- a/drivers/net/phy/fixed_phy.c
54 +++ b/drivers/net/phy/fixed_phy.c
55 @@ -24,6 +24,8 @@
56 #include <linux/of.h>
57 #include <linux/gpio.h>
58
59 +#include "swphy.h"
60 +
61 #define MII_REGS_NUM 29
62
63 struct fixed_mdio_bus {
64 @@ -49,101 +51,10 @@ static struct fixed_mdio_bus platform_fm
65
66 static int fixed_phy_update_regs(struct fixed_phy *fp)
67 {
68 - u16 bmsr = BMSR_ANEGCAPABLE;
69 - u16 bmcr = 0;
70 - u16 lpagb = 0;
71 - u16 lpa = 0;
72 -
73 if (gpio_is_valid(fp->link_gpio))
74 fp->status.link = !!gpio_get_value_cansleep(fp->link_gpio);
75
76 - if (fp->status.duplex) {
77 - switch (fp->status.speed) {
78 - case 1000:
79 - bmsr |= BMSR_ESTATEN;
80 - break;
81 - case 100:
82 - bmsr |= BMSR_100FULL;
83 - break;
84 - case 10:
85 - bmsr |= BMSR_10FULL;
86 - break;
87 - default:
88 - break;
89 - }
90 - } else {
91 - switch (fp->status.speed) {
92 - case 1000:
93 - bmsr |= BMSR_ESTATEN;
94 - break;
95 - case 100:
96 - bmsr |= BMSR_100HALF;
97 - break;
98 - case 10:
99 - bmsr |= BMSR_10HALF;
100 - break;
101 - default:
102 - break;
103 - }
104 - }
105 -
106 - if (fp->status.link) {
107 - bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE;
108 -
109 - if (fp->status.duplex) {
110 - bmcr |= BMCR_FULLDPLX;
111 -
112 - switch (fp->status.speed) {
113 - case 1000:
114 - bmcr |= BMCR_SPEED1000;
115 - lpagb |= LPA_1000FULL;
116 - break;
117 - case 100:
118 - bmcr |= BMCR_SPEED100;
119 - lpa |= LPA_100FULL;
120 - break;
121 - case 10:
122 - lpa |= LPA_10FULL;
123 - break;
124 - default:
125 - pr_warn("fixed phy: unknown speed\n");
126 - return -EINVAL;
127 - }
128 - } else {
129 - switch (fp->status.speed) {
130 - case 1000:
131 - bmcr |= BMCR_SPEED1000;
132 - lpagb |= LPA_1000HALF;
133 - break;
134 - case 100:
135 - bmcr |= BMCR_SPEED100;
136 - lpa |= LPA_100HALF;
137 - break;
138 - case 10:
139 - lpa |= LPA_10HALF;
140 - break;
141 - default:
142 - pr_warn("fixed phy: unknown speed\n");
143 - return -EINVAL;
144 - }
145 - }
146 -
147 - if (fp->status.pause)
148 - lpa |= LPA_PAUSE_CAP;
149 -
150 - if (fp->status.asym_pause)
151 - lpa |= LPA_PAUSE_ASYM;
152 - }
153 -
154 - fp->regs[MII_PHYSID1] = 0;
155 - fp->regs[MII_PHYSID2] = 0;
156 -
157 - fp->regs[MII_BMSR] = bmsr;
158 - fp->regs[MII_BMCR] = bmcr;
159 - fp->regs[MII_LPA] = lpa;
160 - fp->regs[MII_STAT1000] = lpagb;
161 -
162 - return 0;
163 + return swphy_update_regs(fp->regs, &fp->status);
164 }
165
166 static int fixed_mdio_read(struct mii_bus *bus, int phy_addr, int reg_num)
167 --- /dev/null
168 +++ b/drivers/net/phy/swphy.c
169 @@ -0,0 +1,126 @@
170 +/*
171 + * Software PHY emulation
172 + *
173 + * Code taken from fixed_phy.c by Russell King <rmk+kernel@arm.linux.org.uk>
174 + *
175 + * Author: Vitaly Bordug <vbordug@ru.mvista.com>
176 + * Anton Vorontsov <avorontsov@ru.mvista.com>
177 + *
178 + * Copyright (c) 2006-2007 MontaVista Software, Inc.
179 + *
180 + * This program is free software; you can redistribute it and/or modify it
181 + * under the terms of the GNU General Public License as published by the
182 + * Free Software Foundation; either version 2 of the License, or (at your
183 + * option) any later version.
184 + */
185 +#include <linux/export.h>
186 +#include <linux/mii.h>
187 +#include <linux/phy.h>
188 +#include <linux/phy_fixed.h>
189 +
190 +#include "swphy.h"
191 +
192 +/**
193 + * swphy_update_regs - update MII register array with fixed phy state
194 + * @regs: array of 32 registers to update
195 + * @state: fixed phy status
196 + *
197 + * Update the array of MII registers with the fixed phy link, speed,
198 + * duplex and pause mode settings.
199 + */
200 +int swphy_update_regs(u16 *regs, const struct fixed_phy_status *state)
201 +{
202 + u16 bmsr = BMSR_ANEGCAPABLE;
203 + u16 bmcr = 0;
204 + u16 lpagb = 0;
205 + u16 lpa = 0;
206 +
207 + if (state->duplex) {
208 + switch (state->speed) {
209 + case 1000:
210 + bmsr |= BMSR_ESTATEN;
211 + break;
212 + case 100:
213 + bmsr |= BMSR_100FULL;
214 + break;
215 + case 10:
216 + bmsr |= BMSR_10FULL;
217 + break;
218 + default:
219 + break;
220 + }
221 + } else {
222 + switch (state->speed) {
223 + case 1000:
224 + bmsr |= BMSR_ESTATEN;
225 + break;
226 + case 100:
227 + bmsr |= BMSR_100HALF;
228 + break;
229 + case 10:
230 + bmsr |= BMSR_10HALF;
231 + break;
232 + default:
233 + break;
234 + }
235 + }
236 +
237 + if (state->link) {
238 + bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE;
239 +
240 + if (state->duplex) {
241 + bmcr |= BMCR_FULLDPLX;
242 +
243 + switch (state->speed) {
244 + case 1000:
245 + bmcr |= BMCR_SPEED1000;
246 + lpagb |= LPA_1000FULL;
247 + break;
248 + case 100:
249 + bmcr |= BMCR_SPEED100;
250 + lpa |= LPA_100FULL;
251 + break;
252 + case 10:
253 + lpa |= LPA_10FULL;
254 + break;
255 + default:
256 + pr_warn("swphy: unknown speed\n");
257 + return -EINVAL;
258 + }
259 + } else {
260 + switch (state->speed) {
261 + case 1000:
262 + bmcr |= BMCR_SPEED1000;
263 + lpagb |= LPA_1000HALF;
264 + break;
265 + case 100:
266 + bmcr |= BMCR_SPEED100;
267 + lpa |= LPA_100HALF;
268 + break;
269 + case 10:
270 + lpa |= LPA_10HALF;
271 + break;
272 + default:
273 + pr_warn("swphy: unknown speed\n");
274 + return -EINVAL;
275 + }
276 + }
277 +
278 + if (state->pause)
279 + lpa |= LPA_PAUSE_CAP;
280 +
281 + if (state->asym_pause)
282 + lpa |= LPA_PAUSE_ASYM;
283 + }
284 +
285 + regs[MII_PHYSID1] = 0;
286 + regs[MII_PHYSID2] = 0;
287 +
288 + regs[MII_BMSR] = bmsr;
289 + regs[MII_BMCR] = bmcr;
290 + regs[MII_LPA] = lpa;
291 + regs[MII_STAT1000] = lpagb;
292 +
293 + return 0;
294 +}
295 +EXPORT_SYMBOL_GPL(swphy_update_regs);
296 --- /dev/null
297 +++ b/drivers/net/phy/swphy.h
298 @@ -0,0 +1,8 @@
299 +#ifndef SWPHY_H
300 +#define SWPHY_H
301 +
302 +struct fixed_phy_status;
303 +
304 +int swphy_update_regs(u16 *regs, const struct fixed_phy_status *state);
305 +
306 +#endif