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mxs: rename files so that profiles are sorted alphabetically
[openwrt/openwrt.git] / target / linux / mxs / patches-3.12 / 100-soc-audio-support.patch
1 --- a/sound/soc/codecs/Kconfig
2 +++ b/sound/soc/codecs/Kconfig
3 @@ -125,6 +125,7 @@ config SND_SOC_ALL_CODECS
4 select SND_SOC_WM9705 if SND_SOC_AC97_BUS
5 select SND_SOC_WM9712 if SND_SOC_AC97_BUS
6 select SND_SOC_WM9713 if SND_SOC_AC97_BUS
7 + select SND_SOC_MXS_BUILTIN_CODEC
8 help
9 Normally ASoC codec drivers are only built if a machine driver which
10 uses them is also built since they are only usable with a machine
11 @@ -507,6 +508,9 @@ config SND_SOC_WM9712
12 config SND_SOC_WM9713
13 tristate
14
15 +config SND_SOC_MXS_BUILTIN_CODEC
16 + tristate
17 +
18 # Amp
19 config SND_SOC_LM4857
20 tristate
21 --- a/sound/soc/codecs/Makefile
22 +++ b/sound/soc/codecs/Makefile
23 @@ -118,6 +118,7 @@ snd-soc-wm9705-objs := wm9705.o
24 snd-soc-wm9712-objs := wm9712.o
25 snd-soc-wm9713-objs := wm9713.o
26 snd-soc-wm-hubs-objs := wm_hubs.o
27 +snd-soc-mxs-builtin-codec-objs := mxs-builtin-codec.o
28
29 # Amp
30 snd-soc-max9877-objs := max9877.o
31 @@ -242,6 +243,7 @@ obj-$(CONFIG_SND_SOC_WM9712) += snd-soc-
32 obj-$(CONFIG_SND_SOC_WM9713) += snd-soc-wm9713.o
33 obj-$(CONFIG_SND_SOC_WM_ADSP) += snd-soc-wm-adsp.o
34 obj-$(CONFIG_SND_SOC_WM_HUBS) += snd-soc-wm-hubs.o
35 +obj-$(CONFIG_SND_SOC_MXS_BUILTIN_CODEC) += snd-soc-mxs-builtin-codec.o
36
37 # Amp
38 obj-$(CONFIG_SND_SOC_MAX9877) += snd-soc-max9877.o
39 --- /dev/null
40 +++ b/sound/soc/codecs/mxs-builtin-codec.c
41 @@ -0,0 +1,1128 @@
42 +/*
43 + * mxs-builtin-codec.c -- i.MX233 built-in codec ALSA Soc Audio driver
44 + *
45 + * Author: Michal Ulianko <michal.ulianko@gmail.com>
46 + *
47 + * Based on sound/soc/codecs/mxs-adc-codec.c for kernel 2.6.35
48 + * by Vladislav Buzov <vbuzov@embeddedalley.com>
49 + *
50 + * This program is free software; you can redistribute it and/or modify
51 + * it under the terms of the GNU General Public License version 2 as
52 + * published by the Free Software Foundation.
53 + */
54 +
55 +#include <linux/clk.h>
56 +#include <linux/delay.h>
57 +#include <linux/module.h>
58 +#include <linux/platform_device.h>
59 +#include <sound/pcm.h>
60 +#include <sound/pcm_params.h>
61 +#include <sound/soc.h>
62 +
63 +#include "mxs-builtin-codec.h"
64 +
65 +#ifndef BF
66 +#define BF(value, field) (((value) << BP_##field) & BM_##field)
67 +#endif
68 +
69 +/* TODO Delete this and use BM_RTC_PERSISTENT0_RELEASE_GND from header file
70 + * if it works. */
71 +#define BP_RTC_PERSISTENT0_SPARE_ANALOG 18
72 +#define BM_RTC_PERSISTENT0_SPARE_ANALOG 0xFFFC0000
73 +#define BM_RTC_PERSISTENT0_RELEASE_GND BF(0x2, RTC_PERSISTENT0_SPARE_ANALOG)
74 +
75 +/* TODO Use codec IO function soc snd write etc, instead of __writel __readl */
76 +
77 +struct mxs_adc_priv {
78 + void __iomem *ain_base;
79 + void __iomem *aout_base;
80 + void __iomem *rtc_base;
81 + struct clk *clk;
82 +};
83 +
84 +static unsigned int mxs_regmap[] = {
85 + HW_AUDIOOUT_CTRL,
86 + HW_AUDIOOUT_STAT,
87 + HW_AUDIOOUT_DACSRR,
88 + HW_AUDIOOUT_DACVOLUME,
89 + HW_AUDIOOUT_DACDEBUG,
90 + HW_AUDIOOUT_HPVOL,
91 + HW_AUDIOOUT_PWRDN,
92 + HW_AUDIOOUT_REFCTRL,
93 + HW_AUDIOOUT_ANACTRL,
94 + HW_AUDIOOUT_TEST,
95 + HW_AUDIOOUT_BISTCTRL,
96 + HW_AUDIOOUT_BISTSTAT0,
97 + HW_AUDIOOUT_BISTSTAT1,
98 + HW_AUDIOOUT_ANACLKCTRL,
99 + HW_AUDIOOUT_DATA,
100 + HW_AUDIOOUT_SPEAKERCTRL,
101 + HW_AUDIOOUT_VERSION,
102 + HW_AUDIOIN_CTRL,
103 + HW_AUDIOIN_STAT,
104 + HW_AUDIOIN_ADCSRR,
105 + HW_AUDIOIN_ADCVOLUME,
106 + HW_AUDIOIN_ADCDEBUG,
107 + HW_AUDIOIN_ADCVOL,
108 + HW_AUDIOIN_MICLINE,
109 + HW_AUDIOIN_ANACLKCTRL,
110 + HW_AUDIOIN_DATA,
111 +};
112 +
113 +static void __iomem *mxs_getreg(struct mxs_adc_priv *mxs_adc, int i)
114 +{
115 + if (i <= 16)
116 + return mxs_adc->aout_base + mxs_regmap[i];
117 + else if (i < ADC_REGNUM)
118 + return mxs_adc->ain_base + mxs_regmap[i];
119 + else
120 + return NULL;
121 +}
122 +
123 +static u8 dac_volumn_control_word[] = {
124 + 0x37, 0x5e, 0x7e, 0x8e,
125 + 0x9e, 0xae, 0xb6, 0xbe,
126 + 0xc6, 0xce, 0xd6, 0xde,
127 + 0xe6, 0xee, 0xf6, 0xfe,
128 +};
129 +
130 +struct dac_srr {
131 + u32 rate;
132 + u32 basemult;
133 + u32 src_hold;
134 + u32 src_int;
135 + u32 src_frac;
136 +};
137 +
138 +static struct dac_srr srr_values[] = {
139 + {192000, 0x4, 0x0, 0x0F, 0x13FF},
140 + {176400, 0x4, 0x0, 0x11, 0x0037},
141 + {128000, 0x4, 0x0, 0x17, 0x0E00},
142 + {96000, 0x2, 0x0, 0x0F, 0x13FF},
143 + {88200, 0x2, 0x0, 0x11, 0x0037},
144 + {64000, 0x2, 0x0, 0x17, 0x0E00},
145 + {48000, 0x1, 0x0, 0x0F, 0x13FF},
146 + {44100, 0x1, 0x0, 0x11, 0x0037},
147 + {32000, 0x1, 0x0, 0x17, 0x0E00},
148 + {24000, 0x1, 0x1, 0x0F, 0x13FF},
149 + {22050, 0x1, 0x1, 0x11, 0x0037},
150 + {16000, 0x1, 0x1, 0x17, 0x0E00},
151 + {12000, 0x1, 0x3, 0x0F, 0x13FF},
152 + {11025, 0x1, 0x3, 0x11, 0x0037},
153 + {8000, 0x1, 0x3, 0x17, 0x0E00}
154 +};
155 +
156 +static inline int get_srr_values(int rate)
157 +{
158 + int i;
159 +
160 + for (i = 0; i < ARRAY_SIZE(srr_values); i++)
161 + if (srr_values[i].rate == rate)
162 + return i;
163 +
164 + return -1;
165 +}
166 +
167 +/* SoC IO functions */
168 +static void mxs_codec_write_cache(struct snd_soc_codec *codec, unsigned int reg, unsigned int value)
169 +{
170 + u16 *cache = codec->reg_cache;
171 + if (reg < ADC_REGNUM)
172 + cache[reg] = value;
173 +}
174 +
175 +static int mxs_codec_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int value)
176 +{
177 + struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec);
178 + unsigned int reg_val;
179 + unsigned int mask = 0xffff;
180 +
181 + if (reg >= ADC_REGNUM)
182 + return -EIO;
183 +
184 + mxs_codec_write_cache(codec, reg, value);
185 +
186 + if (reg & 0x1) {
187 + mask <<= 16;
188 + value <<= 16;
189 + }
190 +
191 + reg_val = __raw_readl(mxs_getreg(mxs_adc, reg >> 1));
192 + reg_val = (reg_val & ~mask) | value;
193 + __raw_writel(reg_val, mxs_getreg(mxs_adc, reg >> 1));
194 +
195 + return 0;
196 +}
197 +
198 +static unsigned int mxs_codec_read(struct snd_soc_codec *codec, unsigned int reg)
199 +{
200 + struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec);
201 + unsigned int reg_val;
202 +
203 + if (reg >= ADC_REGNUM)
204 + return -1;
205 +
206 + reg_val = __raw_readl(mxs_getreg(mxs_adc, reg >> 1));
207 + if (reg & 1)
208 + reg_val >>= 16;
209 +
210 + return reg_val & 0xffff;
211 +}
212 +
213 +// static unsigned int mxs_codec_read_cache(struct snd_soc_codec *codec, unsigned int reg)
214 +// {
215 +// u16 *cache = codec->reg_cache;
216 +// if (reg >= ADC_REGNUM)
217 +// return -EINVAL;
218 +// return cache[reg];
219 +// }
220 +
221 +static void mxs_codec_sync_reg_cache(struct snd_soc_codec *codec)
222 +{
223 + int reg;
224 + for (reg = 0; reg < ADC_REGNUM; reg += 1)
225 + mxs_codec_write_cache(codec, reg,
226 + mxs_codec_read(codec, reg));
227 +}
228 +
229 +// static int mxs_codec_restore_reg(struct snd_soc_codec *codec, unsigned int reg)
230 +// {
231 +// unsigned int cached_val, hw_val;
232 +//
233 +// cached_val = mxs_codec_read_cache(codec, reg);
234 +// hw_val = mxs_codec_read(codec, reg);
235 +//
236 +// if (hw_val != cached_val)
237 +// return mxs_codec_write(codec, reg, cached_val);
238 +//
239 +// return 0;
240 +// }
241 +/* END SoC IO functions */
242 +
243 +/* Codec routines */
244 +#define VAG_BASE_VALUE ((1400/2 - 625)/25)
245 +
246 +static void mxs_codec_dac_set_vag(struct mxs_adc_priv *mxs_adc)
247 +{
248 + u32 refctrl_val = __raw_readl(mxs_adc->aout_base + HW_AUDIOOUT_REFCTRL);
249 +
250 + refctrl_val &= ~(BM_AUDIOOUT_REFCTRL_VAG_VAL);
251 + refctrl_val &= ~(BM_AUDIOOUT_REFCTRL_VBG_ADJ);
252 + refctrl_val |= BF(VAG_BASE_VALUE, AUDIOOUT_REFCTRL_VAG_VAL) |
253 + BM_AUDIOOUT_REFCTRL_ADJ_VAG |
254 + BF(0xF, AUDIOOUT_REFCTRL_ADC_REFVAL) |
255 + BM_AUDIOOUT_REFCTRL_ADJ_ADC |
256 + BF(0x3, AUDIOOUT_REFCTRL_VBG_ADJ) | BM_AUDIOOUT_REFCTRL_RAISE_REF;
257 +
258 + __raw_writel(refctrl_val, mxs_adc->aout_base + HW_AUDIOOUT_REFCTRL);
259 +}
260 +
261 +static bool mxs_codec_dac_is_capless(struct mxs_adc_priv *mxs_adc)
262 +{
263 + if ((__raw_readl(mxs_adc->aout_base + HW_AUDIOOUT_PWRDN)
264 + & BM_AUDIOOUT_PWRDN_CAPLESS) == 0)
265 + return false;
266 + else
267 + return true;
268 +}
269 +
270 +static void mxs_codec_dac_arm_short_cm(struct mxs_adc_priv *mxs_adc, bool bShort)
271 +{
272 + __raw_writel(BF(3, AUDIOOUT_ANACTRL_SHORTMODE_CM),
273 + mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_CLR);
274 + __raw_writel(BM_AUDIOOUT_ANACTRL_SHORT_CM_STS,
275 + mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_CLR);
276 + if (bShort)
277 + __raw_writel(BF(1, AUDIOOUT_ANACTRL_SHORTMODE_CM),
278 + mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_SET);
279 +}
280 +
281 +static void mxs_codec_dac_arm_short_lr(struct mxs_adc_priv *mxs_adc, bool bShort)
282 +{
283 + __raw_writel(BF(3, AUDIOOUT_ANACTRL_SHORTMODE_LR),
284 + mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_CLR);
285 + __raw_writel(BM_AUDIOOUT_ANACTRL_SHORT_LR_STS,
286 + mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_CLR);
287 + if (bShort)
288 + __raw_writel(BF(1, AUDIOOUT_ANACTRL_SHORTMODE_LR),
289 + mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_SET);
290 +}
291 +
292 +static void mxs_codec_dac_set_short_trip_level(struct mxs_adc_priv *mxs_adc, u8 u8level)
293 +{
294 + __raw_writel(__raw_readl(mxs_adc->aout_base +
295 + HW_AUDIOOUT_ANACTRL)
296 + & (~BM_AUDIOOUT_ANACTRL_SHORT_LVLADJL)
297 + & (~BM_AUDIOOUT_ANACTRL_SHORT_LVLADJR)
298 + | BF(u8level, AUDIOOUT_ANACTRL_SHORT_LVLADJL)
299 + | BF(u8level, AUDIOOUT_ANACTRL_SHORT_LVLADJR),
300 + mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL);
301 +}
302 +
303 +static void mxs_codec_dac_arm_short(struct mxs_adc_priv *mxs_adc, bool bLatchCM, bool bLatchLR)
304 +{
305 + if (bLatchCM) {
306 + if (mxs_codec_dac_is_capless(mxs_adc))
307 + mxs_codec_dac_arm_short_cm(mxs_adc, true);
308 + } else
309 + mxs_codec_dac_arm_short_cm(mxs_adc, false);
310 +
311 + if (bLatchLR)
312 + mxs_codec_dac_arm_short_lr(mxs_adc, true);
313 + else
314 + mxs_codec_dac_arm_short_lr(mxs_adc, false);
315 +}
316 +
317 +static void
318 +mxs_codec_dac_power_on(struct mxs_adc_priv *mxs_adc)
319 +{
320 + /* Ungate DAC clocks */
321 + __raw_writel(BM_AUDIOOUT_CTRL_CLKGATE,
322 + mxs_adc->aout_base + HW_AUDIOOUT_CTRL_CLR);
323 + __raw_writel(BM_AUDIOOUT_ANACLKCTRL_CLKGATE,
324 + mxs_adc->aout_base + HW_AUDIOOUT_ANACLKCTRL_CLR);
325 +
326 + /* 16 bit word length */
327 + __raw_writel(BM_AUDIOOUT_CTRL_WORD_LENGTH,
328 + mxs_adc->aout_base + HW_AUDIOOUT_CTRL_SET);
329 +
330 + /* Arm headphone LR short protect */
331 + mxs_codec_dac_set_short_trip_level(mxs_adc, 0);
332 + mxs_codec_dac_arm_short(mxs_adc, false, true);
333 +
334 + /* Update DAC volume over zero crossings */
335 + __raw_writel(BM_AUDIOOUT_DACVOLUME_EN_ZCD,
336 + mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_SET);
337 + /* Mute DAC */
338 + __raw_writel(BM_AUDIOOUT_DACVOLUME_MUTE_LEFT |
339 + BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT,
340 + mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_SET);
341 +
342 + /* Update HP volume over zero crossings */
343 + __raw_writel(BM_AUDIOOUT_HPVOL_EN_MSTR_ZCD,
344 + mxs_adc->aout_base + HW_AUDIOOUT_HPVOL_SET);
345 +
346 + __raw_writel(BM_AUDIOOUT_ANACTRL_HP_CLASSAB,
347 + mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_SET);
348 +
349 + /* Mute HP output */
350 + __raw_writel(BM_AUDIOOUT_HPVOL_MUTE,
351 + mxs_adc->aout_base + HW_AUDIOOUT_HPVOL_SET);
352 + /* Mute speaker amp */
353 + __raw_writel(BM_AUDIOOUT_SPEAKERCTRL_MUTE,
354 + mxs_adc->aout_base + HW_AUDIOOUT_SPEAKERCTRL_SET);
355 + /* Enable the audioout */
356 + __raw_writel(BM_AUDIOOUT_CTRL_RUN,
357 + mxs_adc->aout_base + HW_AUDIOOUT_CTRL_SET);
358 +}
359 +
360 +static void
361 +mxs_codec_dac_power_down(struct mxs_adc_priv *mxs_adc)
362 +{
363 + /* Disable the audioout */
364 + __raw_writel(BM_AUDIOOUT_CTRL_RUN,
365 + mxs_adc->aout_base + HW_AUDIOOUT_CTRL_CLR);
366 + /* Disable class AB */
367 + __raw_writel(BM_AUDIOOUT_ANACTRL_HP_CLASSAB,
368 + mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_CLR);
369 +
370 + /* Set hold to ground */
371 + __raw_writel(BM_AUDIOOUT_ANACTRL_HP_HOLD_GND,
372 + mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_SET);
373 +
374 + /* Mute HP output */
375 + __raw_writel(BM_AUDIOOUT_HPVOL_MUTE,
376 + mxs_adc->aout_base + HW_AUDIOOUT_HPVOL_SET);
377 + /* Power down HP output */
378 + __raw_writel(BM_AUDIOOUT_PWRDN_HEADPHONE,
379 + mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_SET);
380 +
381 + /* Mute speaker amp */
382 + __raw_writel(BM_AUDIOOUT_SPEAKERCTRL_MUTE,
383 + mxs_adc->aout_base + HW_AUDIOOUT_SPEAKERCTRL_SET);
384 + /* Power down speaker amp */
385 + __raw_writel(BM_AUDIOOUT_PWRDN_SPEAKER,
386 + mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_SET);
387 +
388 + /* Mute DAC */
389 + __raw_writel(BM_AUDIOOUT_DACVOLUME_MUTE_LEFT |
390 + BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT,
391 + mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_SET);
392 + /* Power down DAC */
393 + __raw_writel(BM_AUDIOOUT_PWRDN_DAC,
394 + mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_SET);
395 +
396 + /* Gate DAC clocks */
397 + __raw_writel(BM_AUDIOOUT_ANACLKCTRL_CLKGATE,
398 + mxs_adc->aout_base + HW_AUDIOOUT_ANACLKCTRL_SET);
399 + __raw_writel(BM_AUDIOOUT_CTRL_CLKGATE,
400 + mxs_adc->aout_base + HW_AUDIOOUT_CTRL_SET);
401 +}
402 +
403 +static void
404 +mxs_codec_adc_power_on(struct mxs_adc_priv *mxs_adc)
405 +{
406 + u32 reg;
407 +
408 + /* Ungate ADC clocks */
409 + __raw_writel(BM_AUDIOIN_CTRL_CLKGATE,
410 + mxs_adc->ain_base + HW_AUDIOIN_CTRL_CLR);
411 + __raw_writel(BM_AUDIOIN_ANACLKCTRL_CLKGATE,
412 + mxs_adc->ain_base + HW_AUDIOIN_ANACLKCTRL_CLR);
413 +
414 + /* 16 bit word length */
415 + __raw_writel(BM_AUDIOIN_CTRL_WORD_LENGTH,
416 + mxs_adc->ain_base + HW_AUDIOIN_CTRL_SET);
417 +
418 + /* Unmute ADC channels */
419 + __raw_writel(BM_AUDIOIN_ADCVOL_MUTE,
420 + mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_CLR);
421 +
422 + /*
423 + * The MUTE_LEFT and MUTE_RIGHT fields need to be cleared.
424 + * They aren't presented in the datasheet, so this is hardcode.
425 + */
426 + __raw_writel(0x01000100, mxs_adc->ain_base + HW_AUDIOIN_ADCVOLUME_CLR);
427 +
428 + /* Set the Input channel gain 3dB */
429 + __raw_writel(BM_AUDIOIN_ADCVOL_GAIN_LEFT,
430 + mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_CLR);
431 + __raw_writel(BM_AUDIOIN_ADCVOL_GAIN_RIGHT,
432 + mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_CLR);
433 + __raw_writel(BF(2, AUDIOIN_ADCVOL_GAIN_LEFT),
434 + mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_SET);
435 + __raw_writel(BF(2, AUDIOIN_ADCVOL_GAIN_RIGHT),
436 + mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_SET);
437 +
438 + /* Select default input - Microphone */
439 + __raw_writel(BM_AUDIOIN_ADCVOL_SELECT_LEFT,
440 + mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_CLR);
441 + __raw_writel(BM_AUDIOIN_ADCVOL_SELECT_RIGHT,
442 + mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_CLR);
443 + __raw_writel(BF
444 + (BV_AUDIOIN_ADCVOL_SELECT__MIC,
445 + AUDIOIN_ADCVOL_SELECT_LEFT),
446 + mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_SET);
447 + __raw_writel(BF
448 + (BV_AUDIOIN_ADCVOL_SELECT__MIC,
449 + AUDIOIN_ADCVOL_SELECT_RIGHT),
450 + mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_SET);
451 +
452 + /* Supply bias voltage to microphone */
453 + __raw_writel(BF(1, AUDIOIN_MICLINE_MIC_RESISTOR),
454 + mxs_adc->ain_base + HW_AUDIOIN_MICLINE_SET);
455 + __raw_writel(BM_AUDIOIN_MICLINE_MIC_SELECT,
456 + mxs_adc->ain_base + HW_AUDIOIN_MICLINE_SET);
457 + __raw_writel(BF(1, AUDIOIN_MICLINE_MIC_GAIN),
458 + mxs_adc->ain_base + HW_AUDIOIN_MICLINE_SET);
459 + __raw_writel(BF(7, AUDIOIN_MICLINE_MIC_BIAS),
460 + mxs_adc->ain_base + HW_AUDIOIN_MICLINE_SET);
461 +
462 + /* Set max ADC volume */
463 + reg = __raw_readl(mxs_adc->ain_base + HW_AUDIOIN_ADCVOLUME);
464 + reg &= ~BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT;
465 + reg &= ~BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT;
466 + reg |= BF(ADC_VOLUME_MAX, AUDIOIN_ADCVOLUME_VOLUME_LEFT);
467 + reg |= BF(ADC_VOLUME_MAX, AUDIOIN_ADCVOLUME_VOLUME_RIGHT);
468 + __raw_writel(reg, mxs_adc->ain_base + HW_AUDIOIN_ADCVOLUME);
469 +}
470 +
471 +static void
472 +mxs_codec_adc_power_down(struct mxs_adc_priv *mxs_adc)
473 +{
474 + /* Mute ADC channels */
475 + __raw_writel(BM_AUDIOIN_ADCVOL_MUTE,
476 + mxs_adc->ain_base + HW_AUDIOIN_ADCVOL_SET);
477 +
478 + /* Power Down ADC */
479 + __raw_writel(BM_AUDIOOUT_PWRDN_ADC | BM_AUDIOOUT_PWRDN_RIGHT_ADC,
480 + mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_SET);
481 +
482 + /* Gate ADC clocks */
483 + __raw_writel(BM_AUDIOIN_CTRL_CLKGATE,
484 + mxs_adc->ain_base + HW_AUDIOIN_CTRL_SET);
485 + __raw_writel(BM_AUDIOIN_ANACLKCTRL_CLKGATE,
486 + mxs_adc->ain_base + HW_AUDIOIN_ANACLKCTRL_SET);
487 +
488 + /* Disable bias voltage to microphone */
489 + __raw_writel(BF(0, AUDIOIN_MICLINE_MIC_RESISTOR),
490 + mxs_adc->ain_base + HW_AUDIOIN_MICLINE_SET);
491 +}
492 +
493 +static void mxs_codec_dac_enable(struct mxs_adc_priv *mxs_adc)
494 +{
495 + /* Move DAC codec out of reset */
496 + __raw_writel(BM_AUDIOOUT_CTRL_SFTRST,
497 + mxs_adc->aout_base + HW_AUDIOOUT_CTRL_CLR);
498 +
499 + /* Reduce analog power */
500 + __raw_writel(BM_AUDIOOUT_TEST_HP_I1_ADJ,
501 + mxs_adc->aout_base + HW_AUDIOOUT_TEST_CLR);
502 + __raw_writel(BF(0x1, AUDIOOUT_TEST_HP_I1_ADJ),
503 + mxs_adc->aout_base + HW_AUDIOOUT_TEST_SET);
504 + __raw_writel(BM_AUDIOOUT_REFCTRL_LOW_PWR,
505 + mxs_adc->aout_base + HW_AUDIOOUT_REFCTRL_SET);
506 + __raw_writel(BM_AUDIOOUT_REFCTRL_XTAL_BGR_BIAS,
507 + mxs_adc->aout_base + HW_AUDIOOUT_REFCTRL_SET);
508 + __raw_writel(BM_AUDIOOUT_REFCTRL_BIAS_CTRL,
509 + mxs_adc->aout_base + HW_AUDIOOUT_REFCTRL_CLR);
510 + __raw_writel(BF(0x1, AUDIOOUT_REFCTRL_BIAS_CTRL),
511 + mxs_adc->aout_base + HW_AUDIOOUT_REFCTRL_CLR);
512 +
513 + /* Set Vag value */
514 + mxs_codec_dac_set_vag(mxs_adc);
515 +
516 + /* Power on DAC codec */
517 + mxs_codec_dac_power_on(mxs_adc);
518 +}
519 +
520 +static void mxs_codec_dac_disable(struct mxs_adc_priv *mxs_adc)
521 +{
522 + mxs_codec_dac_power_down(mxs_adc);
523 +}
524 +
525 +static void mxs_codec_adc_enable(struct mxs_adc_priv *mxs_adc)
526 +{
527 + /* Move ADC codec out of reset */
528 + __raw_writel(BM_AUDIOIN_CTRL_SFTRST,
529 + mxs_adc->ain_base + HW_AUDIOIN_CTRL_CLR);
530 +
531 + /* Power on ADC codec */
532 + mxs_codec_adc_power_on(mxs_adc);
533 +}
534 +
535 +static void mxs_codec_adc_disable(struct mxs_adc_priv *mxs_adc)
536 +{
537 + mxs_codec_adc_power_down(mxs_adc);
538 +}
539 +
540 +static void mxs_codec_startup(struct snd_soc_codec *codec)
541 +{
542 + struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec);
543 +
544 + /* Soft reset DAC block */
545 + __raw_writel(BM_AUDIOOUT_CTRL_SFTRST,
546 + mxs_adc->aout_base + HW_AUDIOOUT_CTRL_SET);
547 + while (!(__raw_readl(mxs_adc->aout_base + HW_AUDIOOUT_CTRL)
548 + & BM_AUDIOOUT_CTRL_CLKGATE)){
549 + }
550 +
551 + /* Soft reset ADC block */
552 + __raw_writel(BM_AUDIOIN_CTRL_SFTRST,
553 + mxs_adc->ain_base + HW_AUDIOIN_CTRL_SET);
554 + while (!(__raw_readl(mxs_adc->ain_base + HW_AUDIOIN_CTRL)
555 + & BM_AUDIOIN_CTRL_CLKGATE)){
556 + }
557 +
558 + mxs_codec_dac_enable(mxs_adc);
559 + mxs_codec_adc_enable(mxs_adc);
560 +
561 + /* Sync regs and cache */
562 + mxs_codec_sync_reg_cache(codec);
563 +}
564 +
565 +static void mxs_codec_stop(struct snd_soc_codec *codec)
566 +{
567 + struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec);
568 +
569 + mxs_codec_dac_disable(mxs_adc);
570 + mxs_codec_adc_disable(mxs_adc);
571 +}
572 +/* END Codec routines */
573 +
574 +/* kcontrol */
575 +static int dac_info_volsw(struct snd_kcontrol *kcontrol,
576 + struct snd_ctl_elem_info *uinfo)
577 +{
578 + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
579 + uinfo->count = 2;
580 + uinfo->value.integer.min = 0;
581 + uinfo->value.integer.max = 0xf;
582 + return 0;
583 +}
584 +
585 +static int dac_get_volsw(struct snd_kcontrol *kcontrol,
586 + struct snd_ctl_elem_value *ucontrol)
587 +{
588 + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
589 + struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec);
590 + int reg, l, r;
591 + int i;
592 +
593 + reg = __raw_readl(mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME);
594 +
595 + l = (reg & BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT) >>
596 + BP_AUDIOOUT_DACVOLUME_VOLUME_LEFT;
597 + r = (reg & BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT) >>
598 + BP_AUDIOOUT_DACVOLUME_VOLUME_RIGHT;
599 + /*Left channel */
600 + i = 0;
601 + while (i < 16) {
602 + if (l == dac_volumn_control_word[i]) {
603 + ucontrol->value.integer.value[0] = i;
604 + break;
605 + }
606 + i++;
607 + }
608 + if (i == 16)
609 + ucontrol->value.integer.value[0] = i;
610 + /*Right channel */
611 + i = 0;
612 + while (i < 16) {
613 + if (r == dac_volumn_control_word[i]) {
614 + ucontrol->value.integer.value[1] = i;
615 + break;
616 + }
617 + i++;
618 + }
619 + if (i == 16)
620 + ucontrol->value.integer.value[1] = i;
621 +
622 + return 0;
623 +}
624 +
625 +static int dac_put_volsw(struct snd_kcontrol *kcontrol,
626 + struct snd_ctl_elem_value *ucontrol)
627 +{
628 + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
629 + struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec);
630 + int reg, l, r;
631 + int i;
632 +
633 + i = ucontrol->value.integer.value[0];
634 + l = dac_volumn_control_word[i];
635 + /*Get dac volume for left channel */
636 + reg = BF(l, AUDIOOUT_DACVOLUME_VOLUME_LEFT);
637 +
638 + i = ucontrol->value.integer.value[1];
639 + r = dac_volumn_control_word[i];
640 + /*Get dac volume for right channel */
641 + reg = reg | BF(r, AUDIOOUT_DACVOLUME_VOLUME_RIGHT);
642 +
643 + /*Clear left/right dac volume */
644 + __raw_writel(BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT |
645 + BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT,
646 + mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_CLR);
647 + __raw_writel(reg, mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_SET);
648 +
649 + return 0;
650 +}
651 +
652 +static const char *mxs_codec_adc_input_sel[] = {
653 + "Mic", "Line In 1", "Head Phone", "Line In 2" };
654 +
655 +static const char *mxs_codec_hp_output_sel[] = { "DAC Out", "Line In 1" };
656 +
657 +static const char *mxs_codec_adc_3d_sel[] = {
658 + "Off", "Low", "Medium", "High" };
659 +
660 +static const struct soc_enum mxs_codec_enum[] = {
661 + SOC_ENUM_SINGLE(ADC_ADCVOL_L, 12, 4, mxs_codec_adc_input_sel),
662 + SOC_ENUM_SINGLE(ADC_ADCVOL_L, 4, 4, mxs_codec_adc_input_sel),
663 + SOC_ENUM_SINGLE(DAC_HPVOL_H, 0, 2, mxs_codec_hp_output_sel),
664 + SOC_ENUM_SINGLE(DAC_CTRL_L, 8, 4, mxs_codec_adc_3d_sel),
665 +};
666 +
667 +static const struct snd_kcontrol_new mxs_snd_controls[] = {
668 + /* Playback Volume */
669 + {
670 + .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
671 + .name = "DAC Playback Volume",
672 + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
673 + SNDRV_CTL_ELEM_ACCESS_VOLATILE,
674 + .info = dac_info_volsw,
675 + .get = dac_get_volsw,
676 + .put = dac_put_volsw,
677 + },
678 +
679 + SOC_DOUBLE_R("DAC Playback Switch",
680 + DAC_VOLUME_H, DAC_VOLUME_L, 8, 0x01, 1),
681 + SOC_DOUBLE("HP Playback Volume", DAC_HPVOL_L, 8, 0, 0x7F, 1),
682 +
683 + /* Capture Volume */
684 + SOC_DOUBLE_R("ADC Capture Volume",
685 + ADC_VOLUME_H, ADC_VOLUME_L, 0, 0xFF, 0),
686 + SOC_DOUBLE("ADC PGA Capture Volume", ADC_ADCVOL_L, 8, 0, 0x0F, 0),
687 + SOC_SINGLE("ADC PGA Capture Switch", ADC_ADCVOL_H, 8, 0x1, 1),
688 + SOC_SINGLE("Mic PGA Capture Volume", ADC_MICLINE_L, 0, 0x03, 0),
689 +
690 + /* Virtual 3D effect */
691 + SOC_ENUM("3D effect", mxs_codec_enum[3]),
692 +};
693 +/* END kcontrol */
694 +
695 +/* DAPM */
696 +static int pga_event(struct snd_soc_dapm_widget *w,
697 + struct snd_kcontrol *kcontrol, int event)
698 +{
699 + struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(w->codec);
700 +
701 + switch (event) {
702 + case SND_SOC_DAPM_PRE_PMU:
703 + /* Prepare powering up HP and SPEAKER output */
704 + __raw_writel(BM_AUDIOOUT_ANACTRL_HP_HOLD_GND,
705 + mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_SET);
706 + __raw_writel(BM_RTC_PERSISTENT0_RELEASE_GND,
707 + mxs_adc->rtc_base + HW_RTC_PERSISTENT0_SET);
708 + msleep(100);
709 + break;
710 + case SND_SOC_DAPM_POST_PMU:
711 + __raw_writel(BM_AUDIOOUT_ANACTRL_HP_HOLD_GND,
712 + mxs_adc->aout_base + HW_AUDIOOUT_ANACTRL_CLR);
713 + break;
714 + case SND_SOC_DAPM_POST_PMD:
715 + __raw_writel(BM_RTC_PERSISTENT0_RELEASE_GND,
716 + mxs_adc->rtc_base + HW_RTC_PERSISTENT0_CLR);
717 + break;
718 + }
719 + return 0;
720 +}
721 +
722 +static int adc_event(struct snd_soc_dapm_widget *w,
723 + struct snd_kcontrol *kcontrol, int event)
724 +{
725 + struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(w->codec);
726 +
727 + switch (event) {
728 + case SND_SOC_DAPM_PRE_PMU:
729 + __raw_writel(BM_RTC_PERSISTENT0_RELEASE_GND,
730 + mxs_adc->rtc_base + HW_RTC_PERSISTENT0_SET);
731 + msleep(100);
732 + break;
733 + case SND_SOC_DAPM_POST_PMD:
734 + __raw_writel(BM_RTC_PERSISTENT0_RELEASE_GND,
735 + mxs_adc->rtc_base + HW_RTC_PERSISTENT0_CLR);
736 + break;
737 + }
738 + return 0;
739 +}
740 +
741 +/* Left ADC Mux */
742 +static const struct snd_kcontrol_new mxs_left_adc_controls =
743 +SOC_DAPM_ENUM("Route", mxs_codec_enum[0]);
744 +
745 +/* Right ADC Mux */
746 +static const struct snd_kcontrol_new mxs_right_adc_controls =
747 +SOC_DAPM_ENUM("Route", mxs_codec_enum[1]);
748 +
749 +/* Head Phone Mux */
750 +static const struct snd_kcontrol_new mxs_hp_controls =
751 +SOC_DAPM_ENUM("Route", mxs_codec_enum[2]);
752 +
753 +static const struct snd_soc_dapm_widget mxs_dapm_widgets[] = {
754 + SND_SOC_DAPM_ADC_E("ADC", "Capture", DAC_PWRDN_L, 8, 1, adc_event,
755 + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
756 +
757 + SND_SOC_DAPM_DAC("DAC", "Playback", DAC_PWRDN_L, 12, 1),
758 +
759 + SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
760 + &mxs_left_adc_controls),
761 + SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
762 + &mxs_right_adc_controls),
763 + SND_SOC_DAPM_MUX("HP Mux", SND_SOC_NOPM, 0, 0,
764 + &mxs_hp_controls),
765 + SND_SOC_DAPM_PGA_E("HP AMP", DAC_PWRDN_L, 0, 1, NULL, 0, pga_event,
766 + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
767 + SND_SOC_DAPM_POST_PMD),
768 + SND_SOC_DAPM_PGA("SPEAKER AMP", DAC_PWRDN_H, 8, 1, NULL, 0),
769 + SND_SOC_DAPM_INPUT("LINE1L"),
770 + SND_SOC_DAPM_INPUT("LINE1R"),
771 + SND_SOC_DAPM_INPUT("LINE2L"),
772 + SND_SOC_DAPM_INPUT("LINE2R"),
773 + SND_SOC_DAPM_INPUT("MIC"),
774 +
775 + SND_SOC_DAPM_OUTPUT("SPEAKER"),
776 + SND_SOC_DAPM_OUTPUT("HPL"),
777 + SND_SOC_DAPM_OUTPUT("HPR"),
778 +};
779 +
780 +/* routes for sgtl5000 */
781 +static const struct snd_soc_dapm_route mxs_dapm_routes[] = {
782 + /* Left ADC Mux */
783 + {"Left ADC Mux", "Mic", "MIC"},
784 + {"Left ADC Mux", "Line In 1", "LINE1L"},
785 + {"Left ADC Mux", "Line In 2", "LINE2L"},
786 + {"Left ADC Mux", "Head Phone", "HPL"},
787 +
788 + /* Right ADC Mux */
789 + {"Right ADC Mux", "Mic", "MIC"},
790 + {"Right ADC Mux", "Line In 1", "LINE1R"},
791 + {"Right ADC Mux", "Line In 2", "LINE2R"},
792 + {"Right ADC Mux", "Head Phone", "HPR"},
793 +
794 + /* ADC */
795 + {"ADC", NULL, "Left ADC Mux"},
796 + {"ADC", NULL, "Right ADC Mux"},
797 +
798 + /* HP Mux */
799 + {"HP Mux", "DAC Out", "DAC"},
800 + {"HP Mux", "Line In 1", "LINE1L"},
801 + {"HP Mux", "Line In 1", "LINE1R"},
802 +
803 + /* HP amp */
804 + {"HP AMP", NULL, "HP Mux"},
805 + /* HP output */
806 + {"HPR", NULL, "HP AMP"},
807 + {"HPL", NULL, "HP AMP"},
808 +
809 + /* Speaker amp */
810 + {"SPEAKER AMP", NULL, "DAC"},
811 + {"SPEAKER", NULL, "SPEAKER AMP"},
812 +};
813 +/* END DAPM */
814 +
815 +static int mxs_set_bias_level(struct snd_soc_codec *codec,
816 + enum snd_soc_bias_level level)
817 +{
818 + struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec);
819 +
820 + pr_debug("dapm level %d\n", level);
821 + switch (level) {
822 + case SND_SOC_BIAS_ON: /* full On */
823 + if (codec->dapm.bias_level == SND_SOC_BIAS_ON)
824 + break;
825 + break;
826 +
827 + case SND_SOC_BIAS_PREPARE: /* partial On */
828 + if (codec->dapm.bias_level == SND_SOC_BIAS_PREPARE)
829 + break;
830 + /* Set Capless mode */
831 + __raw_writel(BM_AUDIOOUT_PWRDN_CAPLESS,
832 + mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_CLR);
833 + break;
834 +
835 + case SND_SOC_BIAS_STANDBY: /* Off, with power */
836 + if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY)
837 + break;
838 + /* Unset Capless mode */
839 + __raw_writel(BM_AUDIOOUT_PWRDN_CAPLESS,
840 + mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_SET);
841 + break;
842 +
843 + case SND_SOC_BIAS_OFF: /* Off, without power */
844 + if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
845 + break;
846 + /* Unset Capless mode */
847 + __raw_writel(BM_AUDIOOUT_PWRDN_CAPLESS,
848 + mxs_adc->aout_base + HW_AUDIOOUT_PWRDN_SET);
849 + break;
850 + }
851 +
852 + codec->dapm.bias_level = level;
853 + return 0;
854 +}
855 +
856 +/* MXS-ADC Codec DAI driver */
857 +static int mxs_pcm_hw_params(struct snd_pcm_substream *substream,
858 + struct snd_pcm_hw_params *params,
859 + struct snd_soc_dai *dai)
860 +{
861 + struct snd_soc_codec *codec = dai->codec;
862 + struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec);
863 + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0;
864 + int i;
865 + u32 srr_value = 0;
866 + u32 src_hold = 0;
867 +
868 + i = get_srr_values(params_rate(params));
869 + if (i < 0)
870 + dev_warn(codec->dev, "%s doesn't support rate %d\n",
871 + codec->name, params_rate(params));
872 + else {
873 + src_hold = srr_values[i].src_hold;
874 +
875 + srr_value =
876 + BF(srr_values[i].basemult, AUDIOOUT_DACSRR_BASEMULT) |
877 + BF(srr_values[i].src_int, AUDIOOUT_DACSRR_SRC_INT) |
878 + BF(srr_values[i].src_frac, AUDIOOUT_DACSRR_SRC_FRAC) |
879 + BF(src_hold, AUDIOOUT_DACSRR_SRC_HOLD);
880 +
881 + if (playback)
882 + __raw_writel(srr_value,
883 + mxs_adc->aout_base + HW_AUDIOOUT_DACSRR);
884 + else
885 + __raw_writel(srr_value,
886 + mxs_adc->ain_base + HW_AUDIOIN_ADCSRR);
887 + }
888 +
889 + switch (params_format(params)) {
890 + case SNDRV_PCM_FORMAT_S16_LE:
891 + if (playback)
892 + __raw_writel(BM_AUDIOOUT_CTRL_WORD_LENGTH,
893 + mxs_adc->aout_base + HW_AUDIOOUT_CTRL_SET);
894 + else
895 + __raw_writel(BM_AUDIOIN_CTRL_WORD_LENGTH,
896 + mxs_adc->ain_base + HW_AUDIOIN_CTRL_SET);
897 +
898 + break;
899 +
900 + case SNDRV_PCM_FORMAT_S32_LE:
901 + if (playback)
902 + __raw_writel(BM_AUDIOOUT_CTRL_WORD_LENGTH,
903 + mxs_adc->aout_base + HW_AUDIOOUT_CTRL_CLR);
904 + else
905 + __raw_writel(BM_AUDIOIN_CTRL_WORD_LENGTH,
906 + mxs_adc->ain_base + HW_AUDIOIN_CTRL_CLR);
907 +
908 + break;
909 +
910 + default:
911 + dev_warn(codec->dev, "%s doesn't support format %d\n",
912 + codec->name, params_format(params));
913 +
914 + }
915 +
916 + return 0;
917 +}
918 +
919 +/* mute the codec used by alsa core */
920 +static int mxs_codec_dig_mute(struct snd_soc_dai *codec_dai, int mute)
921 +{
922 + struct mxs_adc_priv *mxs_adc = snd_soc_codec_get_drvdata(codec_dai->codec);
923 + int l, r;
924 + int ll, rr;
925 + u32 reg, reg1, reg2;
926 + u32 dac_mask = BM_AUDIOOUT_DACVOLUME_MUTE_LEFT |
927 + BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT;
928 +
929 + if (mute) {
930 + reg = __raw_readl(mxs_adc->aout_base + \
931 + HW_AUDIOOUT_DACVOLUME);
932 +
933 + reg1 = reg & ~BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT;
934 + reg1 = reg1 & ~BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT;
935 +
936 + l = (reg & BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT) >>
937 + BP_AUDIOOUT_DACVOLUME_VOLUME_LEFT;
938 + r = (reg & BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT) >>
939 + BP_AUDIOOUT_DACVOLUME_VOLUME_RIGHT;
940 +
941 + /* fade out dac vol */
942 + while ((l > DAC_VOLUME_MIN) || (r > DAC_VOLUME_MIN)) {
943 + l -= 0x8;
944 + r -= 0x8;
945 + ll = l > DAC_VOLUME_MIN ? l : DAC_VOLUME_MIN;
946 + rr = r > DAC_VOLUME_MIN ? r : DAC_VOLUME_MIN;
947 + reg2 = reg1 | BF_AUDIOOUT_DACVOLUME_VOLUME_LEFT(ll)
948 + | BF_AUDIOOUT_DACVOLUME_VOLUME_RIGHT(rr);
949 + __raw_writel(reg2,
950 + mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME);
951 + msleep(1);
952 + }
953 +
954 + __raw_writel(dac_mask,
955 + mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_SET);
956 + reg = reg | dac_mask;
957 + __raw_writel(reg,
958 + mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME);
959 + } else
960 + __raw_writel(dac_mask,
961 + mxs_adc->aout_base + HW_AUDIOOUT_DACVOLUME_CLR);
962 +
963 + return 0;
964 +}
965 +
966 +#define MXS_ADC_RATES SNDRV_PCM_RATE_8000_192000
967 +#define MXS_ADC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
968 +
969 +static const struct snd_soc_dai_ops mxs_codec_dai_ops = {
970 + .hw_params = mxs_pcm_hw_params,
971 + .digital_mute = mxs_codec_dig_mute,
972 +};
973 +
974 +static struct snd_soc_dai_driver mxs_codec_dai_driver = {
975 + .name = "mxs-builtin-codec-dai",
976 + .playback = {
977 + .stream_name = "Playback",
978 + .channels_min = 2,
979 + .channels_max = 2,
980 + .rates = MXS_ADC_RATES,
981 + .formats = MXS_ADC_FORMATS,
982 + },
983 + .capture = {
984 + .stream_name = "Capture",
985 + .channels_min = 2,
986 + .channels_max = 2,
987 + .rates = MXS_ADC_RATES,
988 + .formats = MXS_ADC_FORMATS,
989 + },
990 + .ops = &mxs_codec_dai_ops,
991 +};
992 +/* END MXS-ADC Codec DAI driver */
993 +
994 +/* MXS-ADC Codec driver */
995 +static int mxs_codec_driver_probe(struct snd_soc_codec *codec)
996 +{
997 + int ret = 0;
998 + /* We don't use snd_soc_codec_set_cache_io because we are using
999 + * our own IO functions: write, read. */
1000 +
1001 + mxs_codec_startup(codec);
1002 +
1003 + /* leading to standby state */
1004 + ret = mxs_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1005 + if (ret)
1006 + goto err;
1007 +
1008 + return 0;
1009 +
1010 +err:
1011 + mxs_codec_stop(codec);
1012 +
1013 + return ret;
1014 +}
1015 +
1016 +static int mxs_codec_driver_remove(struct snd_soc_codec *codec)
1017 +{
1018 + mxs_codec_stop(codec);
1019 +
1020 + return 0;
1021 +}
1022 +
1023 +// static int mxs_codec_driver_suspend(struct snd_soc_codec *codec)
1024 +// {
1025 +// /* TODO Enable power management. */
1026 +// return 0;
1027 +// }
1028 +
1029 +// static int mxs_codec_driver_resume(struct snd_soc_codec *codec)
1030 +// {
1031 +// /* TODO Enable power management. */
1032 +// return 0;
1033 +// }
1034 +
1035 +static struct snd_soc_codec_driver mxs_codec_driver = {
1036 + .probe = mxs_codec_driver_probe,
1037 + .remove = mxs_codec_driver_remove,
1038 +// .suspend = mxs_codec_driver_suspend,
1039 +// .resume = mxs_codec_driver_resume,
1040 + .set_bias_level = mxs_set_bias_level,
1041 + .reg_cache_size = ADC_REGNUM,
1042 + .reg_word_size = sizeof(u16),
1043 + .reg_cache_step = 1,
1044 +// .reg_cache_default = mxsadc_regs,
1045 +// .volatile_register = sgtl5000_volatile_register,
1046 + .controls = mxs_snd_controls,
1047 + .num_controls = ARRAY_SIZE(mxs_snd_controls),
1048 + .dapm_widgets = mxs_dapm_widgets,
1049 + .num_dapm_widgets = ARRAY_SIZE(mxs_dapm_widgets),
1050 + .dapm_routes = mxs_dapm_routes,
1051 + .num_dapm_routes = ARRAY_SIZE(mxs_dapm_routes),
1052 + .write = mxs_codec_write,
1053 + .read = mxs_codec_read,
1054 +};
1055 +/* END MXS-ADC Codec driver */
1056 +
1057 +/* Underlying platform device that registers codec */
1058 +static int mxs_adc_probe(struct platform_device *pdev)
1059 +{
1060 + struct mxs_adc_priv *mxs_adc;
1061 + struct resource *r;
1062 + int ret;
1063 +
1064 + mxs_adc = devm_kzalloc(&pdev->dev, sizeof(struct mxs_adc_priv), GFP_KERNEL);
1065 + if (!mxs_adc)
1066 + return -ENOMEM;
1067 +
1068 + platform_set_drvdata(pdev, mxs_adc);
1069 +
1070 + /* audio-in IO memory */
1071 + r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "audioin");
1072 + if (IS_ERR(r)) {
1073 + dev_err(&pdev->dev, "failed to get resource\n");
1074 + return PTR_ERR(r);
1075 + }
1076 +
1077 + mxs_adc->ain_base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
1078 + if (IS_ERR(mxs_adc->ain_base)) {
1079 + dev_err(&pdev->dev, "ioremap failed\n");
1080 + return PTR_ERR(mxs_adc->ain_base);
1081 + }
1082 +
1083 + /* audio-out IO memory */
1084 + r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "audioout");
1085 + if (IS_ERR(r)) {
1086 + dev_err(&pdev->dev, "failed to get resource\n");
1087 + return PTR_ERR(r);
1088 + }
1089 +
1090 + mxs_adc->aout_base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
1091 + if (IS_ERR(mxs_adc->aout_base)) {
1092 + dev_err(&pdev->dev, "ioremap failed\n");
1093 + return PTR_ERR(mxs_adc->aout_base);
1094 + }
1095 +
1096 + /* rtc IO memory */
1097 + r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rtc");
1098 + if (IS_ERR(r)) {
1099 + dev_err(&pdev->dev, "failed to get resource\n");
1100 + return PTR_ERR(r);
1101 + }
1102 +
1103 + mxs_adc->rtc_base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
1104 + if (IS_ERR(mxs_adc->rtc_base)) {
1105 + dev_err(&pdev->dev, "ioremap failed\n");
1106 + return PTR_ERR(mxs_adc->rtc_base);
1107 + }
1108 +
1109 + /* Get audio clock */
1110 + mxs_adc->clk = devm_clk_get(&pdev->dev, "filt");
1111 + if (IS_ERR(mxs_adc->clk)) {
1112 + ret = PTR_ERR(mxs_adc->clk);
1113 + dev_err(&pdev->dev, "%s: Clock initialization failed\n", __func__);
1114 + return ret;
1115 + }
1116 +
1117 + /* Turn on audio clock */
1118 + ret = clk_prepare_enable(mxs_adc->clk);
1119 + if (unlikely(ret != 0)) {
1120 + dev_err(&pdev->dev, "%s: Clock prepare or enable failed\n", __func__);
1121 + return ret;
1122 + }
1123 +
1124 + ret = snd_soc_register_codec(&pdev->dev,
1125 + &mxs_codec_driver,&mxs_codec_dai_driver, 1);
1126 + if (unlikely(ret != 0)) {
1127 + dev_err(&pdev->dev, "Codec registration failed\n");
1128 + goto disable_clk;
1129 + }
1130 +
1131 + return 0;
1132 +
1133 +disable_clk:
1134 + clk_disable_unprepare(mxs_adc->clk);
1135 + return ret;
1136 +}
1137 +
1138 +static int mxs_adc_remove(struct platform_device *pdev)
1139 +{
1140 + struct mxs_adc_priv *mxs_adc = platform_get_drvdata(pdev);
1141 +
1142 + clk_disable_unprepare(mxs_adc->clk);
1143 + snd_soc_unregister_codec(&pdev->dev);
1144 +
1145 + return 0;
1146 +}
1147 +
1148 +static const struct of_device_id mxs_adc_dt_ids[] = {
1149 + { .compatible = "fsl,mxs-builtin-codec", },
1150 + { /* sentinel */ }
1151 +};
1152 +MODULE_DEVICE_TABLE(of, mxs_adc_dt_ids);
1153 +
1154 +static struct platform_driver mxs_adc_driver = {
1155 + .driver = {
1156 + .name = "mxs-builtin-codec",
1157 + .owner = THIS_MODULE,
1158 + .of_match_table = mxs_adc_dt_ids,
1159 + },
1160 + .probe = mxs_adc_probe,
1161 + .remove = mxs_adc_remove,
1162 +};
1163 +
1164 +module_platform_driver(mxs_adc_driver);
1165 +/* END Underlying platform device that registers codec */
1166 +
1167 +MODULE_DESCRIPTION("Freescale MXS ADC/DAC SoC Codec Driver");
1168 +MODULE_AUTHOR("Michal Ulianko <michal.ulianko@gmail.com>");
1169 +MODULE_LICENSE("GPL");
1170 --- /dev/null
1171 +++ b/sound/soc/codecs/mxs-builtin-codec.h
1172 @@ -0,0 +1,825 @@
1173 +#ifndef __MXS_ADC_CODEC_H
1174 +
1175 +#include <linux/io.h>
1176 +
1177 +/* MXS ADC/DAC registers */
1178 +#define DAC_CTRL_L 0
1179 +#define DAC_CTRL_H 1
1180 +#define DAC_STAT_L 2
1181 +#define DAC_STAT_H 3
1182 +#define DAC_SRR_L 4
1183 +#define DAC_VOLUME_L 6
1184 +#define DAC_VOLUME_H 7
1185 +#define DAC_DEBUG_L 8
1186 +#define DAC_DEBUG_H 9
1187 +#define DAC_HPVOL_L 10
1188 +#define DAC_HPVOL_H 11
1189 +#define DAC_PWRDN_L 12
1190 +#define DAC_PWRDN_H 13
1191 +#define DAC_REFCTRL_L 14
1192 +#define DAC_REFCTRL_H 15
1193 +#define DAC_ANACTRL_L 16
1194 +#define DAC_ANACTRL_H 17
1195 +#define DAC_TEST_L 18
1196 +#define DAC_TEST_H 19
1197 +#define DAC_BISTCTRL_L 20
1198 +#define DAC_BISTCTRL_H 21
1199 +#define DAC_BISTSTAT0_L 22
1200 +#define DAC_BISTSTAT0_H 23
1201 +#define DAC_BISTSTAT1_L 24
1202 +#define DAC_BISTSTAT1_H 25
1203 +#define DAC_ANACLKCTRL_L 26
1204 +#define DAC_ANACLKCTRL_H 27
1205 +#define DAC_DATA_L 28
1206 +#define DAC_DATA_H 29
1207 +#define DAC_SPEAKERCTRL_L 30
1208 +#define DAC_SPEAKERCTRL_H 31
1209 +#define DAC_VERSION_L 32
1210 +#define DAC_VERSION_H 33
1211 +#define ADC_CTRL_L 34
1212 +#define ADC_CTRL_H 35
1213 +#define ADC_STAT_L 36
1214 +#define ADC_STAT_H 37
1215 +#define ADC_SRR_L 38
1216 +#define ADC_SRR_H 39
1217 +#define ADC_VOLUME_L 40
1218 +#define ADC_VOLUME_H 41
1219 +#define ADC_DEBUG_L 42
1220 +#define ADC_DEBUG_H 43
1221 +#define ADC_ADCVOL_L 44
1222 +#define ADC_ADCVOL_H 45
1223 +#define ADC_MICLINE_L 46
1224 +#define ADC_MICLINE_H 47
1225 +#define ADC_ANACLKCTRL_L 48
1226 +#define ADC_ANACLKCTRL_H 49
1227 +#define ADC_DATA_L 50
1228 +#define ADC_DATA_H 51
1229 +
1230 +#define ADC_REGNUM 52
1231 +
1232 +#define DAC_VOLUME_MIN 0x37
1233 +#define DAC_VOLUME_MAX 0xFE
1234 +#define ADC_VOLUME_MIN 0x37
1235 +#define ADC_VOLUME_MAX 0xFE
1236 +#define HP_VOLUME_MAX 0x0
1237 +#define HP_VOLUME_MIN 0x7F
1238 +#define LO_VOLUME_MAX 0x0
1239 +#define LO_VOLUME_MIN 0x1F
1240 +
1241 +/* RTC */
1242 +#define HW_RTC_PERSISTENT0 (0x00000060)
1243 +#define HW_RTC_PERSISTENT0_SET (0x00000064)
1244 +#define HW_RTC_PERSISTENT0_CLR (0x00000068)
1245 +#define HW_RTC_PERSISTENT0_TOG (0x0000006c)
1246 +
1247 +// TODO
1248 +//#define BM_RTC_PERSISTENT0_RELEASE_GND 0x00080000
1249 +
1250 +/* AUDIOOUT */
1251 +#define HW_AUDIOOUT_CTRL (0x00000000)
1252 +#define HW_AUDIOOUT_CTRL_SET (0x00000004)
1253 +#define HW_AUDIOOUT_CTRL_CLR (0x00000008)
1254 +#define HW_AUDIOOUT_CTRL_TOG (0x0000000c)
1255 +
1256 +#define BM_AUDIOOUT_CTRL_SFTRST 0x80000000
1257 +#define BM_AUDIOOUT_CTRL_CLKGATE 0x40000000
1258 +#define BP_AUDIOOUT_CTRL_RSRVD4 21
1259 +#define BM_AUDIOOUT_CTRL_RSRVD4 0x3FE00000
1260 +#define BF_AUDIOOUT_CTRL_RSRVD4(v) \
1261 + (((v) << 21) & BM_AUDIOOUT_CTRL_RSRVD4)
1262 +#define BP_AUDIOOUT_CTRL_DMAWAIT_COUNT 16
1263 +#define BM_AUDIOOUT_CTRL_DMAWAIT_COUNT 0x001F0000
1264 +#define BF_AUDIOOUT_CTRL_DMAWAIT_COUNT(v) \
1265 + (((v) << 16) & BM_AUDIOOUT_CTRL_DMAWAIT_COUNT)
1266 +#define BM_AUDIOOUT_CTRL_RSRVD3 0x00008000
1267 +#define BM_AUDIOOUT_CTRL_LR_SWAP 0x00004000
1268 +#define BM_AUDIOOUT_CTRL_EDGE_SYNC 0x00002000
1269 +#define BM_AUDIOOUT_CTRL_INVERT_1BIT 0x00001000
1270 +#define BP_AUDIOOUT_CTRL_RSRVD2 10
1271 +#define BM_AUDIOOUT_CTRL_RSRVD2 0x00000C00
1272 +#define BF_AUDIOOUT_CTRL_RSRVD2(v) \
1273 + (((v) << 10) & BM_AUDIOOUT_CTRL_RSRVD2)
1274 +#define BP_AUDIOOUT_CTRL_SS3D_EFFECT 8
1275 +#define BM_AUDIOOUT_CTRL_SS3D_EFFECT 0x00000300
1276 +#define BF_AUDIOOUT_CTRL_SS3D_EFFECT(v) \
1277 + (((v) << 8) & BM_AUDIOOUT_CTRL_SS3D_EFFECT)
1278 +#define BM_AUDIOOUT_CTRL_RSRVD1 0x00000080
1279 +#define BM_AUDIOOUT_CTRL_WORD_LENGTH 0x00000040
1280 +#define BM_AUDIOOUT_CTRL_DAC_ZERO_ENABLE 0x00000020
1281 +#define BM_AUDIOOUT_CTRL_LOOPBACK 0x00000010
1282 +#define BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ 0x00000008
1283 +#define BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ 0x00000004
1284 +#define BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN 0x00000002
1285 +#define BM_AUDIOOUT_CTRL_RUN 0x00000001
1286 +
1287 +#define HW_AUDIOOUT_STAT (0x00000010)
1288 +#define HW_AUDIOOUT_STAT_SET (0x00000014)
1289 +#define HW_AUDIOOUT_STAT_CLR (0x00000018)
1290 +#define HW_AUDIOOUT_STAT_TOG (0x0000001c)
1291 +
1292 +#define BM_AUDIOOUT_STAT_DAC_PRESENT 0x80000000
1293 +#define BP_AUDIOOUT_STAT_RSRVD1 0
1294 +#define BM_AUDIOOUT_STAT_RSRVD1 0x7FFFFFFF
1295 +#define BF_AUDIOOUT_STAT_RSRVD1(v) \
1296 + (((v) << 0) & BM_AUDIOOUT_STAT_RSRVD1)
1297 +
1298 +#define HW_AUDIOOUT_DACSRR (0x00000020)
1299 +#define HW_AUDIOOUT_DACSRR_SET (0x00000024)
1300 +#define HW_AUDIOOUT_DACSRR_CLR (0x00000028)
1301 +#define HW_AUDIOOUT_DACSRR_TOG (0x0000002c)
1302 +
1303 +#define BM_AUDIOOUT_DACSRR_OSR 0x80000000
1304 +#define BV_AUDIOOUT_DACSRR_OSR__OSR6 0x0
1305 +#define BV_AUDIOOUT_DACSRR_OSR__OSR12 0x1
1306 +#define BP_AUDIOOUT_DACSRR_BASEMULT 28
1307 +#define BM_AUDIOOUT_DACSRR_BASEMULT 0x70000000
1308 +#define BF_AUDIOOUT_DACSRR_BASEMULT(v) \
1309 + (((v) << 28) & BM_AUDIOOUT_DACSRR_BASEMULT)
1310 +#define BV_AUDIOOUT_DACSRR_BASEMULT__SINGLE_RATE 0x1
1311 +#define BV_AUDIOOUT_DACSRR_BASEMULT__DOUBLE_RATE 0x2
1312 +#define BV_AUDIOOUT_DACSRR_BASEMULT__QUAD_RATE 0x4
1313 +#define BM_AUDIOOUT_DACSRR_RSRVD2 0x08000000
1314 +#define BP_AUDIOOUT_DACSRR_SRC_HOLD 24
1315 +#define BM_AUDIOOUT_DACSRR_SRC_HOLD 0x07000000
1316 +#define BF_AUDIOOUT_DACSRR_SRC_HOLD(v) \
1317 + (((v) << 24) & BM_AUDIOOUT_DACSRR_SRC_HOLD)
1318 +#define BP_AUDIOOUT_DACSRR_RSRVD1 21
1319 +#define BM_AUDIOOUT_DACSRR_RSRVD1 0x00E00000
1320 +#define BF_AUDIOOUT_DACSRR_RSRVD1(v) \
1321 + (((v) << 21) & BM_AUDIOOUT_DACSRR_RSRVD1)
1322 +#define BP_AUDIOOUT_DACSRR_SRC_INT 16
1323 +#define BM_AUDIOOUT_DACSRR_SRC_INT 0x001F0000
1324 +#define BF_AUDIOOUT_DACSRR_SRC_INT(v) \
1325 + (((v) << 16) & BM_AUDIOOUT_DACSRR_SRC_INT)
1326 +#define BP_AUDIOOUT_DACSRR_RSRVD0 13
1327 +#define BM_AUDIOOUT_DACSRR_RSRVD0 0x0000E000
1328 +#define BF_AUDIOOUT_DACSRR_RSRVD0(v) \
1329 + (((v) << 13) & BM_AUDIOOUT_DACSRR_RSRVD0)
1330 +#define BP_AUDIOOUT_DACSRR_SRC_FRAC 0
1331 +#define BM_AUDIOOUT_DACSRR_SRC_FRAC 0x00001FFF
1332 +#define BF_AUDIOOUT_DACSRR_SRC_FRAC(v) \
1333 + (((v) << 0) & BM_AUDIOOUT_DACSRR_SRC_FRAC)
1334 +
1335 +#define HW_AUDIOOUT_DACVOLUME (0x00000030)
1336 +#define HW_AUDIOOUT_DACVOLUME_SET (0x00000034)
1337 +#define HW_AUDIOOUT_DACVOLUME_CLR (0x00000038)
1338 +#define HW_AUDIOOUT_DACVOLUME_TOG (0x0000003c)
1339 +
1340 +#define BP_AUDIOOUT_DACVOLUME_RSRVD4 29
1341 +#define BM_AUDIOOUT_DACVOLUME_RSRVD4 0xE0000000
1342 +#define BF_AUDIOOUT_DACVOLUME_RSRVD4(v) \
1343 + (((v) << 29) & BM_AUDIOOUT_DACVOLUME_RSRVD4)
1344 +#define BM_AUDIOOUT_DACVOLUME_VOLUME_UPDATE_LEFT 0x10000000
1345 +#define BP_AUDIOOUT_DACVOLUME_RSRVD3 26
1346 +#define BM_AUDIOOUT_DACVOLUME_RSRVD3 0x0C000000
1347 +#define BF_AUDIOOUT_DACVOLUME_RSRVD3(v) \
1348 + (((v) << 26) & BM_AUDIOOUT_DACVOLUME_RSRVD3)
1349 +#define BM_AUDIOOUT_DACVOLUME_EN_ZCD 0x02000000
1350 +#define BM_AUDIOOUT_DACVOLUME_MUTE_LEFT 0x01000000
1351 +#define BP_AUDIOOUT_DACVOLUME_VOLUME_LEFT 16
1352 +#define BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT 0x00FF0000
1353 +#define BF_AUDIOOUT_DACVOLUME_VOLUME_LEFT(v) \
1354 + (((v) << 16) & BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT)
1355 +#define BP_AUDIOOUT_DACVOLUME_RSRVD2 13
1356 +#define BM_AUDIOOUT_DACVOLUME_RSRVD2 0x0000E000
1357 +#define BF_AUDIOOUT_DACVOLUME_RSRVD2(v) \
1358 + (((v) << 13) & BM_AUDIOOUT_DACVOLUME_RSRVD2)
1359 +#define BM_AUDIOOUT_DACVOLUME_VOLUME_UPDATE_RIGHT 0x00001000
1360 +#define BP_AUDIOOUT_DACVOLUME_RSRVD1 9
1361 +#define BM_AUDIOOUT_DACVOLUME_RSRVD1 0x00000E00
1362 +#define BF_AUDIOOUT_DACVOLUME_RSRVD1(v) \
1363 + (((v) << 9) & BM_AUDIOOUT_DACVOLUME_RSRVD1)
1364 +#define BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT 0x00000100
1365 +#define BP_AUDIOOUT_DACVOLUME_VOLUME_RIGHT 0
1366 +#define BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT 0x000000FF
1367 +#define BF_AUDIOOUT_DACVOLUME_VOLUME_RIGHT(v) \
1368 + (((v) << 0) & BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT)
1369 +
1370 +#define HW_AUDIOOUT_DACDEBUG (0x00000040)
1371 +#define HW_AUDIOOUT_DACDEBUG_SET (0x00000044)
1372 +#define HW_AUDIOOUT_DACDEBUG_CLR (0x00000048)
1373 +#define HW_AUDIOOUT_DACDEBUG_TOG (0x0000004c)
1374 +
1375 +#define BM_AUDIOOUT_DACDEBUG_ENABLE_DACDMA 0x80000000
1376 +#define BP_AUDIOOUT_DACDEBUG_RSRVD2 12
1377 +#define BM_AUDIOOUT_DACDEBUG_RSRVD2 0x7FFFF000
1378 +#define BF_AUDIOOUT_DACDEBUG_RSRVD2(v) \
1379 + (((v) << 12) & BM_AUDIOOUT_DACDEBUG_RSRVD2)
1380 +#define BP_AUDIOOUT_DACDEBUG_RAM_SS 8
1381 +#define BM_AUDIOOUT_DACDEBUG_RAM_SS 0x00000F00
1382 +#define BF_AUDIOOUT_DACDEBUG_RAM_SS(v) \
1383 + (((v) << 8) & BM_AUDIOOUT_DACDEBUG_RAM_SS)
1384 +#define BP_AUDIOOUT_DACDEBUG_RSRVD1 6
1385 +#define BM_AUDIOOUT_DACDEBUG_RSRVD1 0x000000C0
1386 +#define BF_AUDIOOUT_DACDEBUG_RSRVD1(v) \
1387 + (((v) << 6) & BM_AUDIOOUT_DACDEBUG_RSRVD1)
1388 +#define BM_AUDIOOUT_DACDEBUG_SET_INTERRUPT1_CLK_CROSS 0x00000020
1389 +#define BM_AUDIOOUT_DACDEBUG_SET_INTERRUPT0_CLK_CROSS 0x00000010
1390 +#define BM_AUDIOOUT_DACDEBUG_SET_INTERRUPT1_HAND_SHAKE 0x00000008
1391 +#define BM_AUDIOOUT_DACDEBUG_SET_INTERRUPT0_HAND_SHAKE 0x00000004
1392 +#define BM_AUDIOOUT_DACDEBUG_DMA_PREQ 0x00000002
1393 +#define BM_AUDIOOUT_DACDEBUG_FIFO_STATUS 0x00000001
1394 +
1395 +#define HW_AUDIOOUT_HPVOL (0x00000050)
1396 +#define HW_AUDIOOUT_HPVOL_SET (0x00000054)
1397 +#define HW_AUDIOOUT_HPVOL_CLR (0x00000058)
1398 +#define HW_AUDIOOUT_HPVOL_TOG (0x0000005c)
1399 +
1400 +#define BP_AUDIOOUT_HPVOL_RSRVD5 29
1401 +#define BM_AUDIOOUT_HPVOL_RSRVD5 0xE0000000
1402 +#define BF_AUDIOOUT_HPVOL_RSRVD5(v) \
1403 + (((v) << 29) & BM_AUDIOOUT_HPVOL_RSRVD5)
1404 +#define BM_AUDIOOUT_HPVOL_VOLUME_UPDATE_PENDING 0x10000000
1405 +#define BP_AUDIOOUT_HPVOL_RSRVD4 26
1406 +#define BM_AUDIOOUT_HPVOL_RSRVD4 0x0C000000
1407 +#define BF_AUDIOOUT_HPVOL_RSRVD4(v) \
1408 + (((v) << 26) & BM_AUDIOOUT_HPVOL_RSRVD4)
1409 +#define BM_AUDIOOUT_HPVOL_EN_MSTR_ZCD 0x02000000
1410 +#define BM_AUDIOOUT_HPVOL_MUTE 0x01000000
1411 +#define BP_AUDIOOUT_HPVOL_RSRVD3 17
1412 +#define BM_AUDIOOUT_HPVOL_RSRVD3 0x00FE0000
1413 +#define BF_AUDIOOUT_HPVOL_RSRVD3(v) \
1414 + (((v) << 17) & BM_AUDIOOUT_HPVOL_RSRVD3)
1415 +#define BM_AUDIOOUT_HPVOL_SELECT 0x00010000
1416 +#define BM_AUDIOOUT_HPVOL_RSRVD2 0x00008000
1417 +#define BP_AUDIOOUT_HPVOL_VOL_LEFT 8
1418 +#define BM_AUDIOOUT_HPVOL_VOL_LEFT 0x00007F00
1419 +#define BF_AUDIOOUT_HPVOL_VOL_LEFT(v) \
1420 + (((v) << 8) & BM_AUDIOOUT_HPVOL_VOL_LEFT)
1421 +#define BM_AUDIOOUT_HPVOL_RSRVD1 0x00000080
1422 +#define BP_AUDIOOUT_HPVOL_VOL_RIGHT 0
1423 +#define BM_AUDIOOUT_HPVOL_VOL_RIGHT 0x0000007F
1424 +#define BF_AUDIOOUT_HPVOL_VOL_RIGHT(v) \
1425 + (((v) << 0) & BM_AUDIOOUT_HPVOL_VOL_RIGHT)
1426 +
1427 +#define HW_AUDIOOUT_RESERVED (0x00000060)
1428 +#define HW_AUDIOOUT_RESERVED_SET (0x00000064)
1429 +#define HW_AUDIOOUT_RESERVED_CLR (0x00000068)
1430 +#define HW_AUDIOOUT_RESERVED_TOG (0x0000006c)
1431 +
1432 +#define BP_AUDIOOUT_RESERVED_RSRVD1 0
1433 +#define BM_AUDIOOUT_RESERVED_RSRVD1 0xFFFFFFFF
1434 +#define BF_AUDIOOUT_RESERVED_RSRVD1(v) (v)
1435 +
1436 +#define HW_AUDIOOUT_PWRDN (0x00000070)
1437 +#define HW_AUDIOOUT_PWRDN_SET (0x00000074)
1438 +#define HW_AUDIOOUT_PWRDN_CLR (0x00000078)
1439 +#define HW_AUDIOOUT_PWRDN_TOG (0x0000007c)
1440 +
1441 +#define BP_AUDIOOUT_PWRDN_RSRVD7 25
1442 +#define BM_AUDIOOUT_PWRDN_RSRVD7 0xFE000000
1443 +#define BF_AUDIOOUT_PWRDN_RSRVD7(v) \
1444 + (((v) << 25) & BM_AUDIOOUT_PWRDN_RSRVD7)
1445 +#define BM_AUDIOOUT_PWRDN_SPEAKER 0x01000000
1446 +#define BP_AUDIOOUT_PWRDN_RSRVD6 21
1447 +#define BM_AUDIOOUT_PWRDN_RSRVD6 0x00E00000
1448 +#define BF_AUDIOOUT_PWRDN_RSRVD6(v) \
1449 + (((v) << 21) & BM_AUDIOOUT_PWRDN_RSRVD6)
1450 +#define BM_AUDIOOUT_PWRDN_SELFBIAS 0x00100000
1451 +#define BP_AUDIOOUT_PWRDN_RSRVD5 17
1452 +#define BM_AUDIOOUT_PWRDN_RSRVD5 0x000E0000
1453 +#define BF_AUDIOOUT_PWRDN_RSRVD5(v) \
1454 + (((v) << 17) & BM_AUDIOOUT_PWRDN_RSRVD5)
1455 +#define BM_AUDIOOUT_PWRDN_RIGHT_ADC 0x00010000
1456 +#define BP_AUDIOOUT_PWRDN_RSRVD4 13
1457 +#define BM_AUDIOOUT_PWRDN_RSRVD4 0x0000E000
1458 +#define BF_AUDIOOUT_PWRDN_RSRVD4(v) \
1459 + (((v) << 13) & BM_AUDIOOUT_PWRDN_RSRVD4)
1460 +#define BM_AUDIOOUT_PWRDN_DAC 0x00001000
1461 +#define BP_AUDIOOUT_PWRDN_RSRVD3 9
1462 +#define BM_AUDIOOUT_PWRDN_RSRVD3 0x00000E00
1463 +#define BF_AUDIOOUT_PWRDN_RSRVD3(v) \
1464 + (((v) << 9) & BM_AUDIOOUT_PWRDN_RSRVD3)
1465 +#define BM_AUDIOOUT_PWRDN_ADC 0x00000100
1466 +#define BP_AUDIOOUT_PWRDN_RSRVD2 5
1467 +#define BM_AUDIOOUT_PWRDN_RSRVD2 0x000000E0
1468 +#define BF_AUDIOOUT_PWRDN_RSRVD2(v) \
1469 + (((v) << 5) & BM_AUDIOOUT_PWRDN_RSRVD2)
1470 +#define BM_AUDIOOUT_PWRDN_CAPLESS 0x00000010
1471 +#define BP_AUDIOOUT_PWRDN_RSRVD1 1
1472 +#define BM_AUDIOOUT_PWRDN_RSRVD1 0x0000000E
1473 +#define BF_AUDIOOUT_PWRDN_RSRVD1(v) \
1474 + (((v) << 1) & BM_AUDIOOUT_PWRDN_RSRVD1)
1475 +#define BM_AUDIOOUT_PWRDN_HEADPHONE 0x00000001
1476 +
1477 +#define HW_AUDIOOUT_REFCTRL (0x00000080)
1478 +#define HW_AUDIOOUT_REFCTRL_SET (0x00000084)
1479 +#define HW_AUDIOOUT_REFCTRL_CLR (0x00000088)
1480 +#define HW_AUDIOOUT_REFCTRL_TOG (0x0000008c)
1481 +
1482 +#define BP_AUDIOOUT_REFCTRL_RSRVD4 27
1483 +#define BM_AUDIOOUT_REFCTRL_RSRVD4 0xF8000000
1484 +#define BF_AUDIOOUT_REFCTRL_RSRVD4(v) \
1485 + (((v) << 27) & BM_AUDIOOUT_REFCTRL_RSRVD4)
1486 +#define BM_AUDIOOUT_REFCTRL_FASTSETTLING 0x04000000
1487 +#define BM_AUDIOOUT_REFCTRL_RAISE_REF 0x02000000
1488 +#define BM_AUDIOOUT_REFCTRL_XTAL_BGR_BIAS 0x01000000
1489 +#define BM_AUDIOOUT_REFCTRL_RSRVD3 0x00800000
1490 +#define BP_AUDIOOUT_REFCTRL_VBG_ADJ 20
1491 +#define BM_AUDIOOUT_REFCTRL_VBG_ADJ 0x00700000
1492 +#define BF_AUDIOOUT_REFCTRL_VBG_ADJ(v) \
1493 + (((v) << 20) & BM_AUDIOOUT_REFCTRL_VBG_ADJ)
1494 +#define BM_AUDIOOUT_REFCTRL_LOW_PWR 0x00080000
1495 +#define BM_AUDIOOUT_REFCTRL_LW_REF 0x00040000
1496 +#define BP_AUDIOOUT_REFCTRL_BIAS_CTRL 16
1497 +#define BM_AUDIOOUT_REFCTRL_BIAS_CTRL 0x00030000
1498 +#define BF_AUDIOOUT_REFCTRL_BIAS_CTRL(v) \
1499 + (((v) << 16) & BM_AUDIOOUT_REFCTRL_BIAS_CTRL)
1500 +#define BM_AUDIOOUT_REFCTRL_RSRVD2 0x00008000
1501 +#define BM_AUDIOOUT_REFCTRL_VDDXTAL_TO_VDDD 0x00004000
1502 +#define BM_AUDIOOUT_REFCTRL_ADJ_ADC 0x00002000
1503 +#define BM_AUDIOOUT_REFCTRL_ADJ_VAG 0x00001000
1504 +#define BP_AUDIOOUT_REFCTRL_ADC_REFVAL 8
1505 +#define BM_AUDIOOUT_REFCTRL_ADC_REFVAL 0x00000F00
1506 +#define BF_AUDIOOUT_REFCTRL_ADC_REFVAL(v) \
1507 + (((v) << 8) & BM_AUDIOOUT_REFCTRL_ADC_REFVAL)
1508 +#define BP_AUDIOOUT_REFCTRL_VAG_VAL 4
1509 +#define BM_AUDIOOUT_REFCTRL_VAG_VAL 0x000000F0
1510 +#define BF_AUDIOOUT_REFCTRL_VAG_VAL(v) \
1511 + (((v) << 4) & BM_AUDIOOUT_REFCTRL_VAG_VAL)
1512 +#define BM_AUDIOOUT_REFCTRL_RSRVD1 0x00000008
1513 +#define BP_AUDIOOUT_REFCTRL_DAC_ADJ 0
1514 +#define BM_AUDIOOUT_REFCTRL_DAC_ADJ 0x00000007
1515 +#define BF_AUDIOOUT_REFCTRL_DAC_ADJ(v) \
1516 + (((v) << 0) & BM_AUDIOOUT_REFCTRL_DAC_ADJ)
1517 +
1518 +#define HW_AUDIOOUT_ANACTRL (0x00000090)
1519 +#define HW_AUDIOOUT_ANACTRL_SET (0x00000094)
1520 +#define HW_AUDIOOUT_ANACTRL_CLR (0x00000098)
1521 +#define HW_AUDIOOUT_ANACTRL_TOG (0x0000009c)
1522 +
1523 +#define BP_AUDIOOUT_ANACTRL_RSRVD8 29
1524 +#define BM_AUDIOOUT_ANACTRL_RSRVD8 0xE0000000
1525 +#define BF_AUDIOOUT_ANACTRL_RSRVD8(v) \
1526 + (((v) << 29) & BM_AUDIOOUT_ANACTRL_RSRVD8)
1527 +#define BM_AUDIOOUT_ANACTRL_SHORT_CM_STS 0x10000000
1528 +#define BP_AUDIOOUT_ANACTRL_RSRVD7 25
1529 +#define BM_AUDIOOUT_ANACTRL_RSRVD7 0x0E000000
1530 +#define BF_AUDIOOUT_ANACTRL_RSRVD7(v) \
1531 + (((v) << 25) & BM_AUDIOOUT_ANACTRL_RSRVD7)
1532 +#define BM_AUDIOOUT_ANACTRL_SHORT_LR_STS 0x01000000
1533 +#define BP_AUDIOOUT_ANACTRL_RSRVD6 22
1534 +#define BM_AUDIOOUT_ANACTRL_RSRVD6 0x00C00000
1535 +#define BF_AUDIOOUT_ANACTRL_RSRVD6(v) \
1536 + (((v) << 22) & BM_AUDIOOUT_ANACTRL_RSRVD6)
1537 +#define BP_AUDIOOUT_ANACTRL_SHORTMODE_CM 20
1538 +#define BM_AUDIOOUT_ANACTRL_SHORTMODE_CM 0x00300000
1539 +#define BF_AUDIOOUT_ANACTRL_SHORTMODE_CM(v) \
1540 + (((v) << 20) & BM_AUDIOOUT_ANACTRL_SHORTMODE_CM)
1541 +#define BM_AUDIOOUT_ANACTRL_RSRVD5 0x00080000
1542 +#define BP_AUDIOOUT_ANACTRL_SHORTMODE_LR 17
1543 +#define BM_AUDIOOUT_ANACTRL_SHORTMODE_LR 0x00060000
1544 +#define BF_AUDIOOUT_ANACTRL_SHORTMODE_LR(v) \
1545 + (((v) << 17) & BM_AUDIOOUT_ANACTRL_SHORTMODE_LR)
1546 +#define BP_AUDIOOUT_ANACTRL_RSRVD4 15
1547 +#define BM_AUDIOOUT_ANACTRL_RSRVD4 0x00018000
1548 +#define BF_AUDIOOUT_ANACTRL_RSRVD4(v) \
1549 + (((v) << 15) & BM_AUDIOOUT_ANACTRL_RSRVD4)
1550 +#define BP_AUDIOOUT_ANACTRL_SHORT_LVLADJL 12
1551 +#define BM_AUDIOOUT_ANACTRL_SHORT_LVLADJL 0x00007000
1552 +#define BF_AUDIOOUT_ANACTRL_SHORT_LVLADJL(v) \
1553 + (((v) << 12) & BM_AUDIOOUT_ANACTRL_SHORT_LVLADJL)
1554 +#define BM_AUDIOOUT_ANACTRL_RSRVD3 0x00000800
1555 +#define BP_AUDIOOUT_ANACTRL_SHORT_LVLADJR 8
1556 +#define BM_AUDIOOUT_ANACTRL_SHORT_LVLADJR 0x00000700
1557 +#define BF_AUDIOOUT_ANACTRL_SHORT_LVLADJR(v) \
1558 + (((v) << 8) & BM_AUDIOOUT_ANACTRL_SHORT_LVLADJR)
1559 +#define BP_AUDIOOUT_ANACTRL_RSRVD2 6
1560 +#define BM_AUDIOOUT_ANACTRL_RSRVD2 0x000000C0
1561 +#define BF_AUDIOOUT_ANACTRL_RSRVD2(v) \
1562 + (((v) << 6) & BM_AUDIOOUT_ANACTRL_RSRVD2)
1563 +#define BM_AUDIOOUT_ANACTRL_HP_HOLD_GND 0x00000020
1564 +#define BM_AUDIOOUT_ANACTRL_HP_CLASSAB 0x00000010
1565 +#define BP_AUDIOOUT_ANACTRL_RSRVD1 0
1566 +#define BM_AUDIOOUT_ANACTRL_RSRVD1 0x0000000F
1567 +#define BF_AUDIOOUT_ANACTRL_RSRVD1(v) \
1568 + (((v) << 0) & BM_AUDIOOUT_ANACTRL_RSRVD1)
1569 +
1570 +#define HW_AUDIOOUT_TEST (0x000000a0)
1571 +#define HW_AUDIOOUT_TEST_SET (0x000000a4)
1572 +#define HW_AUDIOOUT_TEST_CLR (0x000000a8)
1573 +#define HW_AUDIOOUT_TEST_TOG (0x000000ac)
1574 +
1575 +#define BM_AUDIOOUT_TEST_RSRVD4 0x80000000
1576 +#define BP_AUDIOOUT_TEST_HP_ANTIPOP 28
1577 +#define BM_AUDIOOUT_TEST_HP_ANTIPOP 0x70000000
1578 +#define BF_AUDIOOUT_TEST_HP_ANTIPOP(v) \
1579 + (((v) << 28) & BM_AUDIOOUT_TEST_HP_ANTIPOP)
1580 +#define BM_AUDIOOUT_TEST_RSRVD3 0x08000000
1581 +#define BM_AUDIOOUT_TEST_TM_ADCIN_TOHP 0x04000000
1582 +#define BM_AUDIOOUT_TEST_TM_LOOP 0x02000000
1583 +#define BM_AUDIOOUT_TEST_TM_HPCOMMON 0x01000000
1584 +#define BP_AUDIOOUT_TEST_HP_I1_ADJ 22
1585 +#define BM_AUDIOOUT_TEST_HP_I1_ADJ 0x00C00000
1586 +#define BF_AUDIOOUT_TEST_HP_I1_ADJ(v) \
1587 + (((v) << 22) & BM_AUDIOOUT_TEST_HP_I1_ADJ)
1588 +#define BP_AUDIOOUT_TEST_HP_IALL_ADJ 20
1589 +#define BM_AUDIOOUT_TEST_HP_IALL_ADJ 0x00300000
1590 +#define BF_AUDIOOUT_TEST_HP_IALL_ADJ(v) \
1591 + (((v) << 20) & BM_AUDIOOUT_TEST_HP_IALL_ADJ)
1592 +#define BP_AUDIOOUT_TEST_RSRVD2 14
1593 +#define BM_AUDIOOUT_TEST_RSRVD2 0x000FC000
1594 +#define BF_AUDIOOUT_TEST_RSRVD2(v) \
1595 + (((v) << 14) & BM_AUDIOOUT_TEST_RSRVD2)
1596 +#define BM_AUDIOOUT_TEST_VAG_CLASSA 0x00002000
1597 +#define BM_AUDIOOUT_TEST_VAG_DOUBLE_I 0x00001000
1598 +#define BP_AUDIOOUT_TEST_RSRVD1 4
1599 +#define BM_AUDIOOUT_TEST_RSRVD1 0x00000FF0
1600 +#define BF_AUDIOOUT_TEST_RSRVD1(v) \
1601 + (((v) << 4) & BM_AUDIOOUT_TEST_RSRVD1)
1602 +#define BM_AUDIOOUT_TEST_ADCTODAC_LOOP 0x00000008
1603 +#define BM_AUDIOOUT_TEST_DAC_CLASSA 0x00000004
1604 +#define BM_AUDIOOUT_TEST_DAC_DOUBLE_I 0x00000002
1605 +#define BM_AUDIOOUT_TEST_DAC_DIS_RTZ 0x00000001
1606 +
1607 +#define HW_AUDIOOUT_BISTCTRL (0x000000b0)
1608 +#define HW_AUDIOOUT_BISTCTRL_SET (0x000000b4)
1609 +#define HW_AUDIOOUT_BISTCTRL_CLR (0x000000b8)
1610 +#define HW_AUDIOOUT_BISTCTRL_TOG (0x000000bc)
1611 +
1612 +#define BP_AUDIOOUT_BISTCTRL_RSVD0 4
1613 +#define BM_AUDIOOUT_BISTCTRL_RSVD0 0xFFFFFFF0
1614 +#define BF_AUDIOOUT_BISTCTRL_RSVD0(v) \
1615 + (((v) << 4) & BM_AUDIOOUT_BISTCTRL_RSVD0)
1616 +#define BM_AUDIOOUT_BISTCTRL_FAIL 0x00000008
1617 +#define BM_AUDIOOUT_BISTCTRL_PASS 0x00000004
1618 +#define BM_AUDIOOUT_BISTCTRL_DONE 0x00000002
1619 +#define BM_AUDIOOUT_BISTCTRL_START 0x00000001
1620 +
1621 +#define HW_AUDIOOUT_BISTSTAT0 (0x000000c0)
1622 +#define HW_AUDIOOUT_BISTSTAT0_SET (0x000000c4)
1623 +#define HW_AUDIOOUT_BISTSTAT0_CLR (0x000000c8)
1624 +#define HW_AUDIOOUT_BISTSTAT0_TOG (0x000000cc)
1625 +
1626 +#define BP_AUDIOOUT_BISTSTAT0_RSVD0 24
1627 +#define BM_AUDIOOUT_BISTSTAT0_RSVD0 0xFF000000
1628 +#define BF_AUDIOOUT_BISTSTAT0_RSVD0(v) \
1629 + (((v) << 24) & BM_AUDIOOUT_BISTSTAT0_RSVD0)
1630 +#define BP_AUDIOOUT_BISTSTAT0_DATA 0
1631 +#define BM_AUDIOOUT_BISTSTAT0_DATA 0x00FFFFFF
1632 +#define BF_AUDIOOUT_BISTSTAT0_DATA(v) \
1633 + (((v) << 0) & BM_AUDIOOUT_BISTSTAT0_DATA)
1634 +
1635 +#define HW_AUDIOOUT_BISTSTAT1 (0x000000d0)
1636 +#define HW_AUDIOOUT_BISTSTAT1_SET (0x000000d4)
1637 +#define HW_AUDIOOUT_BISTSTAT1_CLR (0x000000d8)
1638 +#define HW_AUDIOOUT_BISTSTAT1_TOG (0x000000dc)
1639 +
1640 +#define BP_AUDIOOUT_BISTSTAT1_RSVD1 29
1641 +#define BM_AUDIOOUT_BISTSTAT1_RSVD1 0xE0000000
1642 +#define BF_AUDIOOUT_BISTSTAT1_RSVD1(v) \
1643 + (((v) << 29) & BM_AUDIOOUT_BISTSTAT1_RSVD1)
1644 +#define BP_AUDIOOUT_BISTSTAT1_STATE 24
1645 +#define BM_AUDIOOUT_BISTSTAT1_STATE 0x1F000000
1646 +#define BF_AUDIOOUT_BISTSTAT1_STATE(v) \
1647 + (((v) << 24) & BM_AUDIOOUT_BISTSTAT1_STATE)
1648 +#define BP_AUDIOOUT_BISTSTAT1_RSVD0 8
1649 +#define BM_AUDIOOUT_BISTSTAT1_RSVD0 0x00FFFF00
1650 +#define BF_AUDIOOUT_BISTSTAT1_RSVD0(v) \
1651 + (((v) << 8) & BM_AUDIOOUT_BISTSTAT1_RSVD0)
1652 +#define BP_AUDIOOUT_BISTSTAT1_ADDR 0
1653 +#define BM_AUDIOOUT_BISTSTAT1_ADDR 0x000000FF
1654 +#define BF_AUDIOOUT_BISTSTAT1_ADDR(v) \
1655 + (((v) << 0) & BM_AUDIOOUT_BISTSTAT1_ADDR)
1656 +
1657 +#define HW_AUDIOOUT_ANACLKCTRL (0x000000e0)
1658 +#define HW_AUDIOOUT_ANACLKCTRL_SET (0x000000e4)
1659 +#define HW_AUDIOOUT_ANACLKCTRL_CLR (0x000000e8)
1660 +#define HW_AUDIOOUT_ANACLKCTRL_TOG (0x000000ec)
1661 +
1662 +#define BM_AUDIOOUT_ANACLKCTRL_CLKGATE 0x80000000
1663 +#define BP_AUDIOOUT_ANACLKCTRL_RSRVD3 5
1664 +#define BM_AUDIOOUT_ANACLKCTRL_RSRVD3 0x7FFFFFE0
1665 +#define BF_AUDIOOUT_ANACLKCTRL_RSRVD3(v) \
1666 + (((v) << 5) & BM_AUDIOOUT_ANACLKCTRL_RSRVD3)
1667 +#define BM_AUDIOOUT_ANACLKCTRL_INVERT_DACCLK 0x00000010
1668 +#define BM_AUDIOOUT_ANACLKCTRL_RSRVD2 0x00000008
1669 +#define BP_AUDIOOUT_ANACLKCTRL_DACDIV 0
1670 +#define BM_AUDIOOUT_ANACLKCTRL_DACDIV 0x00000007
1671 +#define BF_AUDIOOUT_ANACLKCTRL_DACDIV(v) \
1672 + (((v) << 0) & BM_AUDIOOUT_ANACLKCTRL_DACDIV)
1673 +
1674 +#define HW_AUDIOOUT_DATA (0x000000f0)
1675 +#define HW_AUDIOOUT_DATA_SET (0x000000f4)
1676 +#define HW_AUDIOOUT_DATA_CLR (0x000000f8)
1677 +#define HW_AUDIOOUT_DATA_TOG (0x000000fc)
1678 +
1679 +#define BP_AUDIOOUT_DATA_HIGH 16
1680 +#define BM_AUDIOOUT_DATA_HIGH 0xFFFF0000
1681 +#define BF_AUDIOOUT_DATA_HIGH(v) \
1682 + (((v) << 16) & BM_AUDIOOUT_DATA_HIGH)
1683 +#define BP_AUDIOOUT_DATA_LOW 0
1684 +#define BM_AUDIOOUT_DATA_LOW 0x0000FFFF
1685 +#define BF_AUDIOOUT_DATA_LOW(v) \
1686 + (((v) << 0) & BM_AUDIOOUT_DATA_LOW)
1687 +
1688 +#define HW_AUDIOOUT_SPEAKERCTRL (0x00000100)
1689 +#define HW_AUDIOOUT_SPEAKERCTRL_SET (0x00000104)
1690 +#define HW_AUDIOOUT_SPEAKERCTRL_CLR (0x00000108)
1691 +#define HW_AUDIOOUT_SPEAKERCTRL_TOG (0x0000010c)
1692 +
1693 +#define BP_AUDIOOUT_SPEAKERCTRL_RSRVD2 25
1694 +#define BM_AUDIOOUT_SPEAKERCTRL_RSRVD2 0xFE000000
1695 +#define BF_AUDIOOUT_SPEAKERCTRL_RSRVD2(v) \
1696 + (((v) << 25) & BM_AUDIOOUT_SPEAKERCTRL_RSRVD2)
1697 +#define BM_AUDIOOUT_SPEAKERCTRL_MUTE 0x01000000
1698 +#define BP_AUDIOOUT_SPEAKERCTRL_I1_ADJ 22
1699 +#define BM_AUDIOOUT_SPEAKERCTRL_I1_ADJ 0x00C00000
1700 +#define BF_AUDIOOUT_SPEAKERCTRL_I1_ADJ(v) \
1701 + (((v) << 22) & BM_AUDIOOUT_SPEAKERCTRL_I1_ADJ)
1702 +#define BP_AUDIOOUT_SPEAKERCTRL_IALL_ADJ 20
1703 +#define BM_AUDIOOUT_SPEAKERCTRL_IALL_ADJ 0x00300000
1704 +#define BF_AUDIOOUT_SPEAKERCTRL_IALL_ADJ(v) \
1705 + (((v) << 20) & BM_AUDIOOUT_SPEAKERCTRL_IALL_ADJ)
1706 +#define BP_AUDIOOUT_SPEAKERCTRL_RSRVD1 16
1707 +#define BM_AUDIOOUT_SPEAKERCTRL_RSRVD1 0x000F0000
1708 +#define BF_AUDIOOUT_SPEAKERCTRL_RSRVD1(v) \
1709 + (((v) << 16) & BM_AUDIOOUT_SPEAKERCTRL_RSRVD1)
1710 +#define BP_AUDIOOUT_SPEAKERCTRL_POSDRIVER 14
1711 +#define BM_AUDIOOUT_SPEAKERCTRL_POSDRIVER 0x0000C000
1712 +#define BF_AUDIOOUT_SPEAKERCTRL_POSDRIVER(v) \
1713 + (((v) << 14) & BM_AUDIOOUT_SPEAKERCTRL_POSDRIVER)
1714 +#define BP_AUDIOOUT_SPEAKERCTRL_NEGDRIVER 12
1715 +#define BM_AUDIOOUT_SPEAKERCTRL_NEGDRIVER 0x00003000
1716 +#define BF_AUDIOOUT_SPEAKERCTRL_NEGDRIVER(v) \
1717 + (((v) << 12) & BM_AUDIOOUT_SPEAKERCTRL_NEGDRIVER)
1718 +#define BP_AUDIOOUT_SPEAKERCTRL_RSRVD0 0
1719 +#define BM_AUDIOOUT_SPEAKERCTRL_RSRVD0 0x00000FFF
1720 +#define BF_AUDIOOUT_SPEAKERCTRL_RSRVD0(v) \
1721 + (((v) << 0) & BM_AUDIOOUT_SPEAKERCTRL_RSRVD0)
1722 +
1723 +#define HW_AUDIOOUT_VERSION (0x00000200)
1724 +
1725 +#define BP_AUDIOOUT_VERSION_MAJOR 24
1726 +#define BM_AUDIOOUT_VERSION_MAJOR 0xFF000000
1727 +#define BF_AUDIOOUT_VERSION_MAJOR(v) \
1728 + (((v) << 24) & BM_AUDIOOUT_VERSION_MAJOR)
1729 +#define BP_AUDIOOUT_VERSION_MINOR 16
1730 +#define BM_AUDIOOUT_VERSION_MINOR 0x00FF0000
1731 +#define BF_AUDIOOUT_VERSION_MINOR(v) \
1732 + (((v) << 16) & BM_AUDIOOUT_VERSION_MINOR)
1733 +#define BP_AUDIOOUT_VERSION_STEP 0
1734 +#define BM_AUDIOOUT_VERSION_STEP 0x0000FFFF
1735 +#define BF_AUDIOOUT_VERSION_STEP(v) \
1736 + (((v) << 0) & BM_AUDIOOUT_VERSION_STEP)
1737 +
1738 +/* AUDIOIN */
1739 +#define HW_AUDIOIN_CTRL (0x00000000)
1740 +#define HW_AUDIOIN_CTRL_SET (0x00000004)
1741 +#define HW_AUDIOIN_CTRL_CLR (0x00000008)
1742 +#define HW_AUDIOIN_CTRL_TOG (0x0000000c)
1743 +
1744 +#define BM_AUDIOIN_CTRL_SFTRST 0x80000000
1745 +#define BM_AUDIOIN_CTRL_CLKGATE 0x40000000
1746 +#define BP_AUDIOIN_CTRL_RSRVD3 21
1747 +#define BM_AUDIOIN_CTRL_RSRVD3 0x3FE00000
1748 +#define BF_AUDIOIN_CTRL_RSRVD3(v) \
1749 + (((v) << 21) & BM_AUDIOIN_CTRL_RSRVD3)
1750 +#define BP_AUDIOIN_CTRL_DMAWAIT_COUNT 16
1751 +#define BM_AUDIOIN_CTRL_DMAWAIT_COUNT 0x001F0000
1752 +#define BF_AUDIOIN_CTRL_DMAWAIT_COUNT(v) \
1753 + (((v) << 16) & BM_AUDIOIN_CTRL_DMAWAIT_COUNT)
1754 +#define BP_AUDIOIN_CTRL_RSRVD1 11
1755 +#define BM_AUDIOIN_CTRL_RSRVD1 0x0000F800
1756 +#define BF_AUDIOIN_CTRL_RSRVD1(v) \
1757 + (((v) << 11) & BM_AUDIOIN_CTRL_RSRVD1)
1758 +#define BM_AUDIOIN_CTRL_LR_SWAP 0x00000400
1759 +#define BM_AUDIOIN_CTRL_EDGE_SYNC 0x00000200
1760 +#define BM_AUDIOIN_CTRL_INVERT_1BIT 0x00000100
1761 +#define BM_AUDIOIN_CTRL_OFFSET_ENABLE 0x00000080
1762 +#define BM_AUDIOIN_CTRL_HPF_ENABLE 0x00000040
1763 +#define BM_AUDIOIN_CTRL_WORD_LENGTH 0x00000020
1764 +#define BM_AUDIOIN_CTRL_LOOPBACK 0x00000010
1765 +#define BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ 0x00000008
1766 +#define BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ 0x00000004
1767 +#define BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN 0x00000002
1768 +#define BM_AUDIOIN_CTRL_RUN 0x00000001
1769 +
1770 +#define HW_AUDIOIN_STAT (0x00000010)
1771 +#define HW_AUDIOIN_STAT_SET (0x00000014)
1772 +#define HW_AUDIOIN_STAT_CLR (0x00000018)
1773 +#define HW_AUDIOIN_STAT_TOG (0x0000001c)
1774 +
1775 +#define BM_AUDIOIN_STAT_ADC_PRESENT 0x80000000
1776 +#define BP_AUDIOIN_STAT_RSRVD3 0
1777 +#define BM_AUDIOIN_STAT_RSRVD3 0x7FFFFFFF
1778 +#define BF_AUDIOIN_STAT_RSRVD3(v) \
1779 + (((v) << 0) & BM_AUDIOIN_STAT_RSRVD3)
1780 +
1781 +#define HW_AUDIOIN_ADCSRR (0x00000020)
1782 +#define HW_AUDIOIN_ADCSRR_SET (0x00000024)
1783 +#define HW_AUDIOIN_ADCSRR_CLR (0x00000028)
1784 +#define HW_AUDIOIN_ADCSRR_TOG (0x0000002c)
1785 +
1786 +#define BM_AUDIOIN_ADCSRR_OSR 0x80000000
1787 +#define BV_AUDIOIN_ADCSRR_OSR__OSR6 0x0
1788 +#define BV_AUDIOIN_ADCSRR_OSR__OSR12 0x1
1789 +#define BP_AUDIOIN_ADCSRR_BASEMULT 28
1790 +#define BM_AUDIOIN_ADCSRR_BASEMULT 0x70000000
1791 +#define BF_AUDIOIN_ADCSRR_BASEMULT(v) \
1792 + (((v) << 28) & BM_AUDIOIN_ADCSRR_BASEMULT)
1793 +#define BV_AUDIOIN_ADCSRR_BASEMULT__SINGLE_RATE 0x1
1794 +#define BV_AUDIOIN_ADCSRR_BASEMULT__DOUBLE_RATE 0x2
1795 +#define BV_AUDIOIN_ADCSRR_BASEMULT__QUAD_RATE 0x4
1796 +#define BM_AUDIOIN_ADCSRR_RSRVD2 0x08000000
1797 +#define BP_AUDIOIN_ADCSRR_SRC_HOLD 24
1798 +#define BM_AUDIOIN_ADCSRR_SRC_HOLD 0x07000000
1799 +#define BF_AUDIOIN_ADCSRR_SRC_HOLD(v) \
1800 + (((v) << 24) & BM_AUDIOIN_ADCSRR_SRC_HOLD)
1801 +#define BP_AUDIOIN_ADCSRR_RSRVD1 21
1802 +#define BM_AUDIOIN_ADCSRR_RSRVD1 0x00E00000
1803 +#define BF_AUDIOIN_ADCSRR_RSRVD1(v) \
1804 + (((v) << 21) & BM_AUDIOIN_ADCSRR_RSRVD1)
1805 +#define BP_AUDIOIN_ADCSRR_SRC_INT 16
1806 +#define BM_AUDIOIN_ADCSRR_SRC_INT 0x001F0000
1807 +#define BF_AUDIOIN_ADCSRR_SRC_INT(v) \
1808 + (((v) << 16) & BM_AUDIOIN_ADCSRR_SRC_INT)
1809 +#define BP_AUDIOIN_ADCSRR_RSRVD0 13
1810 +#define BM_AUDIOIN_ADCSRR_RSRVD0 0x0000E000
1811 +#define BF_AUDIOIN_ADCSRR_RSRVD0(v) \
1812 + (((v) << 13) & BM_AUDIOIN_ADCSRR_RSRVD0)
1813 +#define BP_AUDIOIN_ADCSRR_SRC_FRAC 0
1814 +#define BM_AUDIOIN_ADCSRR_SRC_FRAC 0x00001FFF
1815 +#define BF_AUDIOIN_ADCSRR_SRC_FRAC(v) \
1816 + (((v) << 0) & BM_AUDIOIN_ADCSRR_SRC_FRAC)
1817 +
1818 +#define HW_AUDIOIN_ADCVOLUME (0x00000030)
1819 +#define HW_AUDIOIN_ADCVOLUME_SET (0x00000034)
1820 +#define HW_AUDIOIN_ADCVOLUME_CLR (0x00000038)
1821 +#define HW_AUDIOIN_ADCVOLUME_TOG (0x0000003c)
1822 +
1823 +#define BP_AUDIOIN_ADCVOLUME_RSRVD5 29
1824 +#define BM_AUDIOIN_ADCVOLUME_RSRVD5 0xE0000000
1825 +#define BF_AUDIOIN_ADCVOLUME_RSRVD5(v) \
1826 + (((v) << 29) & BM_AUDIOIN_ADCVOLUME_RSRVD5)
1827 +#define BM_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_LEFT 0x10000000
1828 +#define BP_AUDIOIN_ADCVOLUME_RSRVD4 26
1829 +#define BM_AUDIOIN_ADCVOLUME_RSRVD4 0x0C000000
1830 +#define BF_AUDIOIN_ADCVOLUME_RSRVD4(v) \
1831 + (((v) << 26) & BM_AUDIOIN_ADCVOLUME_RSRVD4)
1832 +#define BM_AUDIOIN_ADCVOLUME_EN_ZCD 0x02000000
1833 +#define BM_AUDIOIN_ADCVOLUME_RSRVD3 0x01000000
1834 +#define BP_AUDIOIN_ADCVOLUME_VOLUME_LEFT 16
1835 +#define BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT 0x00FF0000
1836 +#define BF_AUDIOIN_ADCVOLUME_VOLUME_LEFT(v) \
1837 + (((v) << 16) & BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT)
1838 +#define BP_AUDIOIN_ADCVOLUME_RSRVD2 13
1839 +#define BM_AUDIOIN_ADCVOLUME_RSRVD2 0x0000E000
1840 +#define BF_AUDIOIN_ADCVOLUME_RSRVD2(v) \
1841 + (((v) << 13) & BM_AUDIOIN_ADCVOLUME_RSRVD2)
1842 +#define BM_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_RIGHT 0x00001000
1843 +#define BP_AUDIOIN_ADCVOLUME_RSRVD1 8
1844 +#define BM_AUDIOIN_ADCVOLUME_RSRVD1 0x00000F00
1845 +#define BF_AUDIOIN_ADCVOLUME_RSRVD1(v) \
1846 + (((v) << 8) & BM_AUDIOIN_ADCVOLUME_RSRVD1)
1847 +#define BP_AUDIOIN_ADCVOLUME_VOLUME_RIGHT 0
1848 +#define BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT 0x000000FF
1849 +#define BF_AUDIOIN_ADCVOLUME_VOLUME_RIGHT(v) \
1850 + (((v) << 0) & BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT)
1851 +
1852 +#define HW_AUDIOIN_ADCDEBUG (0x00000040)
1853 +#define HW_AUDIOIN_ADCDEBUG_SET (0x00000044)
1854 +#define HW_AUDIOIN_ADCDEBUG_CLR (0x00000048)
1855 +#define HW_AUDIOIN_ADCDEBUG_TOG (0x0000004c)
1856 +
1857 +#define BM_AUDIOIN_ADCDEBUG_ENABLE_ADCDMA 0x80000000
1858 +#define BP_AUDIOIN_ADCDEBUG_RSRVD1 4
1859 +#define BM_AUDIOIN_ADCDEBUG_RSRVD1 0x7FFFFFF0
1860 +#define BF_AUDIOIN_ADCDEBUG_RSRVD1(v) \
1861 + (((v) << 4) & BM_AUDIOIN_ADCDEBUG_RSRVD1)
1862 +#define BM_AUDIOIN_ADCDEBUG_ADC_DMA_REQ_HAND_SHAKE_CLK_CROSS 0x00000008
1863 +#define BM_AUDIOIN_ADCDEBUG_SET_INTERRUPT3_HAND_SHAKE 0x00000004
1864 +#define BM_AUDIOIN_ADCDEBUG_DMA_PREQ 0x00000002
1865 +#define BM_AUDIOIN_ADCDEBUG_FIFO_STATUS 0x00000001
1866 +
1867 +#define HW_AUDIOIN_ADCVOL (0x00000050)
1868 +#define HW_AUDIOIN_ADCVOL_SET (0x00000054)
1869 +#define HW_AUDIOIN_ADCVOL_CLR (0x00000058)
1870 +#define HW_AUDIOIN_ADCVOL_TOG (0x0000005c)
1871 +
1872 +#define BP_AUDIOIN_ADCVOL_RSRVD4 29
1873 +#define BM_AUDIOIN_ADCVOL_RSRVD4 0xE0000000
1874 +#define BF_AUDIOIN_ADCVOL_RSRVD4(v) \
1875 + (((v) << 29) & BM_AUDIOIN_ADCVOL_RSRVD4)
1876 +#define BM_AUDIOIN_ADCVOL_VOLUME_UPDATE_PENDING 0x10000000
1877 +#define BP_AUDIOIN_ADCVOL_RSRVD3 26
1878 +#define BM_AUDIOIN_ADCVOL_RSRVD3 0x0C000000
1879 +#define BF_AUDIOIN_ADCVOL_RSRVD3(v) \
1880 + (((v) << 26) & BM_AUDIOIN_ADCVOL_RSRVD3)
1881 +#define BM_AUDIOIN_ADCVOL_EN_ADC_ZCD 0x02000000
1882 +#define BM_AUDIOIN_ADCVOL_MUTE 0x01000000
1883 +#define BP_AUDIOIN_ADCVOL_RSRVD2 14
1884 +#define BM_AUDIOIN_ADCVOL_RSRVD2 0x00FFC000
1885 +#define BF_AUDIOIN_ADCVOL_RSRVD2(v) \
1886 + (((v) << 14) & BM_AUDIOIN_ADCVOL_RSRVD2)
1887 +#define BP_AUDIOIN_ADCVOL_SELECT_LEFT 12
1888 +#define BM_AUDIOIN_ADCVOL_SELECT_LEFT 0x00003000
1889 +#define BF_AUDIOIN_ADCVOL_SELECT_LEFT(v) \
1890 + (((v) << 12) & BM_AUDIOIN_ADCVOL_SELECT_LEFT)
1891 +#define BP_AUDIOIN_ADCVOL_GAIN_LEFT 8
1892 +#define BM_AUDIOIN_ADCVOL_GAIN_LEFT 0x00000F00
1893 +#define BF_AUDIOIN_ADCVOL_GAIN_LEFT(v) \
1894 + (((v) << 8) & BM_AUDIOIN_ADCVOL_GAIN_LEFT)
1895 +#define BP_AUDIOIN_ADCVOL_RSRVD1 6
1896 +#define BM_AUDIOIN_ADCVOL_RSRVD1 0x000000C0
1897 +#define BF_AUDIOIN_ADCVOL_RSRVD1(v) \
1898 + (((v) << 6) & BM_AUDIOIN_ADCVOL_RSRVD1)
1899 +#define BP_AUDIOIN_ADCVOL_SELECT_RIGHT 4
1900 +#define BM_AUDIOIN_ADCVOL_SELECT_RIGHT 0x00000030
1901 +#define BF_AUDIOIN_ADCVOL_SELECT_RIGHT(v) \
1902 + (((v) << 4) & BM_AUDIOIN_ADCVOL_SELECT_RIGHT)
1903 +#define BP_AUDIOIN_ADCVOL_GAIN_RIGHT 0
1904 +#define BM_AUDIOIN_ADCVOL_GAIN_RIGHT 0x0000000F
1905 +#define BF_AUDIOIN_ADCVOL_GAIN_RIGHT(v) \
1906 + (((v) << 0) & BM_AUDIOIN_ADCVOL_GAIN_RIGHT)
1907 +
1908 +#define HW_AUDIOIN_MICLINE (0x00000060)
1909 +#define HW_AUDIOIN_MICLINE_SET (0x00000064)
1910 +#define HW_AUDIOIN_MICLINE_CLR (0x00000068)
1911 +#define HW_AUDIOIN_MICLINE_TOG (0x0000006c)
1912 +
1913 +#define BP_AUDIOIN_MICLINE_RSRVD6 30
1914 +#define BM_AUDIOIN_MICLINE_RSRVD6 0xC0000000
1915 +#define BF_AUDIOIN_MICLINE_RSRVD6(v) \
1916 + (((v) << 30) & BM_AUDIOIN_MICLINE_RSRVD6)
1917 +#define BM_AUDIOIN_MICLINE_DIVIDE_LINE1 0x20000000
1918 +#define BM_AUDIOIN_MICLINE_DIVIDE_LINE2 0x10000000
1919 +#define BP_AUDIOIN_MICLINE_RSRVD5 25
1920 +#define BM_AUDIOIN_MICLINE_RSRVD5 0x0E000000
1921 +#define BF_AUDIOIN_MICLINE_RSRVD5(v) \
1922 + (((v) << 25) & BM_AUDIOIN_MICLINE_RSRVD5)
1923 +#define BM_AUDIOIN_MICLINE_MIC_SELECT 0x01000000
1924 +#define BP_AUDIOIN_MICLINE_RSRVD4 22
1925 +#define BM_AUDIOIN_MICLINE_RSRVD4 0x00C00000
1926 +#define BF_AUDIOIN_MICLINE_RSRVD4(v) \
1927 + (((v) << 22) & BM_AUDIOIN_MICLINE_RSRVD4)
1928 +#define BP_AUDIOIN_MICLINE_MIC_RESISTOR 20
1929 +#define BM_AUDIOIN_MICLINE_MIC_RESISTOR 0x00300000
1930 +#define BF_AUDIOIN_MICLINE_MIC_RESISTOR(v) \
1931 + (((v) << 20) & BM_AUDIOIN_MICLINE_MIC_RESISTOR)
1932 +#define BM_AUDIOIN_MICLINE_RSRVD3 0x00080000
1933 +#define BP_AUDIOIN_MICLINE_MIC_BIAS 16
1934 +#define BM_AUDIOIN_MICLINE_MIC_BIAS 0x00070000
1935 +#define BF_AUDIOIN_MICLINE_MIC_BIAS(v) \
1936 + (((v) << 16) & BM_AUDIOIN_MICLINE_MIC_BIAS)
1937 +#define BP_AUDIOIN_MICLINE_RSRVD2 6
1938 +#define BM_AUDIOIN_MICLINE_RSRVD2 0x0000FFC0
1939 +#define BF_AUDIOIN_MICLINE_RSRVD2(v) \
1940 + (((v) << 6) & BM_AUDIOIN_MICLINE_RSRVD2)
1941 +#define BP_AUDIOIN_MICLINE_MIC_CHOPCLK 4
1942 +#define BM_AUDIOIN_MICLINE_MIC_CHOPCLK 0x00000030
1943 +#define BF_AUDIOIN_MICLINE_MIC_CHOPCLK(v) \
1944 + (((v) << 4) & BM_AUDIOIN_MICLINE_MIC_CHOPCLK)
1945 +#define BP_AUDIOIN_MICLINE_RSRVD1 2
1946 +#define BM_AUDIOIN_MICLINE_RSRVD1 0x0000000C
1947 +#define BF_AUDIOIN_MICLINE_RSRVD1(v) \
1948 + (((v) << 2) & BM_AUDIOIN_MICLINE_RSRVD1)
1949 +#define BP_AUDIOIN_MICLINE_MIC_GAIN 0
1950 +#define BM_AUDIOIN_MICLINE_MIC_GAIN 0x00000003
1951 +#define BF_AUDIOIN_MICLINE_MIC_GAIN(v) \
1952 + (((v) << 0) & BM_AUDIOIN_MICLINE_MIC_GAIN)
1953 +
1954 +#define HW_AUDIOIN_ANACLKCTRL (0x00000070)
1955 +#define HW_AUDIOIN_ANACLKCTRL_SET (0x00000074)
1956 +#define HW_AUDIOIN_ANACLKCTRL_CLR (0x00000078)
1957 +#define HW_AUDIOIN_ANACLKCTRL_TOG (0x0000007c)
1958 +
1959 +#define BM_AUDIOIN_ANACLKCTRL_CLKGATE 0x80000000
1960 +#define BP_AUDIOIN_ANACLKCTRL_RSRVD4 11
1961 +#define BM_AUDIOIN_ANACLKCTRL_RSRVD4 0x7FFFF800
1962 +#define BF_AUDIOIN_ANACLKCTRL_RSRVD4(v) \
1963 + (((v) << 11) & BM_AUDIOIN_ANACLKCTRL_RSRVD4)
1964 +#define BM_AUDIOIN_ANACLKCTRL_DITHER_OFF 0x00000400
1965 +#define BM_AUDIOIN_ANACLKCTRL_SLOW_DITHER 0x00000200
1966 +#define BM_AUDIOIN_ANACLKCTRL_INVERT_ADCCLK 0x00000100
1967 +#define BP_AUDIOIN_ANACLKCTRL_RSRVD3 6
1968 +#define BM_AUDIOIN_ANACLKCTRL_RSRVD3 0x000000C0
1969 +#define BF_AUDIOIN_ANACLKCTRL_RSRVD3(v) \
1970 + (((v) << 6) & BM_AUDIOIN_ANACLKCTRL_RSRVD3)
1971 +#define BP_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT 4
1972 +#define BM_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT 0x00000030
1973 +#define BF_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT(v) \
1974 + (((v) << 4) & BM_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT)
1975 +#define BM_AUDIOIN_ANACLKCTRL_RSRVD2 0x00000008
1976 +#define BP_AUDIOIN_ANACLKCTRL_ADCDIV 0
1977 +#define BM_AUDIOIN_ANACLKCTRL_ADCDIV 0x00000007
1978 +#define BF_AUDIOIN_ANACLKCTRL_ADCDIV(v) \
1979 + (((v) << 0) & BM_AUDIOIN_ANACLKCTRL_ADCDIV)
1980 +
1981 +#define HW_AUDIOIN_DATA (0x00000080)
1982 +#define HW_AUDIOIN_DATA_SET (0x00000084)
1983 +#define HW_AUDIOIN_DATA_CLR (0x00000088)
1984 +#define HW_AUDIOIN_DATA_TOG (0x0000008c)
1985 +
1986 +#define BP_AUDIOIN_DATA_HIGH 16
1987 +#define BM_AUDIOIN_DATA_HIGH 0xFFFF0000
1988 +#define BF_AUDIOIN_DATA_HIGH(v) \
1989 + (((v) << 16) & BM_AUDIOIN_DATA_HIGH)
1990 +#define BP_AUDIOIN_DATA_LOW 0
1991 +#define BM_AUDIOIN_DATA_LOW 0x0000FFFF
1992 +#define BF_AUDIOIN_DATA_LOW(v) \
1993 + (((v) << 0) & BM_AUDIOIN_DATA_LOW)
1994 +
1995 +#define BV_AUDIOIN_ADCVOL_SELECT__MIC 0x00
1996 +
1997 +#endif /* __MXS_ADC_CODEC_H */
1998 --- a/sound/soc/mxs/Kconfig
1999 +++ b/sound/soc/mxs/Kconfig
2000 @@ -18,3 +18,13 @@ config SND_SOC_MXS_SGTL5000
2001 a sgtl5000 codec.
2002
2003 endif # SND_MXS_SOC
2004 +
2005 +
2006 +config SND_MXS_SOC_BUILTIN
2007 + tristate "SoC Audio for Freescale i.MX23 built-in codec"
2008 + depends on ARCH_MXS
2009 + select SND_SOC_GENERIC_DMAENGINE_PCM
2010 + select SND_SOC_MXS_BUILTIN_CODEC
2011 + help
2012 + Say Y or M if you want to add support for codecs attached to
2013 + the MXS SAIF interface.
2014 --- a/sound/soc/mxs/Makefile
2015 +++ b/sound/soc/mxs/Makefile
2016 @@ -8,3 +8,12 @@ obj-$(CONFIG_SND_MXS_SOC) += snd-soc-mxs
2017 snd-soc-mxs-sgtl5000-objs := mxs-sgtl5000.o
2018
2019 obj-$(CONFIG_SND_SOC_MXS_SGTL5000) += snd-soc-mxs-sgtl5000.o
2020 +
2021 +# i.MX23 built-in audio Machine and Platform support
2022 +snd-soc-mxs-builtin-pcm-objs := mxs-builtin-pcm.o
2023 +snd-soc-mxs-builtin-dai-objs := mxs-builtin-dai.o
2024 +snd-soc-mxs-builtin-audio-objs := mxs-builtin-audio.o
2025 +
2026 +obj-$(CONFIG_SND_MXS_SOC_BUILTIN) += snd-soc-mxs-builtin-pcm.o
2027 +obj-$(CONFIG_SND_MXS_SOC_BUILTIN) += snd-soc-mxs-builtin-dai.o
2028 +obj-$(CONFIG_SND_MXS_SOC_BUILTIN) += snd-soc-mxs-builtin-audio.o
2029 --- /dev/null
2030 +++ b/sound/soc/mxs/mxs-builtin-audio.c
2031 @@ -0,0 +1,120 @@
2032 +/*
2033 + * mxs-builtin-audio.c -- i.MX233 built-in codec ALSA Soc Audio driver
2034 + *
2035 + * Author: Michal Ulianko <michal.ulianko@gmail.com>
2036 + *
2037 + * This program is free software; you can redistribute it and/or modify
2038 + * it under the terms of the GNU General Public License version 2 as
2039 + * published by the Free Software Foundation.
2040 + */
2041 +
2042 +#include <linux/module.h>
2043 +#include <linux/device.h>
2044 +#include <linux/of.h>
2045 +#include <linux/of_device.h>
2046 +#include <sound/core.h>
2047 +#include <sound/pcm.h>
2048 +#include <sound/soc.h>
2049 +#include <sound/jack.h>
2050 +#include <sound/soc-dapm.h>
2051 +#include <asm/mach-types.h>
2052 +
2053 +static struct snd_soc_dai_link mxs_adc_dai_link[] = {
2054 + {
2055 + .name = "MXS ADC/DAC",
2056 + .stream_name = "MXS ADC/DAC",
2057 + .codec_dai_name = "mxs-builtin-codec-dai",
2058 +// .codec_name = "mxs-builtin-codec",
2059 +// .cpu_dai_name = "mxs-builtin-cpu-dai",
2060 +// .platform_name = "mxs-builtin-cpu-dai",
2061 +// .ops = &mxs_sgtl5000_hifi_ops,
2062 + },
2063 +};
2064 +
2065 +static struct snd_soc_card mxs_adc_audio = {
2066 + .name = "mxs-builtin-audio",
2067 + .owner = THIS_MODULE,
2068 + .dai_link = mxs_adc_dai_link,
2069 + .num_links = ARRAY_SIZE(mxs_adc_dai_link),
2070 +};
2071 +
2072 +static int mxsadc_audio_probe_dt(struct platform_device *pdev)
2073 +{
2074 + struct device_node *np = pdev->dev.of_node;
2075 + struct device_node *cpu_dai_np, *codec_np;
2076 + int ret = 0;
2077 +
2078 + if (!np)
2079 + return 1; /* no device tree */
2080 +
2081 + cpu_dai_np = of_parse_phandle(np, "cpu-dai", 0);
2082 + codec_np = of_parse_phandle(np, "audio-codec", 0);
2083 + if (!cpu_dai_np || !codec_np) {
2084 + dev_err(&pdev->dev, "phandle missing or invalid\n");
2085 + return -EINVAL;
2086 + }
2087 +
2088 + mxs_adc_dai_link[0].codec_name = NULL;
2089 + mxs_adc_dai_link[0].codec_of_node = codec_np;
2090 + mxs_adc_dai_link[0].cpu_dai_name = NULL;
2091 + mxs_adc_dai_link[0].cpu_of_node = cpu_dai_np;
2092 + mxs_adc_dai_link[0].platform_name = NULL;
2093 + mxs_adc_dai_link[0].platform_of_node = cpu_dai_np;
2094 +
2095 +// of_node_put(codec_np);
2096 +// of_node_put(cpu_dai_np);
2097 +
2098 + return ret;
2099 +}
2100 +
2101 +static int mxsadc_audio_probe(struct platform_device *pdev)
2102 +{
2103 + struct snd_soc_card *card = &mxs_adc_audio;
2104 + int ret;
2105 +
2106 + ret = mxsadc_audio_probe_dt(pdev);
2107 + if (ret < 0)
2108 + return ret;
2109 +
2110 + card->dev = &pdev->dev;
2111 + platform_set_drvdata(pdev, card);
2112 +
2113 + ret = snd_soc_register_card(card);
2114 + if (ret) {
2115 + dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret);
2116 + return ret;
2117 + }
2118 +
2119 + return 0;
2120 +}
2121 +
2122 +static int mxsadc_audio_remove(struct platform_device *pdev)
2123 +{
2124 + struct snd_soc_card *card = platform_get_drvdata(pdev);
2125 +
2126 + snd_soc_unregister_card(card);
2127 +
2128 + return 0;
2129 +}
2130 +
2131 +static const struct of_device_id mxs_adc_audio_dt_ids[] = {
2132 + { .compatible = "fsl,mxs-builtin-audio", },
2133 + { /* sentinel */ }
2134 +};
2135 +MODULE_DEVICE_TABLE(of, mxs_adc_audio_dt_ids);
2136 +
2137 +static struct platform_driver mxs_adc_audio_driver = {
2138 + .driver = {
2139 + .name = "mxs-builtin-audio",
2140 + .owner = THIS_MODULE,
2141 + .of_match_table = mxs_adc_audio_dt_ids,
2142 + },
2143 + .probe = mxsadc_audio_probe,
2144 + .remove = mxsadc_audio_remove,
2145 +};
2146 +
2147 +module_platform_driver(mxs_adc_audio_driver);
2148 +
2149 +MODULE_DESCRIPTION("Freescale MXS ADC/DAC SoC Machine Driver");
2150 +MODULE_AUTHOR("Michal Ulianko <michal.ulianko@gmail.com>");
2151 +MODULE_LICENSE("GPL");
2152 --- /dev/null
2153 +++ b/sound/soc/mxs/mxs-builtin-dai.c
2154 @@ -0,0 +1,588 @@
2155 +/*
2156 + * mxs-builtin-dai.c -- i.MX233 built-in codec ALSA Soc Audio driver
2157 + *
2158 + * Author: Michal Ulianko <michal.ulianko@gmail.com>
2159 + *
2160 + * Based on sound/soc/mxs/mxs-adc.c for kernel 2.6.35
2161 + * by Vladislav Buzov <vbuzov@embeddedalley.com>
2162 + *
2163 + * This program is free software; you can redistribute it and/or modify
2164 + * it under the terms of the GNU General Public License version 2 as
2165 + * published by the Free Software Foundation.
2166 + */
2167 +
2168 +#include <linux/module.h>
2169 +#include <linux/init.h>
2170 +#include <linux/interrupt.h>
2171 +#include <linux/delay.h>
2172 +#include <linux/dma-mapping.h>
2173 +#include <linux/platform_device.h>
2174 +#include <sound/pcm.h>
2175 +#include <sound/pcm_params.h>
2176 +#include <sound/soc.h>
2177 +
2178 +#include "../codecs/mxs-builtin-codec.h"
2179 +#include "mxs-builtin-pcm.h"
2180 +
2181 +#define ADC_VOLUME_MIN 0x37
2182 +
2183 +/* TODO Use codec IO function soc snd write etc, instead of __writel __readl */
2184 +
2185 +// TODO use container_of
2186 +struct mxs_irq_data {
2187 + struct snd_pcm_substream *substream;
2188 + struct mxs_adc_priv *mxs_adc;
2189 +};
2190 +
2191 +struct mxs_adc_priv {
2192 + struct mxs_irq_data irq_data;
2193 + int dma_adc_err_irq;
2194 + int dma_dac_err_irq;
2195 + int hp_short_irq;
2196 + void __iomem *audioin_base;
2197 + void __iomem *audioout_base;
2198 + void __iomem *rtc_base;
2199 +};
2200 +
2201 +typedef struct {
2202 + struct work_struct work;
2203 + struct timer_list timer;
2204 +
2205 + /* target workqueue and CPU ->timer uses to queue ->work */
2206 + struct workqueue_struct *wq;
2207 + int cpu;
2208 +
2209 + struct mxs_adc_priv *mxs_adc;
2210 +} my_delayed_work_t;
2211 +
2212 +// static struct delayed_work work;
2213 +// static struct delayed_work adc_ramp_work;
2214 +// static struct delayed_work dac_ramp_work;
2215 +// static struct delayed_work test;
2216 +static my_delayed_work_t work;
2217 +static my_delayed_work_t adc_ramp_work;
2218 +static my_delayed_work_t dac_ramp_work;
2219 +static my_delayed_work_t test;
2220 +static bool adc_ramp_done = 1;
2221 +static bool dac_ramp_done = 1;
2222 +
2223 +static inline void mxs_adc_schedule_work(struct delayed_work *work)
2224 +{
2225 + schedule_delayed_work(work, HZ / 10);
2226 +}
2227 +
2228 +static void mxs_adc_work(struct work_struct *work)
2229 +{
2230 + struct mxs_adc_priv *mxs_adc = ((my_delayed_work_t *)work)->mxs_adc;
2231 + /* disable irq */
2232 + disable_irq(mxs_adc->hp_short_irq);
2233 +
2234 + while (true) {
2235 + __raw_writel(BM_AUDIOOUT_PWRDN_HEADPHONE,
2236 + mxs_adc->audioout_base + HW_AUDIOOUT_PWRDN_CLR);
2237 + msleep(10);
2238 + if ((__raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL)
2239 + & BM_AUDIOOUT_ANACTRL_SHORT_LR_STS) != 0) {
2240 + /* rearm the short protection */
2241 + __raw_writel(BM_AUDIOOUT_ANACTRL_SHORTMODE_LR,
2242 + mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_CLR);
2243 + __raw_writel(BM_AUDIOOUT_ANACTRL_SHORT_LR_STS,
2244 + mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_CLR);
2245 + __raw_writel(BF_AUDIOOUT_ANACTRL_SHORTMODE_LR(0x1),
2246 + mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_SET);
2247 +
2248 + __raw_writel(BM_AUDIOOUT_PWRDN_HEADPHONE,
2249 + mxs_adc->audioout_base + HW_AUDIOOUT_PWRDN_SET);
2250 + printk(KERN_WARNING "WARNING : Headphone LR short!\r\n");
2251 + } else {
2252 + printk(KERN_WARNING "INFO : Headphone LR no longer short!\r\n");
2253 + break;
2254 + }
2255 + msleep(1000);
2256 + }
2257 +
2258 + /* power up the HEADPHONE and un-mute the HPVOL */
2259 + __raw_writel(BM_AUDIOOUT_HPVOL_MUTE,
2260 + mxs_adc->audioout_base + HW_AUDIOOUT_HPVOL_CLR);
2261 + __raw_writel(BM_AUDIOOUT_PWRDN_HEADPHONE,
2262 + mxs_adc->audioout_base + HW_AUDIOOUT_PWRDN_CLR);
2263 +
2264 + /* enable irq for next short detect*/
2265 + enable_irq(mxs_adc->hp_short_irq);
2266 +}
2267 +
2268 +static void mxs_adc_schedule_ramp_work(struct delayed_work *work)
2269 +{
2270 + schedule_delayed_work(work, msecs_to_jiffies(2));
2271 + adc_ramp_done = 0;
2272 +}
2273 +
2274 +static void mxs_adc_ramp_work(struct work_struct *work)
2275 +{
2276 + struct mxs_adc_priv *mxs_adc = ((my_delayed_work_t *)work)->mxs_adc;
2277 + u32 reg = 0;
2278 + u32 reg1 = 0;
2279 + u32 reg2 = 0;
2280 + u32 l, r;
2281 + u32 ll, rr;
2282 + int i;
2283 +
2284 + reg = __raw_readl(mxs_adc->audioin_base + \
2285 + HW_AUDIOIN_ADCVOLUME);
2286 +
2287 + reg1 = reg & ~BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT;
2288 + reg1 = reg1 & ~BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT;
2289 + /* minimize adc volume */
2290 + reg2 = reg1 |
2291 + BF_AUDIOIN_ADCVOLUME_VOLUME_LEFT(ADC_VOLUME_MIN) |
2292 + BF_AUDIOIN_ADCVOLUME_VOLUME_RIGHT(ADC_VOLUME_MIN);
2293 + __raw_writel(reg2,
2294 + mxs_adc->audioin_base + HW_AUDIOIN_ADCVOLUME);
2295 + msleep(1);
2296 +
2297 + l = (reg & BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT) >>
2298 + BP_AUDIOIN_ADCVOLUME_VOLUME_LEFT;
2299 + r = (reg & BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT) >>
2300 + BP_AUDIOIN_ADCVOLUME_VOLUME_RIGHT;
2301 +
2302 + /* fade in adc vol */
2303 + for (i = ADC_VOLUME_MIN; (i < l) || (i < r);) {
2304 + i += 0x8;
2305 + ll = i < l ? i : l;
2306 + rr = i < r ? i : r;
2307 + reg2 = reg1 |
2308 + BF_AUDIOIN_ADCVOLUME_VOLUME_LEFT(ll) |
2309 + BF_AUDIOIN_ADCVOLUME_VOLUME_RIGHT(rr);
2310 + __raw_writel(reg2,
2311 + mxs_adc->audioin_base + HW_AUDIOIN_ADCVOLUME);
2312 + msleep(1);
2313 + }
2314 + adc_ramp_done = 1;
2315 +}
2316 +
2317 +static void mxs_dac_schedule_ramp_work(struct delayed_work *work)
2318 +{
2319 + schedule_delayed_work(work, msecs_to_jiffies(2));
2320 + dac_ramp_done = 0;
2321 +}
2322 +
2323 +static void mxs_dac_ramp_work(struct work_struct *work)
2324 +{
2325 + struct mxs_adc_priv *mxs_adc = ((my_delayed_work_t *)work)->mxs_adc;
2326 + u32 reg = 0;
2327 + u32 reg1 = 0;
2328 + u32 l, r;
2329 + u32 ll, rr;
2330 + int i;
2331 +
2332 + /* unmute hp and speaker */
2333 + __raw_writel(BM_AUDIOOUT_HPVOL_MUTE,
2334 + mxs_adc->audioout_base + HW_AUDIOOUT_HPVOL_CLR);
2335 + __raw_writel(BM_AUDIOOUT_SPEAKERCTRL_MUTE,
2336 + mxs_adc->audioout_base + HW_AUDIOOUT_SPEAKERCTRL_CLR);
2337 +
2338 + reg = __raw_readl(mxs_adc->audioout_base + \
2339 + HW_AUDIOOUT_HPVOL);
2340 +
2341 + reg1 = reg & ~BM_AUDIOOUT_HPVOL_VOL_LEFT;
2342 + reg1 = reg1 & ~BM_AUDIOOUT_HPVOL_VOL_RIGHT;
2343 +
2344 + l = (reg & BM_AUDIOOUT_HPVOL_VOL_LEFT) >>
2345 + BP_AUDIOOUT_HPVOL_VOL_LEFT;
2346 + r = (reg & BM_AUDIOOUT_HPVOL_VOL_RIGHT) >>
2347 + BP_AUDIOOUT_HPVOL_VOL_RIGHT;
2348 + /* fade in hp vol */
2349 + for (i = 0x7f; i > 0 ;) {
2350 + i -= 0x8;
2351 + ll = i > (int)l ? i : l;
2352 + rr = i > (int)r ? i : r;
2353 + reg = reg1 | BF_AUDIOOUT_HPVOL_VOL_LEFT(ll)
2354 + | BF_AUDIOOUT_HPVOL_VOL_RIGHT(rr);
2355 + __raw_writel(reg,
2356 + mxs_adc->audioout_base + HW_AUDIOOUT_HPVOL);
2357 + msleep(1);
2358 + }
2359 + dac_ramp_done = 1;
2360 +}
2361 +
2362 +/* IRQs */
2363 +static irqreturn_t mxs_short_irq(int irq, void *dev_id)
2364 +{
2365 + struct mxs_adc_priv *mxs_adc = dev_id;
2366 + //struct snd_pcm_substream *substream = mxs_adc->irq_data.substream;
2367 +
2368 + __raw_writel(BM_AUDIOOUT_ANACTRL_SHORTMODE_LR,
2369 + mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_CLR);
2370 + __raw_writel(BM_AUDIOOUT_ANACTRL_SHORT_LR_STS,
2371 + mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_CLR);
2372 + __raw_writel(BF_AUDIOOUT_ANACTRL_SHORTMODE_LR(0x1),
2373 + mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_SET);
2374 +
2375 + __raw_writel(BM_AUDIOOUT_HPVOL_MUTE,
2376 + mxs_adc->audioout_base + HW_AUDIOOUT_HPVOL_SET);
2377 + __raw_writel(BM_AUDIOOUT_PWRDN_HEADPHONE,
2378 + mxs_adc->audioout_base + HW_AUDIOOUT_PWRDN_SET);
2379 + __raw_writel(BM_AUDIOOUT_ANACTRL_HP_CLASSAB,
2380 + mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL_SET);
2381 +
2382 + mxs_adc_schedule_work((struct delayed_work *) &work);
2383 + return IRQ_HANDLED;
2384 +}
2385 +
2386 +static irqreturn_t mxs_err_irq(int irq, void *dev_id)
2387 +{
2388 + struct mxs_adc_priv *mxs_adc = dev_id;
2389 + struct snd_pcm_substream *substream = mxs_adc->irq_data.substream;
2390 + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0;
2391 + u32 ctrl_reg;
2392 + u32 overflow_mask;
2393 + u32 underflow_mask;
2394 +
2395 + if (playback) {
2396 + ctrl_reg = __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_CTRL);
2397 + underflow_mask = BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ;
2398 + overflow_mask = BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ;
2399 + } else {
2400 + ctrl_reg = __raw_readl(mxs_adc->audioin_base + HW_AUDIOIN_CTRL);
2401 + underflow_mask = BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ;
2402 + overflow_mask = BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ;
2403 + }
2404 +
2405 + if (ctrl_reg & underflow_mask) {
2406 + printk(KERN_DEBUG "%s underflow detected\n",
2407 + playback ? "DAC" : "ADC");
2408 +
2409 + if (playback)
2410 + __raw_writel(
2411 + BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ,
2412 + mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_CLR);
2413 + else
2414 + __raw_writel(
2415 + BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ,
2416 + mxs_adc->audioin_base + HW_AUDIOIN_CTRL_CLR);
2417 +
2418 + } else if (ctrl_reg & overflow_mask) {
2419 + printk(KERN_DEBUG "%s overflow detected\n",
2420 + playback ? "DAC" : "ADC");
2421 +
2422 + if (playback)
2423 + __raw_writel(
2424 + BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ,
2425 + mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_CLR);
2426 + else
2427 + __raw_writel(BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ,
2428 + mxs_adc->audioin_base + HW_AUDIOIN_CTRL_CLR);
2429 + } else
2430 + printk(KERN_WARNING "Unknown DAC error interrupt\n");
2431 +
2432 + return IRQ_HANDLED;
2433 +}
2434 +/* END IRQs */
2435 +
2436 +static int mxs_trigger(struct snd_pcm_substream *substream,
2437 + int cmd,
2438 + struct snd_soc_dai *cpu_dai)
2439 +{
2440 + struct mxs_adc_priv *mxs_adc = snd_soc_dai_get_drvdata(cpu_dai);
2441 + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0;
2442 + int ret = 0;
2443 +
2444 + switch (cmd) {
2445 + case SNDRV_PCM_TRIGGER_START:
2446 + case SNDRV_PCM_TRIGGER_RESUME:
2447 + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
2448 +
2449 + if (playback) {
2450 + /* enable the fifo error interrupt */
2451 + __raw_writel(BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN,
2452 + mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_SET);
2453 + /* write a data to data reg to trigger the transfer */
2454 + __raw_writel(0x0,
2455 + mxs_adc->audioout_base + HW_AUDIOOUT_DATA);
2456 + mxs_dac_schedule_ramp_work((struct delayed_work *) &dac_ramp_work);
2457 + } else {
2458 +// mxs_dma_get_info(prtd->dma_ch, &dma_info);
2459 +// cur_bar1 = dma_info.buf_addr;
2460 +// xfer_count1 = dma_info.xfer_count;
2461 +
2462 + __raw_writel(BM_AUDIOIN_CTRL_RUN,
2463 + mxs_adc->audioin_base + HW_AUDIOIN_CTRL_SET);
2464 + udelay(100);
2465 +
2466 +// mxs_dma_get_info(prtd->dma_ch, &dma_info);
2467 +// cur_bar2 = dma_info.buf_addr;
2468 +// xfer_count2 = dma_info.xfer_count;
2469 +//
2470 +// /* check if DMA getting stuck */
2471 +// if ((xfer_count1 == xfer_count2) && (cur_bar1 == cur_bar2))
2472 +// /* read a data from data reg to trigger the receive */
2473 +// reg = __raw_readl(mxs_adc->audioin_base + HW_AUDIOIN_DATA);
2474 +
2475 + mxs_adc_schedule_ramp_work((struct delayed_work *) &adc_ramp_work);
2476 + }
2477 + break;
2478 +
2479 + case SNDRV_PCM_TRIGGER_SUSPEND:
2480 + case SNDRV_PCM_TRIGGER_STOP:
2481 + case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
2482 +
2483 + if (playback) {
2484 +// printk(KERN_INFO "SNDRV_PCM_TRIGGER_START\n");
2485 +// printk(KERN_INFO "ctrl:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_CTRL));
2486 +// printk(KERN_INFO "stat:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_STAT));
2487 +// printk(KERN_INFO "srr:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_DACSRR));
2488 +// printk(KERN_INFO "vol:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_DACVOLUME));
2489 +// printk(KERN_INFO "debug:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_DACDEBUG));
2490 +// printk(KERN_INFO "hpvol:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_HPVOL));
2491 +// printk(KERN_INFO "pwrdn:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_PWRDN));
2492 +// printk(KERN_INFO "refc:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_REFCTRL));
2493 +// printk(KERN_INFO "anac:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_ANACTRL));
2494 +// printk(KERN_INFO "test:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_TEST));
2495 +// printk(KERN_INFO "bist:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_BISTCTRL));
2496 +// printk(KERN_INFO "anaclk:%x\n", __raw_readl(mxs_adc->audioout_base + HW_AUDIOOUT_ANACLKCTRL));
2497 +
2498 + if (dac_ramp_done == 0) {
2499 + cancel_delayed_work((struct delayed_work *) &dac_ramp_work);
2500 + dac_ramp_done = 1;
2501 + }
2502 + __raw_writel(BM_AUDIOOUT_HPVOL_MUTE,
2503 + mxs_adc->audioout_base + HW_AUDIOOUT_HPVOL_SET);
2504 + __raw_writel(BM_AUDIOOUT_SPEAKERCTRL_MUTE,
2505 + mxs_adc->audioout_base + HW_AUDIOOUT_SPEAKERCTRL_SET);
2506 + /* disable the fifo error interrupt */
2507 + __raw_writel(BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN,
2508 + mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_CLR);
2509 + mdelay(50);
2510 + } else {
2511 + if (adc_ramp_done == 0) {
2512 + cancel_delayed_work((struct delayed_work *) &adc_ramp_work);
2513 + adc_ramp_done = 1;
2514 + }
2515 + __raw_writel(BM_AUDIOIN_CTRL_RUN,
2516 + mxs_adc->audioin_base + HW_AUDIOIN_CTRL_CLR);
2517 + }
2518 + break;
2519 +
2520 + default:
2521 + printk(KERN_ERR "TRIGGER ERROR\n");
2522 + ret = -EINVAL;
2523 + }
2524 +
2525 + return ret;
2526 +}
2527 +
2528 +static int mxs_startup(struct snd_pcm_substream *substream,
2529 + struct snd_soc_dai *cpu_dai)
2530 +{
2531 + struct mxs_adc_priv *mxs_adc = snd_soc_dai_get_drvdata(cpu_dai);
2532 + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0;
2533 + mxs_adc->irq_data.mxs_adc = mxs_adc;
2534 + mxs_adc->irq_data.substream = substream;
2535 +
2536 + work.mxs_adc = mxs_adc;
2537 + adc_ramp_work.mxs_adc = mxs_adc;
2538 + dac_ramp_work.mxs_adc = mxs_adc;
2539 + test.mxs_adc = mxs_adc;
2540 + INIT_DELAYED_WORK(&work, mxs_adc_work);
2541 + INIT_DELAYED_WORK(&adc_ramp_work, mxs_adc_ramp_work);
2542 + INIT_DELAYED_WORK(&dac_ramp_work, mxs_dac_ramp_work);
2543 +
2544 + /* Enable error interrupt */
2545 + if (playback) {
2546 + __raw_writel(BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ,
2547 + mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_CLR);
2548 + __raw_writel(BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ,
2549 + mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_CLR);
2550 + } else {
2551 + __raw_writel(BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ,
2552 + mxs_adc->audioin_base + HW_AUDIOIN_CTRL_CLR);
2553 + __raw_writel(BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ,
2554 + mxs_adc->audioin_base + HW_AUDIOIN_CTRL_CLR);
2555 + __raw_writel(BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN,
2556 + mxs_adc->audioin_base + HW_AUDIOIN_CTRL_SET);
2557 + }
2558 +
2559 + return 0;
2560 +}
2561 +
2562 +static void mxs_shutdown(struct snd_pcm_substream *substream,
2563 + struct snd_soc_dai *cpu_dai)
2564 +{
2565 + struct mxs_adc_priv *mxs_adc = snd_soc_dai_get_drvdata(cpu_dai);
2566 + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0;
2567 +
2568 + /* Disable error interrupt */
2569 + if (playback) {
2570 + __raw_writel(BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN,
2571 + mxs_adc->audioout_base + HW_AUDIOOUT_CTRL_CLR);
2572 + } else {
2573 + __raw_writel(BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN,
2574 + mxs_adc->audioin_base + HW_AUDIOIN_CTRL_CLR);
2575 + }
2576 +}
2577 +
2578 +#define MXS_ADC_RATES SNDRV_PCM_RATE_8000_192000
2579 +#define MXS_ADC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2580 +
2581 +static const struct snd_soc_dai_ops mxs_adc_dai_ops = {
2582 + .startup = mxs_startup,
2583 + .trigger = mxs_trigger,
2584 + .shutdown = mxs_shutdown,
2585 +};
2586 +
2587 +static int mxs_dai_probe(struct snd_soc_dai *dai)
2588 +{
2589 + // TODO This does not make any sense.
2590 + struct mxs_adc_priv *mxs_adc = dev_get_drvdata(dai->dev);
2591 +
2592 + snd_soc_dai_set_drvdata(dai, mxs_adc);
2593 +
2594 + return 0;
2595 +}
2596 +
2597 +static struct snd_soc_dai_driver mxs_adc_dai = {
2598 + .name = "mxs-builtin-cpu-dai",
2599 + .probe = mxs_dai_probe,
2600 + .playback = {
2601 + .channels_min = 2,
2602 + .channels_max = 2,
2603 + .rates = MXS_ADC_RATES,
2604 + .formats = MXS_ADC_FORMATS,
2605 + },
2606 + .capture = {
2607 + .channels_min = 2,
2608 + .channels_max = 2,
2609 + .rates = MXS_ADC_RATES,
2610 + .formats = MXS_ADC_FORMATS,
2611 + },
2612 + .ops = &mxs_adc_dai_ops,
2613 +};
2614 +
2615 +static const struct snd_soc_component_driver mxs_adc_component = {
2616 + .name = "mxs-xxx", //TODO change this name
2617 +};
2618 +
2619 +static int mxs_adc_probe(struct platform_device *pdev)
2620 +{
2621 + struct device_node *np = pdev->dev.of_node;
2622 + struct mxs_adc_priv *mxs_adc;
2623 + int ret = 0;
2624 +
2625 + if (!np)
2626 + return -EINVAL;
2627 +
2628 + mxs_adc = devm_kzalloc(&pdev->dev, sizeof(*mxs_adc), GFP_KERNEL);
2629 + if (!mxs_adc)
2630 + return -ENOMEM;
2631 +
2632 + mxs_adc->audioout_base = devm_ioremap(&pdev->dev, 0x80048000, 0x2000);
2633 + if (IS_ERR(mxs_adc->audioout_base))
2634 + return PTR_ERR(mxs_adc->audioout_base);
2635 +
2636 + mxs_adc->audioin_base = devm_ioremap(&pdev->dev, 0x8004c000, 0x2000);
2637 + if (IS_ERR(mxs_adc->audioin_base))
2638 + return PTR_ERR(mxs_adc->audioin_base);
2639 +
2640 + mxs_adc->rtc_base = devm_ioremap(&pdev->dev, 0x8005c000, 0x2000);
2641 + if (IS_ERR(mxs_adc->rtc_base))
2642 + return PTR_ERR(mxs_adc->rtc_base);
2643 +
2644 + /* Get IRQ numbers */
2645 + mxs_adc->dma_adc_err_irq = platform_get_irq(pdev, 0);
2646 + if (mxs_adc->dma_adc_err_irq < 0) {
2647 + ret = mxs_adc->dma_adc_err_irq;
2648 + dev_err(&pdev->dev, "failed to get ADC DMA ERR irq resource: %d\n", ret);
2649 + return ret;
2650 + }
2651 +
2652 + mxs_adc->dma_dac_err_irq = platform_get_irq(pdev, 1);
2653 + if (mxs_adc->dma_dac_err_irq < 0) {
2654 + ret = mxs_adc->dma_dac_err_irq;
2655 + dev_err(&pdev->dev, "failed to get DAC DMA ERR irq resource: %d\n", ret);
2656 + return ret;
2657 + }
2658 +
2659 + mxs_adc->hp_short_irq = platform_get_irq(pdev, 2);
2660 + if (mxs_adc->hp_short_irq < 0) {
2661 + ret = mxs_adc->hp_short_irq;
2662 + dev_err(&pdev->dev, "failed to get HP_SHORT irq resource: %d\n", ret);
2663 + return ret;
2664 + }
2665 +
2666 + /* Request IRQs */
2667 + ret = devm_request_irq(&pdev->dev, mxs_adc->dma_adc_err_irq, mxs_err_irq, 0, "MXS DAC and ADC Error",
2668 + mxs_adc);
2669 + if (ret) {
2670 + printk(KERN_ERR "%s: Unable to request ADC/DAC error irq %d\n",
2671 + __func__, mxs_adc->dma_adc_err_irq);
2672 + return ret;
2673 + }
2674 +
2675 + ret = devm_request_irq(&pdev->dev, mxs_adc->dma_dac_err_irq, mxs_err_irq, 0, "MXS DAC and ADC Error",
2676 + mxs_adc);
2677 + if (ret) {
2678 + printk(KERN_ERR "%s: Unable to request ADC/DAC error irq %d\n",
2679 + __func__, mxs_adc->dma_dac_err_irq);
2680 + return ret;
2681 + }
2682 +
2683 + ret = devm_request_irq(&pdev->dev, mxs_adc->hp_short_irq, mxs_short_irq,
2684 + IRQF_DISABLED | IRQF_SHARED, "MXS DAC and ADC HP SHORT", mxs_adc);
2685 + if (ret) {
2686 + printk(KERN_ERR "%s: Unable to request ADC/DAC HP SHORT irq %d\n",
2687 + __func__, mxs_adc->hp_short_irq);
2688 + return ret;
2689 + }
2690 +
2691 + platform_set_drvdata(pdev, mxs_adc);
2692 +
2693 + ret = snd_soc_register_component(&pdev->dev, &mxs_adc_component, &mxs_adc_dai, 1);
2694 + if (ret) {
2695 + dev_err(&pdev->dev, "register DAI failed\n");
2696 + return ret;
2697 + }
2698 +
2699 + ret = mxs_adc_pcm_platform_register(&pdev->dev);
2700 + if (ret) {
2701 + dev_err(&pdev->dev, "register PCM failed: %d\n", ret);
2702 + goto failed_pdev_alloc;
2703 + }
2704 +
2705 + return 0;
2706 +
2707 +failed_pdev_alloc:
2708 + snd_soc_unregister_component(&pdev->dev);
2709 +
2710 + return ret;
2711 +}
2712 +
2713 +static int mxs_adc_remove(struct platform_device *pdev)
2714 +{
2715 + mxs_adc_pcm_platform_unregister(&pdev->dev);
2716 + snd_soc_unregister_component(&pdev->dev);
2717 +
2718 + return 0;
2719 +}
2720 +
2721 +static const struct of_device_id mxs_adc_dai_dt_ids[] = {
2722 + { .compatible = "fsl,mxs-builtin-cpu-dai", },
2723 + { /* sentinel */ }
2724 +};
2725 +MODULE_DEVICE_TABLE(of, mxs_adc_dai_dt_ids);
2726 +
2727 +static struct platform_driver mxs_adc_dai_driver = {
2728 + .probe = mxs_adc_probe,
2729 + .remove = mxs_adc_remove,
2730 +
2731 + .driver = {
2732 + .name = "mxs-builtin-cpu-dai",
2733 + .owner = THIS_MODULE,
2734 + .of_match_table = mxs_adc_dai_dt_ids,
2735 + },
2736 +};
2737 +
2738 +module_platform_driver(mxs_adc_dai_driver);
2739 +
2740 +MODULE_DESCRIPTION("Freescale MXS ADC/DAC SoC Codec DAI Driver");
2741 +MODULE_AUTHOR("Michal Ulianko <michal.ulianko@gmail.com>");
2742 +MODULE_LICENSE("GPL");
2743 --- /dev/null
2744 +++ b/sound/soc/mxs/mxs-builtin-pcm.c
2745 @@ -0,0 +1,69 @@
2746 +/*
2747 + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
2748 + *
2749 + * Based on sound/soc/imx/imx-pcm-dma-mx2.c
2750 + *
2751 + * This program is free software; you can redistribute it and/or modify
2752 + * it under the terms of the GNU General Public License as published by
2753 + * the Free Software Foundation; either version 2 of the License, or
2754 + * (at your option) any later version.
2755 + *
2756 + * This program is distributed in the hope that it will be useful,
2757 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2758 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2759 + * GNU General Public License for more details.
2760 + *
2761 + * You should have received a copy of the GNU General Public License along
2762 + * with this program; if not, write to the Free Software Foundation, Inc.,
2763 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
2764 + */
2765 +
2766 +#include <linux/device.h>
2767 +#include <linux/init.h>
2768 +#include <linux/module.h>
2769 +
2770 +#include <sound/core.h>
2771 +#include <sound/pcm.h>
2772 +#include <sound/soc.h>
2773 +#include <sound/dmaengine_pcm.h>
2774 +
2775 +#include "mxs-builtin-pcm.h"
2776 +
2777 +static const struct snd_pcm_hardware snd_mxs_hardware = {
2778 + .info = SNDRV_PCM_INFO_MMAP |
2779 + SNDRV_PCM_INFO_MMAP_VALID |
2780 + SNDRV_PCM_INFO_PAUSE |
2781 + SNDRV_PCM_INFO_RESUME |
2782 + SNDRV_PCM_INFO_INTERLEAVED,
2783 + .formats = SNDRV_PCM_FMTBIT_S16_LE |
2784 + SNDRV_PCM_FMTBIT_S20_3LE |
2785 + SNDRV_PCM_FMTBIT_S24_LE,
2786 + .channels_min = 2,
2787 + .channels_max = 2,
2788 + .period_bytes_min = 32,
2789 + .period_bytes_max = 8192,
2790 + .periods_min = 1,
2791 + .periods_max = 52,
2792 + .buffer_bytes_max = 64 * 1024,
2793 + .fifo_size = 32,
2794 +};
2795 +
2796 +static const struct snd_dmaengine_pcm_config mxs_dmaengine_pcm_config = {
2797 + .pcm_hardware = &snd_mxs_hardware,
2798 + .prealloc_buffer_size = 64 * 1024,
2799 +};
2800 +
2801 +int mxs_adc_pcm_platform_register(struct device *dev)
2802 +{
2803 + return snd_dmaengine_pcm_register(dev, &mxs_dmaengine_pcm_config,
2804 + SND_DMAENGINE_PCM_FLAG_NO_RESIDUE);
2805 +}
2806 +EXPORT_SYMBOL_GPL(mxs_adc_pcm_platform_register);
2807 +
2808 +void mxs_adc_pcm_platform_unregister(struct device *dev)
2809 +{
2810 + snd_dmaengine_pcm_unregister(dev);
2811 +}
2812 +EXPORT_SYMBOL_GPL(mxs_adc_pcm_platform_unregister);
2813 +
2814 +MODULE_LICENSE("GPL");
2815 --- /dev/null
2816 +++ b/sound/soc/mxs/mxs-builtin-pcm.h
2817 @@ -0,0 +1,25 @@
2818 +/*
2819 + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
2820 + *
2821 + * This program is free software; you can redistribute it and/or modify
2822 + * it under the terms of the GNU General Public License as published by
2823 + * the Free Software Foundation; either version 2 of the License, or
2824 + * (at your option) any later version.
2825 + *
2826 + * This program is distributed in the hope that it will be useful,
2827 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2828 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2829 + * GNU General Public License for more details.
2830 + *
2831 + * You should have received a copy of the GNU General Public License along
2832 + * with this program; if not, write to the Free Software Foundation, Inc.,
2833 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
2834 + */
2835 +
2836 +#ifndef _MXS_PCM_H
2837 +#define _MXS_PCM_H
2838 +
2839 +int mxs_adc_pcm_platform_register(struct device *dev);
2840 +void mxs_adc_pcm_platform_unregister(struct device *dev);
2841 +
2842 +#endif
OpenWrt Source Repository