kernel: bump 4.14 to 4.14.176
[openwrt/openwrt.git] / target / linux / octeontx / patches-4.14 / 0001-net-thunderx-add-support-for-rgmii-internal-delay-mo.patch
1 From 69a99101748bb1bdb2730393ef48bc152c4d244a Mon Sep 17 00:00:00 2001
2 From: Tim Harvey <tharvey@gateworks.com>
3 Date: Tue, 12 Dec 2017 12:49:55 -0800
4 Subject: [PATCH] net: thunderx: add support for rgmii internal delay modes
5
6 The XCV_DLL_CTL is being configured with the assumption that
7 phy-mode is rgmii-txid (PHY_INTERFACE_MODE_RGMII_TXID) which is not always
8 the case.
9
10 This patch parses the phy-mode property and uses it to configure CXV_DLL_CTL
11 properly.
12
13 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
14 ---
15 drivers/net/ethernet/cavium/thunder/thunder_bgx.c | 13 +++++++---
16 drivers/net/ethernet/cavium/thunder/thunder_bgx.h | 2 +-
17 drivers/net/ethernet/cavium/thunder/thunder_xcv.c | 31 ++++++++++++++++++-----
18 3 files changed, 35 insertions(+), 11 deletions(-)
19
20 --- a/drivers/net/ethernet/cavium/thunder/thunder_bgx.c
21 +++ b/drivers/net/ethernet/cavium/thunder/thunder_bgx.c
22 @@ -55,6 +55,7 @@ struct bgx {
23 struct pci_dev *pdev;
24 bool is_dlm;
25 bool is_rgx;
26 + int phy_mode;
27 };
28
29 static struct bgx *bgx_vnic[MAX_BGX_THUNDER];
30 @@ -850,12 +851,12 @@ static void bgx_poll_for_link(struct wor
31 queue_delayed_work(lmac->check_link, &lmac->dwork, HZ * 2);
32 }
33
34 -static int phy_interface_mode(u8 lmac_type)
35 +static int phy_interface_mode(struct bgx *bgx, u8 lmac_type)
36 {
37 if (lmac_type == BGX_MODE_QSGMII)
38 return PHY_INTERFACE_MODE_QSGMII;
39 if (lmac_type == BGX_MODE_RGMII)
40 - return PHY_INTERFACE_MODE_RGMII;
41 + return bgx->phy_mode;
42
43 return PHY_INTERFACE_MODE_SGMII;
44 }
45 @@ -921,7 +922,8 @@ static int bgx_lmac_enable(struct bgx *b
46
47 if (phy_connect_direct(&lmac->netdev, lmac->phydev,
48 bgx_lmac_handler,
49 - phy_interface_mode(lmac->lmac_type)))
50 + phy_interface_mode(bgx,
51 + lmac->lmac_type)))
52 return -ENODEV;
53
54 phy_start(lmac->phydev);
55 @@ -1296,6 +1298,8 @@ static int bgx_init_of_phy(struct bgx *b
56 bgx->lmac[lmac].lmacid = lmac;
57
58 phy_np = of_parse_phandle(node, "phy-handle", 0);
59 + if (phy_np)
60 + bgx->phy_mode = of_get_phy_mode(phy_np);
61 /* If there is no phy or defective firmware presents
62 * this cortina phy, for which there is no driver
63 * support, ignore it.
64 @@ -1441,7 +1445,6 @@ static int bgx_probe(struct pci_dev *pde
65 bgx->max_lmac = 1;
66 bgx->bgx_id = MAX_BGX_PER_CN81XX - 1;
67 bgx_vnic[bgx->bgx_id] = bgx;
68 - xcv_init_hw();
69 }
70
71 /* On 81xx all are DLMs and on 83xx there are 3 BGX QLMs and one
72 @@ -1458,6 +1461,8 @@ static int bgx_probe(struct pci_dev *pde
73 if (err)
74 goto err_enable;
75
76 + if (bgx->is_rgx)
77 + xcv_init_hw(bgx->phy_mode);
78 bgx_init_hw(bgx);
79
80 bgx_register_intr(pdev);
81 --- a/drivers/net/ethernet/cavium/thunder/thunder_bgx.h
82 +++ b/drivers/net/ethernet/cavium/thunder/thunder_bgx.h
83 @@ -235,7 +235,7 @@ void bgx_lmac_internal_loopback(int node
84 void bgx_lmac_get_pfc(int node, int bgx_idx, int lmacid, void *pause);
85 void bgx_lmac_set_pfc(int node, int bgx_idx, int lmacid, void *pause);
86
87 -void xcv_init_hw(void);
88 +void xcv_init_hw(int phy_mode);
89 void xcv_setup_link(bool link_up, int link_speed);
90
91 u64 bgx_get_rx_stats(int node, int bgx_idx, int lmac, int idx);
92 --- a/drivers/net/ethernet/cavium/thunder/thunder_xcv.c
93 +++ b/drivers/net/ethernet/cavium/thunder/thunder_xcv.c
94 @@ -65,7 +65,7 @@ MODULE_LICENSE("GPL v2");
95 MODULE_VERSION(DRV_VERSION);
96 MODULE_DEVICE_TABLE(pci, xcv_id_table);
97
98 -void xcv_init_hw(void)
99 +void xcv_init_hw(int phy_mode)
100 {
101 u64 cfg;
102
103 @@ -81,12 +81,31 @@ void xcv_init_hw(void)
104 /* Wait for DLL to lock */
105 msleep(1);
106
107 - /* Configure DLL - enable or bypass
108 - * TX no bypass, RX bypass
109 - */
110 + /* enable/bypass DLL providing MAC based internal TX/RX delays */
111 cfg = readq_relaxed(xcv->reg_base + XCV_DLL_CTL);
112 - cfg &= ~0xFF03;
113 - cfg |= CLKRX_BYP;
114 + cfg &= ~0xffff00;
115 + switch (phy_mode) {
116 + /* RX and TX delays are added by the MAC */
117 + case PHY_INTERFACE_MODE_RGMII:
118 + break;
119 + /* internal RX and TX delays provided by the PHY */
120 + case PHY_INTERFACE_MODE_RGMII_ID:
121 + cfg |= CLKRX_BYP;
122 + cfg |= CLKTX_BYP;
123 + break;
124 + /* internal RX delay provided by the PHY, the MAC
125 + * should not add an RX delay in this case
126 + */
127 + case PHY_INTERFACE_MODE_RGMII_RXID:
128 + cfg |= CLKRX_BYP;
129 + break;
130 + /* internal TX delay provided by the PHY, the MAC
131 + * should not add an TX delay in this case
132 + */
133 + case PHY_INTERFACE_MODE_RGMII_TXID:
134 + cfg |= CLKRX_BYP;
135 + break;
136 + }
137 writeq_relaxed(cfg, xcv->reg_base + XCV_DLL_CTL);
138
139 /* Enable compensation controller and force the