orion: enable SoC drivers in the kernel config
[openwrt/openwrt.git] / target / linux / orion / patches-3.18 / 200-dt2_board_support.patch
1 Index: linux-3.18.43/arch/arm/mach-orion5x/Kconfig
2 ===================================================================
3 --- linux-3.18.43.orig/arch/arm/mach-orion5x/Kconfig
4 +++ linux-3.18.43/arch/arm/mach-orion5x/Kconfig
5 @@ -36,6 +36,13 @@ config MACH_RD88F5182_DT
6 Say 'Y' here if you want your kernel to support the Marvell
7 Orion-NAS (88F5182) RD2, Flattened Device Tree.
8
9 +config MACH_DT2
10 + bool "Freecom DataTank Gateway"
11 + select I2C_BOARDINFO
12 + help
13 + Say 'Y' here if you want your kernel to support the
14 + Freecom DataTank Gateway
15 +
16 config MACH_KUROBOX_PRO
17 bool "KuroBox Pro"
18 select I2C_BOARDINFO
19 Index: linux-3.18.43/arch/arm/mach-orion5x/Makefile
20 ===================================================================
21 --- linux-3.18.43.orig/arch/arm/mach-orion5x/Makefile
22 +++ linux-3.18.43/arch/arm/mach-orion5x/Makefile
23 @@ -14,6 +14,7 @@ obj-$(CONFIG_MACH_TS78XX) += ts78xx-setu
24 obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o
25 obj-$(CONFIG_MACH_NET2BIG) += net2big-setup.o
26 obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
27 +obj-$(CONFIG_MACH_DT2) += dt2-setup.o
28 obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o
29 obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o
30 obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
31 Index: linux-3.18.43/arch/arm/mach-orion5x/dt2-common.h
32 ===================================================================
33 --- /dev/null
34 +++ linux-3.18.43/arch/arm/mach-orion5x/dt2-common.h
35 @@ -0,0 +1,82 @@
36 +#ifndef __INC_DT2_COMMON_H
37 +#define __INC_DT2_COMMON_H
38 +
39 +#define ATAG_MV_UBOOT 0x41000403
40 +
41 +struct tag_mv_uboot {
42 + u32 uboot_version;
43 + u32 tclk;
44 + u32 sysclk;
45 + u32 isUsbHost;
46 + u32 overEthAddr;
47 + u8 dt2_eeprom[256];
48 +};
49 +
50 +#define DT2_EEPROM_ADDR 0x50
51 +#define DT2_EEPROM_OFFSET 0
52 +#define DT2_EEPROM_LENGTH 256
53 +
54 +#define DT2_SERIAL_NUMBER_DEFAULT "run on default\0"
55 +#define DT2_REVISION_DEFAULT_INIT 0xFF
56 +#define DT2_CONFIG_FLAGS_DEFAULT 0x00
57 +
58 +#define _PACKED_ __attribute__((packed))
59 +
60 +struct DT2_EEPROM_SD_CONFIG {
61 + unsigned int ram_1;
62 + unsigned int ram_2;
63 + unsigned int ram_3;
64 + unsigned int ram_4;
65 + unsigned char ram_5;
66 + unsigned char ram_6;
67 + unsigned short ram_7;
68 + unsigned int magic_id;
69 + } _PACKED_; // 24 Bytes in total
70 +
71 +struct DT2_EEPROM_FC_CONFIG {
72 + unsigned char rtc_sts_mask;
73 + unsigned char rtc_sts_init;
74 + unsigned char rtc_int_mask;
75 + unsigned char rtc_int_init;
76 + unsigned char rtc_atrim_init;
77 + unsigned char rtc_dtrim_init;
78 + unsigned char dummy1;
79 + unsigned char dummy2;
80 + unsigned char dt2_config_flags; /* 0x80 to load rtc_values to RTC */
81 + unsigned char dt2_revision; /* upper nibble is HW, lower nibble is FW */
82 + unsigned char dt2_serial_number[16]; /* Serial number of DT-2 */
83 + } _PACKED_; // 26 Bytes in total
84 +
85 +#define CFG_LOAD_RTC_VALUES 0x80
86 +
87 +struct DT2_EEPROM_GW_CONFIG {
88 + unsigned int dummy1;
89 + unsigned int dummy2;
90 + unsigned int dummy3;
91 + unsigned char dummy4;
92 + unsigned char tos_video_val1;
93 + unsigned char tos_video_val2;
94 + unsigned char tos_voip_val;
95 + unsigned char qos_igmp_cfg;
96 + unsigned char num_of_ifs;
97 + unsigned short vlan_ports_if[3];
98 + unsigned char mac_addr[3][6];
99 + } _PACKED_; // 42 Bytes in total
100 +
101 +#define _SIZE_OF_ALL_STRUCTS_ (sizeof(struct DT2_EEPROM_SD_CONFIG) + sizeof(struct DT2_EEPROM_FC_CONFIG) + sizeof(struct DT2_EEPROM_GW_CONFIG))
102 +
103 +// MV = EEPROM - SD - FC - GW - CRC
104 +struct DT2_EEPROM_MV_CONFIG {
105 + unsigned int reg_addr[(DT2_EEPROM_LENGTH - _SIZE_OF_ALL_STRUCTS_ - sizeof(unsigned int)) / (sizeof(unsigned int) * 2)];
106 + unsigned int reg_data[(DT2_EEPROM_LENGTH - _SIZE_OF_ALL_STRUCTS_ - sizeof(unsigned int)) / (sizeof(unsigned int) * 2)];
107 + } _PACKED_;
108 +
109 +struct DT2_EEPROM_STRUCT {
110 + struct DT2_EEPROM_MV_CONFIG mv;
111 + struct DT2_EEPROM_SD_CONFIG sd;
112 + struct DT2_EEPROM_FC_CONFIG fc;
113 + struct DT2_EEPROM_GW_CONFIG gw;
114 + unsigned int crc;
115 + } _PACKED_;
116 +
117 +#endif
118 Index: linux-3.18.43/arch/arm/mach-orion5x/dt2-setup.c
119 ===================================================================
120 --- /dev/null
121 +++ linux-3.18.43/arch/arm/mach-orion5x/dt2-setup.c
122 @@ -0,0 +1,448 @@
123 +/*
124 + * arch/arm/mach-orion5x/dt2-setup.c
125 + *
126 + * Freecom DataTank Gateway Setup
127 + *
128 + * Copyright (C) 2009 Zintis Petersons <Zintis.Petersons@abcsolutions.lv>
129 + *
130 + * This file is licensed under the terms of the GNU General Public
131 + * License version 2. This program is licensed "as is" without any
132 + * warranty of any kind, whether express or implied.
133 + */
134 +
135 +#include <linux/kernel.h>
136 +#include <linux/init.h>
137 +#include <linux/platform_device.h>
138 +#include <linux/pci.h>
139 +#include <linux/irq.h>
140 +#include <linux/mtd/physmap.h>
141 +#include <linux/mv643xx_eth.h>
142 +#include <linux/ethtool.h>
143 +#include <linux/if_ether.h>
144 +#include <net/dsa.h>
145 +#include <linux/ata_platform.h>
146 +#include <linux/i2c.h>
147 +#include <linux/reboot.h>
148 +#include <linux/interrupt.h>
149 +#include <asm/mach-types.h>
150 +#include <asm/gpio.h>
151 +#include <asm/mach/arch.h>
152 +#include <asm/mach/pci.h>
153 +#include <mach/orion5x.h>
154 +#include "common.h"
155 +#include "mpp.h"
156 +
157 +/*****************************************************************************
158 + * DT2 local
159 + ****************************************************************************/
160 +#include <asm/setup.h>
161 +#include "dt2-common.h"
162 +
163 +u32 mvUbootVer = 0;
164 +u32 mvTclk = 166666667;
165 +u32 mvSysclk = 200000000;
166 +u32 mvIsUsbHost = 1;
167 +u32 overEthAddr = 0;
168 +u32 gBoardId = -1;
169 +struct DT2_EEPROM_STRUCT dt2_eeprom;
170 +
171 +/*****************************************************************************
172 + * DT2 Info
173 + ****************************************************************************/
174 +/*
175 + * PCI
176 + */
177 +
178 +#define DT2_PCI_SLOT0_OFFS 7
179 +#define DT2_PCI_SLOT0_IRQ_A_PIN 3
180 +#define DT2_PCI_SLOT0_IRQ_B_PIN 2
181 +
182 +#define DT2_PIN_GPIO_SYNC 25
183 +#define DT2_PIN_GPIO_POWER 24
184 +#define DT2_PIN_GPIO_UNPLUG1 23
185 +#define DT2_PIN_GPIO_UNPLUG2 22
186 +#define DT2_PIN_GPIO_RESET 4
187 +
188 +#define DT2_NOR_BOOT_BASE 0xf4000000
189 +#define DT2_NOR_BOOT_SIZE SZ_512K
190 +
191 +#define DT2_LEDS_BASE 0xfa000000
192 +#define DT2_LEDS_SIZE SZ_1K
193 +
194 +/*****************************************************************************
195 + * 512K NOR Flash on Device bus Boot CS
196 + ****************************************************************************/
197 +
198 +static struct mtd_partition dt2_partitions[] = {
199 + {
200 + .name = "u-boot",
201 + .size = 0x00080000,
202 + .offset = 0,
203 + },
204 +};
205 +
206 +static struct physmap_flash_data dt2_nor_flash_data = {
207 + .width = 1, /* 8 bit bus width */
208 + .parts = dt2_partitions,
209 + .nr_parts = ARRAY_SIZE(dt2_partitions)
210 +};
211 +
212 +static struct resource dt2_nor_flash_resource = {
213 + .flags = IORESOURCE_MEM,
214 + .start = DT2_NOR_BOOT_BASE,
215 + .end = DT2_NOR_BOOT_BASE + DT2_NOR_BOOT_SIZE - 1,
216 +};
217 +
218 +static struct platform_device dt2_nor_flash = {
219 + .name = "physmap-flash",
220 + .id = 0,
221 + .dev = {
222 + .platform_data = &dt2_nor_flash_data,
223 + },
224 + .resource = &dt2_nor_flash_resource,
225 + .num_resources = 1,
226 +};
227 +
228 +/*****************************************************************************
229 + * PCI
230 + ****************************************************************************/
231 +
232 +void __init dt2_pci_preinit(void)
233 +{
234 + int pin, irq;
235 +
236 + /*
237 + * Configure PCI GPIO IRQ pins
238 + */
239 + pin = DT2_PCI_SLOT0_IRQ_A_PIN;
240 + if (gpio_request(pin, "PCI IntA") == 0) {
241 + if (gpio_direction_input(pin) == 0) {
242 + irq = gpio_to_irq(pin);
243 + irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
244 + printk (KERN_INFO "PCI IntA IRQ: %d\n", irq);
245 + } else {
246 + printk(KERN_ERR "dt2_pci_preinit failed to "
247 + "irq_set_irq_type pin %d\n", pin);
248 + gpio_free(pin);
249 + }
250 + } else {
251 + printk(KERN_ERR "dt2_pci_preinit failed to request gpio %d\n", pin);
252 + }
253 +
254 + pin = DT2_PCI_SLOT0_IRQ_B_PIN;
255 + if (gpio_request(pin, "PCI IntB") == 0) {
256 + if (gpio_direction_input(pin) == 0) {
257 + irq = gpio_to_irq(pin);
258 + irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
259 + printk (KERN_INFO "PCI IntB IRQ: %d\n", irq);
260 + } else {
261 + printk(KERN_ERR "dt2_pci_preinit failed to "
262 + "irq_set_irq_type pin %d\n", pin);
263 + gpio_free(pin);
264 + }
265 + } else {
266 + printk(KERN_ERR "dt2_pci_preinit failed to gpio_request %d\n", pin);
267 + }
268 +}
269 +
270 +static int __init dt2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
271 +{
272 + int irq;
273 +
274 + /*
275 + * Check for devices with hard-wired IRQs.
276 + */
277 + irq = orion5x_pci_map_irq(dev, slot, pin);
278 + if (irq != -1){
279 + printk(KERN_INFO "orion5x_pci_map_irq: %d\n", irq);
280 + return irq;
281 + }
282 +
283 + /*
284 + * PCI IRQs are connected via GPIOs
285 + */
286 + switch (slot - DT2_PCI_SLOT0_OFFS) {
287 + case 0:
288 + if (pin == 1){
289 + irq = gpio_to_irq(DT2_PCI_SLOT0_IRQ_A_PIN);
290 + printk(KERN_INFO "dt2_pci_map_irq DT2_PCI_SLOT0_IRQ_A_PIN: %d\n", irq);
291 + }
292 + else {
293 + irq = gpio_to_irq(DT2_PCI_SLOT0_IRQ_B_PIN);
294 + printk(KERN_INFO "dt2_pci_map_irq DT2_PCI_SLOT0_IRQ_B_PIN: %d\n", irq);
295 + }
296 + default:
297 + irq = -1;
298 + printk(KERN_INFO "dt2_pci_map_irq IRQ: %d\n", irq);
299 + }
300 +
301 + return irq;
302 +}
303 +
304 +static struct hw_pci dt2_pci __initdata = {
305 + .nr_controllers = 2,
306 + .preinit = dt2_pci_preinit,
307 + .setup = orion5x_pci_sys_setup,
308 + .scan = orion5x_pci_sys_scan_bus,
309 + .map_irq = dt2_pci_map_irq,
310 +};
311 +
312 +static int __init dt2_pci_init(void)
313 +{
314 + if (machine_is_dt2())
315 + pci_common_init(&dt2_pci);
316 +
317 + return 0;
318 +}
319 +
320 +subsys_initcall(dt2_pci_init);
321 +
322 +/*****************************************************************************
323 + * Ethernet
324 + ****************************************************************************/
325 +
326 +static struct mv643xx_eth_platform_data dt2_eth_data = {
327 + .phy_addr = MV643XX_ETH_PHY_NONE,
328 + .speed = SPEED_1000,
329 + .duplex = DUPLEX_FULL,
330 +};
331 +
332 +static struct dsa_chip_data dt2_switch_chip_data = {
333 + .port_names[0] = "wan",
334 + .port_names[1] = "lan1",
335 + .port_names[2] = "lan2",
336 + .port_names[3] = "cpu",
337 + .port_names[4] = "lan3",
338 + .port_names[5] = "lan4",
339 +};
340 +
341 +static struct dsa_platform_data dt2_switch_plat_data = {
342 + .nr_chips = 1,
343 + .chip = &dt2_switch_chip_data,
344 +};
345 +
346 +/*****************************************************************************
347 + * RTC ISL1208 on I2C bus
348 + ****************************************************************************/
349 +static struct i2c_board_info __initdata dt2_i2c_rtc = {
350 + I2C_BOARD_INFO("isl1208", 0x6F),
351 +};
352 +
353 +/*****************************************************************************
354 + * Sata
355 + ****************************************************************************/
356 +static struct mv_sata_platform_data dt2_sata_data = {
357 + .n_ports = 2,
358 +};
359 +
360 +/*****************************************************************************
361 + * General Setup
362 + ****************************************************************************/
363 +static unsigned int dt2_mpp_modes[] __initdata = {
364 + MPP0_GPIO, // RTC interrupt
365 + MPP1_GPIO, // 88e6131 interrupt
366 + MPP2_GPIO, // PCI_intB
367 + MPP3_GPIO, // PCI_intA
368 + MPP4_GPIO, // reset button switch
369 + MPP5_GPIO,
370 + MPP6_GPIO,
371 + MPP7_GPIO,
372 + MPP8_GPIO,
373 + MPP9_GIGE, /* GE_RXERR */
374 + MPP10_GPIO, // usb
375 + MPP11_GPIO, // usb
376 + MPP12_GIGE, // GE_TXD[4]
377 + MPP13_GIGE, // GE_TXD[5]
378 + MPP14_GIGE, // GE_TXD[6]
379 + MPP15_GIGE, // GE_TXD[7]
380 + MPP16_GIGE, // GE_RXD[4]
381 + MPP17_GIGE, // GE_RXD[5]
382 + MPP18_GIGE, // GE_RXD[6]
383 + MPP19_GIGE, // GE_RXD[7]
384 + 0,
385 +};
386 +
387 +/*****************************************************************************
388 + * LEDS
389 + ****************************************************************************/
390 +static struct platform_device dt2_leds = {
391 + .name = "dt2-led",
392 + .id = -1,
393 +};
394 +
395 +/****************************************************************************
396 + * GPIO key
397 + ****************************************************************************/
398 +static irqreturn_t dt2_reset_handler(int irq, void *dev_id)
399 +{
400 + /* This is the paper-clip reset which does an emergency reboot. */
401 + printk(KERN_INFO "Restarting system.\n");
402 + machine_restart(NULL);
403 +
404 + /* This should never be reached. */
405 + return IRQ_HANDLED;
406 +}
407 +
408 +static irqreturn_t dt2_power_handler(int irq, void *dev_id)
409 +{
410 + printk(KERN_INFO "Shutting down system.\n");
411 + machine_power_off();
412 + return IRQ_HANDLED;
413 +}
414 +
415 +static void __init dt2_init(void)
416 +{
417 + /*
418 + * Setup basic Orion functions. Need to be called early.
419 + */
420 + orion5x_init();
421 +
422 + orion5x_mpp_conf(dt2_mpp_modes);
423 +
424 + /*
425 + * Configure peripherals.
426 + */
427 +
428 + orion5x_uart0_init();
429 + orion5x_ehci0_init();
430 + orion5x_ehci1_init();
431 + orion5x_i2c_init();
432 + orion5x_sata_init(&dt2_sata_data);
433 + orion5x_xor_init();
434 +
435 + printk(KERN_INFO "U-Boot parameters:\n");
436 + printk(KERN_INFO "Sys Clk = %d, Tclk = %d, BoardID = 0x%02x\n", mvSysclk, mvTclk, gBoardId);
437 +
438 + printk(KERN_INFO "Serial: %s\n", dt2_eeprom.fc.dt2_serial_number);
439 + printk(KERN_INFO "Revision: %016x\n", dt2_eeprom.fc.dt2_revision);
440 + printk(KERN_INFO "DT2: Using MAC address %pM for port 0\n",
441 + dt2_eeprom.gw.mac_addr[0]);
442 + printk(KERN_INFO "DT2: Using MAC address %pM for port 1\n",
443 + dt2_eeprom.gw.mac_addr[1]);
444 +
445 + orion5x_eth_init(&dt2_eth_data);
446 + memcpy(dt2_eth_data.mac_addr, dt2_eeprom.gw.mac_addr[0], 6);
447 + orion5x_eth_switch_init(&dt2_switch_plat_data, NO_IRQ);
448 +
449 + i2c_register_board_info(0, &dt2_i2c_rtc, 1);
450 +
451 + mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
452 + ORION_MBUS_DEVBUS_BOOT_ATTR,
453 + DT2_NOR_BOOT_BASE, DT2_NOR_BOOT_SIZE);
454 +
455 + platform_device_register(&dt2_nor_flash);
456 +
457 + mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(0),
458 + ORION_MBUS_DEVBUS_ATTR(0),
459 + DT2_LEDS_BASE, DT2_LEDS_SIZE);
460 + platform_device_register(&dt2_leds);
461 +
462 + if (request_irq(gpio_to_irq(DT2_PIN_GPIO_RESET), &dt2_reset_handler,
463 + IRQF_TRIGGER_LOW,
464 + "DT2: Reset button", NULL) < 0) {
465 +
466 + printk("DT2: Reset Button IRQ %d not available\n",
467 + gpio_to_irq(DT2_PIN_GPIO_RESET));
468 + }
469 +
470 + if (request_irq(gpio_to_irq(DT2_PIN_GPIO_POWER), &dt2_power_handler,
471 + IRQF_TRIGGER_LOW,
472 + "DT2: Power button", NULL) < 0) {
473 +
474 + printk(KERN_DEBUG "DT2: Power Button IRQ %d not available\n",
475 + gpio_to_irq(DT2_PIN_GPIO_POWER));
476 + }
477 +}
478 +
479 +static int __init parse_tag_dt2_uboot(const struct tag *t)
480 +{
481 + struct tag_mv_uboot *mv_uboot;
482 +
483 + // Get pointer to our block
484 + mv_uboot = (struct tag_mv_uboot*)&t->u;
485 + mvTclk = mv_uboot->tclk;
486 + mvSysclk = mv_uboot->sysclk;
487 + mvUbootVer = mv_uboot->uboot_version;
488 + mvIsUsbHost = mv_uboot->isUsbHost;
489 +
490 + // Some clock fixups
491 + if(mvTclk == 166000000) mvTclk = 166666667;
492 + else if(mvTclk == 133000000) mvTclk = 133333333;
493 + else if(mvSysclk == 166000000) mvSysclk = 166666667;
494 +
495 + gBoardId = (mvUbootVer & 0xff);
496 +
497 + //DT2 specific data
498 + memcpy(&dt2_eeprom, mv_uboot->dt2_eeprom, sizeof(struct DT2_EEPROM_STRUCT));
499 +
500 + return 0;
501 +}
502 +__tagtable(ATAG_MV_UBOOT, parse_tag_dt2_uboot);
503 +
504 +/*
505 + * This is OpenWrt specific fixup. It includes code from original "tag_fixup_mem32" to
506 + * fixup bogus memory tags and also fixes kernel cmdline by adding " init=/etc/preinit"
507 + * at the end. It is important to flash OpenWrt image from original Freecom firmware.
508 + *
509 + * Vanilla kernel should use "tag_fixup_mem32" function.
510 + */
511 +static void __init openwrt_fixup(struct tag *t, char **from)
512 +{
513 + char *p = NULL;
514 + static char openwrt_init_tag[] __initdata = " init=/etc/preinit";
515 +
516 + for (; t->hdr.size; t = tag_next(t)){
517 + /* Locate the Freecom cmdline */
518 + if (t->hdr.tag == ATAG_CMDLINE) {
519 + p = t->u.cmdline.cmdline;
520 + printk("%s(%d): Found cmdline '%s' at 0x%0lx\n",
521 + __FUNCTION__, __LINE__, p, (unsigned long)p);
522 + }
523 + /*
524 + * Many orion-based systems have buggy bootloader implementations.
525 + * This is a common fixup for bogus memory tags.
526 + */
527 + if (t->hdr.tag == ATAG_MEM &&
528 + (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
529 + t->u.mem.start & ~PAGE_MASK)) {
530 + printk(KERN_WARNING
531 + "Clearing invalid memory bank %dKB@0x%08x\n",
532 + t->u.mem.size / 1024, t->u.mem.start);
533 + t->hdr.tag = 0;
534 + }
535 + }
536 +
537 + printk("%s(%d): End of table at 0x%0lx\n", __FUNCTION__, __LINE__, (unsigned long)t);
538 +
539 + /* Overwrite the end of the table with a new cmdline tag. */
540 + t->hdr.tag = ATAG_CMDLINE;
541 + t->hdr.size =
542 + (sizeof (struct tag_header) +
543 + strlen(p) + strlen(openwrt_init_tag) + 1 + 4) >> 2;
544 +
545 + strlcpy(t->u.cmdline.cmdline, p, COMMAND_LINE_SIZE);
546 + strlcpy(t->u.cmdline.cmdline + strlen(p), openwrt_init_tag,
547 + COMMAND_LINE_SIZE - strlen(p));
548 +
549 + printk("%s(%d): New cmdline '%s' at 0x%0lx\n",
550 + __FUNCTION__, __LINE__,
551 + t->u.cmdline.cmdline, (unsigned long)t->u.cmdline.cmdline);
552 +
553 + t = tag_next(t);
554 +
555 + printk("%s(%d): New end of table at 0x%0lx\n", __FUNCTION__, __LINE__, (unsigned long)t);
556 +
557 + t->hdr.tag = ATAG_NONE;
558 + t->hdr.size = 0;
559 +}
560 +
561 +/* Warning: Freecom uses their own custom bootloader with mach-type (=1500) */
562 +MACHINE_START(DT2, "Freecom DataTank Gateway")
563 + /* Maintainer: Zintis Petersons <Zintis.Petersons@abcsolutions.lv> */
564 + .atag_offset = 0x100,
565 + .init_machine = dt2_init,
566 + .map_io = orion5x_map_io,
567 + .init_irq = orion5x_init_irq,
568 + .init_time = orion5x_timer_init,
569 + .fixup = openwrt_fixup, //tag_fixup_mem32,
570 +MACHINE_END