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[openwrt/openwrt.git] / target / linux / ppc40x / patches-3.18 / 004-magicbox.patch
1 --- /dev/null
2 +++ b/arch/powerpc/boot/cuboot-magicbox.c
3 @@ -0,0 +1,98 @@
4 +/*
5 + * Old U-boot compatibility for Magicbox boards
6 + *
7 + * Author: Imre Kaloz <kaloz@openwrt.org>
8 + * Gabor Juhos <juhosg@openwrt.org>
9 + *
10 + * This program is free software; you can redistribute it and/or modify it
11 + * under the terms of the GNU General Public License version 2 as published
12 + * by the Free Software Foundation.
13 + */
14 +
15 +#include "ops.h"
16 +#include "io.h"
17 +#include "dcr.h"
18 +#include "stdio.h"
19 +#include "4xx.h"
20 +#include "44x.h"
21 +#include "cuboot.h"
22 +
23 +#define TARGET_4xx
24 +#define TARGET_405EP
25 +#include "ppcboot.h"
26 +
27 +static bd_t bd;
28 +
29 +static void fixup_perwe(void)
30 +{
31 +
32 +#define DCRN_CPC0_PCI_BASE 0xf9
33 +
34 + /* Turn on PerWE instead of PCIINT */
35 + mtdcr(DCRN_CPC0_PCI_BASE,
36 + mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
37 +
38 +#undef DCRN_CPC0_PCI_BASE
39 +}
40 +
41 +static void fixup_cf_card(void)
42 +{
43 +
44 +#define CF_CS0_BASE 0xff100000
45 +#define CF_CS1_BASE 0xff200000
46 +
47 + /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
48 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
49 + mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BS_1M |
50 + EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
51 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
52 + mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
53 +
54 + /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
55 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
56 + mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BS_1M |
57 + EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
58 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
59 + mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
60 +
61 +#undef CF_CS0_BASE
62 +#undef CF_CS1_BASE
63 +}
64 +
65 +static void magicbox_fixups(void)
66 +{
67 + ibm405ep_fixup_clocks(bd.bi_procfreq / 8);
68 + ibm4xx_sdram_fixup_memsize();
69 +
70 + /* Magicbox v1 has only one ethernet, one serial and no
71 + * CF slot -- detect it using it's fake enet1addr
72 + */
73 + if ((bd.bi_enet1addr[2] == 0x02) &&
74 + (bd.bi_enet1addr[3] == 0xfa) &&
75 + (bd.bi_enet1addr[4] == 0xf0) &&
76 + (bd.bi_enet1addr[5] == 0x80)) {
77 + void *devp;
78 + devp = finddevice("/plb/opb/ethernet@ef600900");
79 + del_node(devp);
80 + devp = finddevice("/plb/opb/serial@ef600400");
81 + del_node(devp);
82 + devp = finddevice("/plb/ebc/cf_card@ff100000");
83 + del_node(devp);
84 +
85 + } else {
86 + fixup_perwe();
87 + fixup_cf_card();
88 + }
89 +
90 + dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
91 +}
92 +
93 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
94 + unsigned long r6, unsigned long r7)
95 +{
96 + CUBOOT_INIT();
97 + platform_ops.fixups = magicbox_fixups;
98 + platform_ops.exit = ibm40x_dbcr_reset;
99 + fdt_init(_dtb_start);
100 + serial_console_init();
101 +}
102 --- /dev/null
103 +++ b/arch/powerpc/boot/dts/magicbox.dts
104 @@ -0,0 +1,285 @@
105 +/*
106 + * Device Tree Source for Magicbox boards
107 + *
108 + * Copyright 2008-2009 Imre Kaloz <kaloz@openwrt.org>
109 + * Copyright 2009 Gabor Juhos <juhosg@openwrt.org>
110 + *
111 + * Based on walnut.dts
112 + *
113 + * This file is licensed under the terms of the GNU General Public
114 + * License version 2. This program is licensed "as is" without
115 + * any warranty of any kind, whether express or implied.
116 + */
117 +
118 +/dts-v1/;
119 +
120 +/ {
121 + #address-cells = <1>;
122 + #size-cells = <1>;
123 + model = "magicbox";
124 + compatible = "magicbox";
125 + dcr-parent = <&{/cpus/cpu@0}>;
126 +
127 + aliases {
128 + ethernet0 = &EMAC0;
129 + ethernet1 = &EMAC1;
130 + serial0 = &UART0;
131 + serial1 = &UART1;
132 + };
133 +
134 + cpus {
135 + #address-cells = <1>;
136 + #size-cells = <0>;
137 +
138 + cpu@0 {
139 + device_type = "cpu";
140 + model = "PowerPC,405EP";
141 + reg = <0x00000000>;
142 + clock-frequency = <0>; /* Filled in by zImage */
143 + timebase-frequency = <0>; /* Filled in by zImage */
144 + i-cache-line-size = <0x20>;
145 + d-cache-line-size = <0x20>;
146 + i-cache-size = <0x4000>;
147 + d-cache-size = <0x4000>;
148 + dcr-controller;
149 + dcr-access-method = "native";
150 + };
151 + };
152 +
153 + memory {
154 + device_type = "memory";
155 + reg = <0x00000000 0x00000000>; /* Filled in by zImage */
156 + };
157 +
158 + UIC0: interrupt-controller {
159 + compatible = "ibm,uic";
160 + interrupt-controller;
161 + cell-index = <0>;
162 + dcr-reg = <0x0c0 0x009>;
163 + #address-cells = <0>;
164 + #size-cells = <0>;
165 + #interrupt-cells = <2>;
166 + };
167 +
168 + plb {
169 + compatible = "ibm,plb3";
170 + #address-cells = <1>;
171 + #size-cells = <1>;
172 + ranges;
173 + clock-frequency = <0>; /* Filled in by zImage */
174 +
175 + SDRAM0: memory-controller {
176 + compatible = "ibm,sdram-405ep";
177 + dcr-reg = <0x010 0x002>;
178 + };
179 +
180 + MAL: mcmal {
181 + compatible = "ibm,mcmal-405ep", "ibm,mcmal";
182 + dcr-reg = <0x180 0x062>;
183 + num-tx-chans = <4>;
184 + num-rx-chans = <2>;
185 + interrupt-parent = <&UIC0>;
186 + interrupts = <
187 + 0xb 0x4 /* TXEOB */
188 + 0xc 0x4 /* RXEOB */
189 + 0xa 0x4 /* SERR */
190 + 0xd 0x4 /* TXDE */
191 + 0xe 0x4 /* RXDE */>;
192 + };
193 +
194 + POB0: opb {
195 + compatible = "ibm,opb-405ep", "ibm,opb";
196 + #address-cells = <1>;
197 + #size-cells = <1>;
198 + ranges = <0xef600000 0xef600000 0x00a00000>;
199 + dcr-reg = <0x0a0 0x005>;
200 + clock-frequency = <0>; /* Filled in by zImage */
201 +
202 + UART0: serial@ef600300 {
203 + device_type = "serial";
204 + compatible = "ns16550";
205 + reg = <0xef600300 0x00000008>;
206 + virtual-reg = <0xef600300>;
207 + clock-frequency = <0>; /* Filled in by zImage */
208 + current-speed = <115200>;
209 + interrupt-parent = <&UIC0>;
210 + interrupts = <0x0 0x4>;
211 + };
212 +
213 + UART1: serial@ef600400 {
214 + device_type = "serial";
215 + compatible = "ns16550";
216 + reg = <0xef600400 0x00000008>;
217 + virtual-reg = <0xef600400>;
218 + clock-frequency = <0>; /* Filled in by zImage */
219 + current-speed = <115200>;
220 + interrupt-parent = <&UIC0>;
221 + interrupts = <0x1 0x4>;
222 + };
223 +
224 + IIC: i2c@ef600500 {
225 + compatible = "ibm,iic-405ep", "ibm,iic";
226 + #address-cells = <1>;
227 + #size-cells = <0>;
228 + reg = <0xef600500 0x00000011>;
229 + interrupt-parent = <&UIC0>;
230 + interrupts = <0x2 0x4>;
231 +
232 + dtt@48 {
233 + compatible = "national,lm75";
234 + reg = <0x48>;
235 + };
236 +
237 + eeprom@50 {
238 + compatible = "at24,24c16";
239 + reg = <0x50>;
240 + };
241 + };
242 +
243 + GPIO0: gpio-controller@ef600700 {
244 + compatible = "ibm,ppc4xx-gpio";
245 + reg = <0xef600700 0x00000020>;
246 + #gpio-cells = <2>;
247 + gpio-controller;
248 + };
249 +
250 + EMAC0: ethernet@ef600800 {
251 + linux,network-index = <0x0>;
252 + device_type = "network";
253 + compatible = "ibm,emac-405ep", "ibm,emac";
254 + interrupt-parent = <&UIC0>;
255 + interrupts = <
256 + 0xf 0x4 /* Ethernet */
257 + 0x9 0x4 /* Ethernet Wake Up */>;
258 + local-mac-address = [000000000000]; /* Filled in by zImage */
259 + reg = <0xef600800 0x00000070>;
260 + mal-device = <&MAL>;
261 + mal-tx-channel = <0>;
262 + mal-rx-channel = <0>;
263 + cell-index = <0>;
264 + max-frame-size = <0x5dc>;
265 + rx-fifo-size = <0x1000>;
266 + tx-fifo-size = <0x800>;
267 + phy-mode = "mii";
268 + phy-map = <0x00000000>;
269 + };
270 +
271 + EMAC1: ethernet@ef600900 {
272 + linux,network-index = <0x1>;
273 + device_type = "network";
274 + compatible = "ibm,emac-405ep", "ibm,emac";
275 + interrupt-parent = <&UIC0>;
276 + interrupts = <
277 + 0x11 0x4 /* Ethernet */
278 + 0x09 0x4 /* Ethernet Wake Up */>;
279 + local-mac-address = [000000000000]; /* Filled in by zImage */
280 + reg = <0xef600900 0x00000070>;
281 + mal-device = <&MAL>;
282 + mal-tx-channel = <2>;
283 + mal-rx-channel = <1>;
284 + cell-index = <1>;
285 + max-frame-size = <0x5dc>;
286 + rx-fifo-size = <0x1000>;
287 + tx-fifo-size = <0x800>;
288 + mdio-device = <&EMAC0>;
289 + phy-mode = "mii";
290 + phy-map = <0x00000001>;
291 + };
292 +
293 + leds {
294 + compatible = "gpio-leds";
295 + user {
296 + label = "magicbox:red:user";
297 + gpios = <&GPIO0 2 1>;
298 + };
299 + };
300 + };
301 +
302 + EBC0: ebc {
303 + compatible = "ibm,ebc-405ep", "ibm,ebc";
304 + dcr-reg = <0x012 0x002>;
305 + #address-cells = <2>;
306 + #size-cells = <1>;
307 + /* The ranges property is supplied by the bootwrapper
308 + * and is based on the firmware's configuration of the
309 + * EBC bridge
310 + */
311 + clock-frequency = <0>; /* Filled in by zImage */
312 +
313 + cf_card@ff100000 {
314 + compatible = "magicbox-cf", "pata-magicbox-cf";
315 + reg = <0x00000000 0xff100000 0x00001000
316 + 0x00000000 0xff200000 0x00001000>;
317 + interrupt-parent = <&UIC0>;
318 + interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
319 + };
320 +
321 + nor_flash@ffc00000 {
322 + compatible = "cfi-flash";
323 + bank-width = <2>;
324 + reg = <0x00000000 0xffc00000 0x00400000>;
325 + #address-cells = <1>;
326 + #size-cells = <1>;
327 + partition0@0 {
328 + label = "linux";
329 + reg = <0x0 0x160000>;
330 + };
331 + partition1@120000 {
332 + label = "rootfs";
333 + reg = <0x160000 0x260000>;
334 + };
335 + partition2@3c0000 {
336 + label = "u-boot";
337 + reg = <0x3c0000 0x30000>;
338 + read-only;
339 + };
340 + partition3@0 {
341 + label = "firmware";
342 + reg = <0x0 0x3c0000>;
343 + };
344 + };
345 + };
346 +
347 + PCI0: pci@ec000000 {
348 + device_type = "pci";
349 + #interrupt-cells = <1>;
350 + #size-cells = <2>;
351 + #address-cells = <3>;
352 + compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
353 + primary;
354 + reg = <0xeec00000 0x00000008 /* Config space access */
355 + 0xeed80000 0x00000004 /* IACK */
356 + 0xeed80000 0x00000004 /* Special cycle */
357 + 0xef480000 0x00000040>; /* Internal registers */
358 +
359 + /* Outbound ranges, one memory and one IO,
360 + * later cannot be changed. Chip supports a second
361 + * IO range but we don't use it for now
362 + */
363 + ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
364 + 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
365 +
366 + /* Inbound 2GB range starting at 0 */
367 + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
368 +
369 + interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
370 + interrupt-map = <
371 + /* IDSEL 1 */
372 + 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
373 +
374 + /* IDSEL 2 */
375 + 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
376 +
377 + /* IDSEL 3 */
378 + 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
379 +
380 + /* IDSEL 4 */
381 + 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
382 + >;
383 + };
384 + };
385 +
386 + chosen {
387 + linux,stdout-path = "/plb/opb/serial@ef600300";
388 + };
389 +};
390 --- a/arch/powerpc/boot/Makefile
391 +++ b/arch/powerpc/boot/Makefile
392 @@ -50,6 +50,7 @@ $(obj)/cuboot-hotfoot.o: BOOTCFLAGS += -
393 $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=440
394 $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=440
395 $(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
396 +$(obj)/cuboot-magicbox.o: BOOTCFLAGS += -mcpu=405
397 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
398 $(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405
399 $(obj)/treeboot-currituck.o: BOOTCFLAGS += -mcpu=405
400 @@ -86,7 +87,8 @@ src-plat-y := of.c epapr.c
401 src-plat-$(CONFIG_40x) += fixed-head.S ep405.c cuboot-hotfoot.c \
402 treeboot-walnut.c cuboot-acadia.c \
403 cuboot-kilauea.c simpleboot.c \
404 - virtex405-head.S virtex.c
405 + virtex405-head.S virtex.c \
406 + cuboot-magicbox.c
407 src-plat-$(CONFIG_44x) += treeboot-ebony.c cuboot-ebony.c treeboot-bamboo.c \
408 cuboot-bamboo.c cuboot-sam440ep.c \
409 cuboot-sequoia.c cuboot-rainier.c \
410 @@ -238,6 +240,7 @@ image-$(CONFIG_HOTFOOT) += cuImage.hot
411 image-$(CONFIG_WALNUT) += treeImage.walnut
412 image-$(CONFIG_ACADIA) += cuImage.acadia
413 image-$(CONFIG_OBS600) += uImage.obs600
414 +image-$(CONFIG_MAGICBOX) += cuImage.magicbox
415
416 # Board ports in arch/powerpc/platform/44x/Kconfig
417 image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
418 --- a/arch/powerpc/platforms/40x/Kconfig
419 +++ b/arch/powerpc/platforms/40x/Kconfig
420 @@ -37,6 +37,16 @@ config KILAUEA
421 help
422 This option enables support for the AMCC PPC405EX evaluation board.
423
424 +config MAGICBOX
425 + bool "Magicbox"
426 + depends on 40x
427 + default n
428 + select PPC40x_SIMPLE
429 + select 405EP
430 + select PCI
431 + help
432 + This option enables support for the Magicbox boards.
433 +
434 config MAKALU
435 bool "Makalu"
436 depends on 40x
437 --- a/arch/powerpc/platforms/40x/ppc40x_simple.c
438 +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
439 @@ -58,6 +58,7 @@ static const char * const board[] __init
440 "apm,klondike",
441 "est,hotfoot",
442 "plathome,obs600",
443 + "magicbox",
444 NULL
445 };
446
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