88bd3272d7a0e44883ea1ae93e012556487fd983
[openwrt/openwrt.git] / target / linux / ramips / dts / ArcherC50.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
7
8 / {
9 compatible = "tplink,c50", "ralink,mt7620a-soc";
10 model = "TP-Link Archer C50";
11
12 chosen {
13 bootargs = "console=ttyS0,115200";
14 };
15
16 gpio-leds {
17 compatible = "gpio-leds";
18
19 lan {
20 label = "c50:green:lan";
21 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
22 };
23
24 power {
25 label = "c50:green:power";
26 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
27 default-state = "on";
28 };
29
30 usb {
31 label = "c50:green:usb";
32 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
33 };
34
35 wan {
36 label = "c50:green:wan";
37 gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
38 };
39
40 wan_orange {
41 label = "c50:orange:wan";
42 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
43 };
44
45 wlan5g {
46 label = "c50:green:wlan5g";
47 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
48 };
49
50 wlan2g {
51 label = "c50:green:wlan2g";
52 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
53 };
54
55 wps {
56 label = "c50:green:wps";
57 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
58 };
59 };
60
61 gpio-keys-polled {
62 compatible = "gpio-keys-polled";
63 #address-cells = <1>;
64 #size-cells = <0>;
65 poll-interval = <20>;
66
67 reset {
68 label = "reset";
69 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
70 linux,code = <KEY_RESTART>;
71 };
72
73 rfkill {
74 label = "rfkill";
75 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
76 linux,code = <KEY_RFKILL>;
77 }; };
78 };
79
80 &gpio1 {
81 status = "okay";
82 };
83
84 &gpio2 {
85 status = "okay";
86 };
87
88 &gpio3 {
89 status = "okay";
90 };
91
92 &spi0 {
93 status = "okay";
94
95 m25p80@0 {
96 #address-cells = <1>;
97 #size-cells = <1>;
98 compatible = "jedec,spi-nor";
99 reg = <0>;
100 spi-max-frequency = <10000000>;
101
102 partition@0 {
103 label = "u-boot";
104 reg = <0x0 0x20000>;
105 read-only;
106 };
107
108 partition@20000 {
109 label = "firmware";
110 reg = <0x20000 0x7a0000>;
111 };
112
113 partition@7c0000 {
114 label = "config";
115 reg = <0x7c0000 0x10000>;
116 read-only;
117 };
118
119 rom: partition@7d0000 {
120 label = "rom";
121 reg = <0x7d0000 0x10000>;
122 read-only;
123 };
124
125 partition@7e0000 {
126 label = "romfile";
127 reg = <0x7e0000 0x10000>;
128 read-only;
129 };
130
131 radio: partition@7f0000 {
132 label = "radio";
133 reg = <0x7f0000 0x10000>;
134 read-only;
135 };
136 };
137 };
138
139 &pinctrl {
140 state_default: pinctrl0 {
141 gpio {
142 ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "ephy", "spi refclk", "mdio", "wdt", "nd_sd";
143 ralink,function = "gpio";
144 };
145 };
146 };
147
148 &ethernet {
149 pinctrl-names = "default";
150 mtd-mac-address = <&rom 0xf100>;
151 mediatek,portmap = "wllll";
152 };
153
154 &ehci {
155 status = "okay";
156 };
157
158 &ohci {
159 status = "okay";
160 };
161
162 &gsw {
163 mediatek,port4 = "ephy";
164 };
165
166 &wmac {
167 ralink,mtd-eeprom = <&radio 0>;
168 mtd-mac-address = <&rom 0xf100>;
169 mtd-mac-address-increment = <(-2)>;
170 pinctrl-names = "default";
171 pinctrl-0 = <&pa_pins>;
172 };
173
174 &pcie {
175 status = "okay";
176
177 pcie-bridge {
178 mt76@0,0 {
179 reg = <0x0000 0 0 0 0>;
180 device_type = "pci";
181 mediatek,mtd-eeprom = <&radio 32768>;
182 ieee80211-freq-limit = <5000000 6000000>;
183 mtd-mac-address = <&rom 0xf100>;
184 mtd-mac-address-increment = <(-1)>;
185 };
186 };
187 };