bbbf0af3889b292b8b1f03fc0609affe8f5ea500
[openwrt/openwrt.git] / target / linux / ramips / dts / ArcherMR200.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
6
7 / {
8 compatible = "ralink,mt7620a-soc";
9 model = "TP-Link Archer MR200";
10
11 chosen {
12 bootargs = "console=ttyS0,115200";
13 };
14
15 gpio-leds {
16 compatible = "gpio-leds";
17
18 lan {
19 label = "mr200:white:lan";
20 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
21 };
22
23 wan {
24 label = "mr200:white:wan";
25 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
26 };
27
28 power {
29 label = "mr200:white:power";
30 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
31 };
32
33 4g {
34 label = "mr200:white:4g";
35 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
36 };
37
38 wps {
39 label = "mr200:white:wps";
40 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
41 };
42
43 signal1 {
44 label = "mr200:white:signal1";
45 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
46 };
47
48 signal2 {
49 label = "mr200:white:signal2";
50 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
51 };
52
53 signal3 {
54 label = "mr200:white:signal3";
55 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
56 };
57
58 signal4 {
59 label = "mr200:white:signal4";
60 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
61 };
62
63 wlan {
64 label = "mr200:white:wlan";
65 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
66 };
67 };
68
69 gpio-keys {
70 compatible = "gpio-keys";
71 #address-cells = <1>;
72 #size-cells = <0>;
73
74 reset {
75 label = "reset";
76 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
77 linux,code = <KEY_RESTART>;
78 };
79
80 rfkill {
81 label = "rfkill";
82 gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
83 linux,code = <KEY_RFKILL>;
84 };
85 };
86
87 gpio_export {
88 compatible = "gpio-export";
89 #size-cells = <0>;
90
91 power_usb {
92 gpio-export,name = "power_usb1";
93 gpio-export,output = <1>;
94 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
95 };
96 };
97
98 };
99
100 &gpio1 {
101 status = "okay";
102 };
103
104 &gpio2 {
105 status = "okay";
106 };
107
108 &gpio3 {
109 status = "okay";
110 };
111
112 &spi0 {
113 status = "okay";
114
115 m25p80@0 {
116 #address-cells = <1>;
117 #size-cells = <1>;
118 compatible = "jedec,spi-nor";
119 reg = <0>;
120 spi-max-frequency = <10000000>;
121
122 partition@0 {
123 label = "u-boot";
124 reg = <0x0 0x20000>;
125 read-only;
126 };
127
128 partition@20000 {
129 label = "firmware";
130 reg = <0x20000 0x7b0000>;
131 };
132
133 rom: partition@7d0000 {
134 label = "rom";
135 reg = <0x7d0000 0x10000>;
136 read-only;
137 };
138
139 partition@7e0000 {
140 label = "romfile";
141 reg = <0x7e0000 0x10000>;
142 read-only;
143 };
144
145 radio: partition@7f0000 {
146 label = "radio";
147 reg = <0x7f0000 0x10000>;
148 read-only;
149 };
150 };
151 };
152
153 &pinctrl {
154 state_default: pinctrl0 {
155 gpio {
156 ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
157 ralink,function = "gpio";
158 };
159 };
160 };
161
162 &ethernet {
163 mtd-mac-address = <&rom 0xf100>;
164 mediatek,portmap = "llll";
165 };
166
167 &ehci {
168 status = "okay";
169 };
170
171 &ohci {
172 status = "okay";
173 };
174
175 &gsw {
176 mediatek,port4 = "ephy";
177 };
178
179 &wmac {
180 ralink,mtd-eeprom = <&radio 0>;
181 };
182
183 &pcie {
184 status = "okay";
185
186 pcie-bridge {
187 mt76@0,0 {
188 reg = <0x0000 0 0 0 0>;
189 device_type = "pci";
190 mediatek,mtd-eeprom = <&radio 32768>;
191 mediatek,2ghz = <0>;
192 };
193 };
194 };