81d897a0e84dda650bab3cb4dcde4cbb178349f9
[openwrt/openwrt.git] / target / linux / ramips / dts / CS-QR10.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/input/input.h>
6
7 / {
8 compatible = "ralink,mt7620a-soc";
9 model = "Planex CS-QR10";
10
11 gpio-leds {
12 compatible = "gpio-leds";
13
14 power {
15 label = "cs-qr10:red:power";
16 gpios = <&gpio1 4 1>;
17 };
18 };
19
20 gpio-keys-polled {
21 compatible = "gpio-keys-polled";
22 #address-cells = <1>;
23 #size-cells = <0>;
24 poll-interval = <20>;
25
26 s1 {
27 label = "reset";
28 gpios = <&gpio1 1 1>;
29 linux,code = <KEY_RESTART>;
30 };
31
32 s2 {
33 label = "wps";
34 gpios = <&gpio1 3 1>;
35 linux,code = <KEY_WPS_BUTTON>;
36 };
37 };
38 };
39
40 &gpio0 {
41 status = "okay";
42 };
43
44 &gpio1 {
45 status = "okay";
46 };
47
48 &gpio2 {
49 status = "okay";
50 };
51
52 &gpio3 {
53 status = "okay";
54 };
55
56 &i2c {
57 status = "okay";
58 };
59
60 &i2s {
61 status = "okay";
62 pinctrl-names = "default";
63 pinctrl-0 = <&pcm_i2s_pins>;
64 };
65
66 &spi0 {
67 status = "okay";
68
69 m25p80@0 {
70 #address-cells = <1>;
71 #size-cells = <1>;
72 compatible = "jedec,spi-nor";
73 reg = <0>;
74 spi-max-frequency = <10000000>;
75
76 partition@0 {
77 label = "u-boot";
78 reg = <0x0 0x30000>;
79 read-only;
80 };
81
82 partition@30000 {
83 label = "u-boot-env";
84 reg = <0x30000 0x10000>;
85 read-only;
86 };
87
88 factory: partition@40000 {
89 label = "factory";
90 reg = <0x40000 0x10000>;
91 read-only;
92 };
93
94 partition@50000 {
95 label = "firmware";
96 reg = <0x50000 0x7b0000>;
97 };
98 };
99 };
100
101 &pcm {
102 status = "okay";
103 };
104
105 &gdma {
106 status = "okay";
107 };
108
109 &pinctrl {
110 state_default: pinctrl0 {
111 gpio {
112 ralink,group = "spi refclk", "rgmii1";
113 ralink,function = "gpio";
114 };
115 wdt {
116 ralink,group = "wdt";
117 ralink,function = "wdt refclk";
118 };
119 };
120 };
121
122 &ethernet {
123 pinctrl-names = "default";
124 pinctrl-0 = <&ephy_pins>;
125 mtd-mac-address = <&factory 0x4>;
126 mediatek,portmap = "llllw";
127 };
128
129 &gsw {
130 ralink,port4 = "ephy";
131 };
132
133 &sdhci {
134 status = "okay";
135 };
136
137 &ehci {
138 status = "okay";
139 };
140
141 &ohci {
142 status = "okay";
143 };
144
145 &wmac {
146 ralink,mtd-eeprom = <&factory 0>;
147 };
148
149 &pcie {
150 status = "okay";
151 };