target/linux/ramips/dts/GL-MT750.dts

   1 /dts-v1/;
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "glinet,gl-mt750", "ralink,mt7620a-soc";
  10         model = "GL-MT750";
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,115200";
  14         };
  15
  16         gpio-leds {
  17                 compatible = "gpio-leds";
  18
  19                 wan {
  20                         label = "gl-mt750:wan";
  21                         gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
  22                 };
  23
  24                 lan {
  25                         label = "gl-mt750:lan";
  26                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  27                 };
  28
  29                 wlan {
  30                         label = "gl-mt750:wlan";
  31                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  32                 };
  33         };
  34
  35         keys {
  36                 compatible = "gpio-keys-polled";
  37                 poll-interval = <20>;
  38                 reset {
  39                         label = "reset";
  40                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  41                         linux,code = <KEY_RESTART>;
  42                 };
  43
  44                 BTN_0 {
  45                         label = "BTN_0";
  46                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  47                         linux,code = <BTN_0>;
  48                 };
  49
  50                 BTN_1 {
  51                         label = "BTN_1";
  52                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  53                         linux,code = <BTN_1>;
  54                 };
  55         };
  56 };
  57
  58 &gpio0 {
  59         status = "okay";
  60 };
  61
  62 &gpio1 {
  63         status = "okay";
  64 };
  65
  66 &gpio2 {
  67         status = "okay";
  68 };
  69
  70 &gpio3 {
  71         status = "okay";
  72 };
  73
  74 &spi0 {
  75         status = "okay";
  76
  77         m25p80@0 {
  78                 compatible = "jedec,spi-nor";
  79                 reg = <0>;
  80                 spi-max-frequency = <10000000>;
  81
  82                 partitions {
  83                         compatible = "fixed-partitions";
  84                         #address-cells = <1>;
  85                         #size-cells = <1>;
  86
  87                         partition@0 {
  88                                 label = "u-boot";
  89                                 reg = <0x0 0x30000>;
  90                         };
  91
  92                         partition@30000 {
  93                                 label = "u-boot-env";
  94                                 reg = <0x30000 0x10000>;
  95                                 read-only;
  96                         };
  97
  98                         factory: partition@40000 {
  99                                 label = "factory";
 100                                 reg = <0x40000 0x10000>;
 101                                 read-only;
 102                         };
 103
 104                         partition@50000 {
 105                                 compatible = "denx,uimage";
 106                                 label = "firmware";
 107                                 reg = <0x50000 0xf80000>;
 108                         };
 109
 110                         partition@ff0000 {
 111                                 label = "art";
 112                                 reg = <0xff0000 0x10000>;
 113                         };
 114                 };
 115         };
 116 };
 117
 118 &sdhci {
 119         status = "okay";
 120 };
 121
 122 &ehci {
 123         status = "okay";
 124 };
 125
 126 &ohci {
 127         status = "okay";
 128 };
 129
 130 &ethernet {
 131         mtd-mac-address = <&factory 0x4000>;
 132         mediatek,portmap = "llllw";
 133 };
 134
 135 &wmac {
 136         ralink,mtd-eeprom = <&factory 0>;
 137 };
 138
 139 &pcie {
 140         status = "okay";
 141 };
 142
 143 &pcie0 {
 144         mt76@0,0 {
 145                 reg = <0x0000 0 0 0 0>;
 146                 mediatek,mtd-eeprom = <&factory 0x8000>;
 147         };
 148 };
 149
 150 &pinctrl {
 151         state_default: pinctrl0 {
 152                 gpio {
 153                         ralink,group = "wled","ephy","uartf";
 154                         ralink,function = "gpio";
 155                 };
 156         };
 157 };