be96fa9de9726871f175019fdccddf952843d6f2
[openwrt/openwrt.git] / target / linux / ramips / dts / MT7620a.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
10 model = "Ralink MT7620a + MT7610e evaluation board";
11
12 gpio-keys-polled {
13 compatible = "gpio-keys";
14 poll-interval = <20>;
15
16 s2 {
17 label = "S2";
18 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
19 linux,code = <BTN_0>;
20 };
21
22 s3 {
23 label = "S3";
24 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
25 linux,code = <BTN_1>;
26 };
27 };
28 };
29
30 &spi0 {
31 status = "okay";
32
33 m25p80@0 {
34 compatible = "jedec,spi-nor";
35 reg = <0>;
36 spi-max-frequency = <10000000>;
37
38 partitions {
39 compatible = "fixed-partitions";
40 #address-cells = <1>;
41 #size-cells = <1>;
42
43 partition@0 {
44 label = "u-boot";
45 reg = <0x0 0x30000>;
46 read-only;
47 };
48
49 partition@30000 {
50 label = "u-boot-env";
51 reg = <0x30000 0x10000>;
52 read-only;
53 };
54
55 factory: partition@40000 {
56 label = "factory";
57 reg = <0x40000 0x10000>;
58 read-only;
59 };
60
61 partition@50000 {
62 compatible = "denx,uimage";
63 label = "firmware";
64 reg = <0x50000 0x7b0000>;
65 };
66 };
67 };
68 };
69
70 &pinctrl {
71 state_default: pinctrl0 {
72 gpio {
73 ralink,group = "i2c", "uartf";
74 ralink,function = "gpio";
75 };
76 };
77 };
78
79 &ethernet {
80 status = "okay";
81 pinctrl-names = "default";
82 pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
83 mediatek,portmap = "llllw";
84
85 port@4 {
86 status = "okay";
87 phy-mode = "rgmii";
88 phy-handle = <&phy4>;
89 };
90
91 port@5 {
92 status = "okay";
93 phy-mode = "rgmii";
94 phy-handle = <&phy5>;
95 };
96
97 mdio-bus {
98 status = "okay";
99
100 phy4: ethernet-phy@4 {
101 reg = <4>;
102 phy-mode = "rgmii";
103 };
104
105 phy5: ethernet-phy@5 {
106 reg = <5>;
107 phy-mode = "rgmii";
108 };
109 };
110 };
111
112 &gsw {
113 mediatek,port4 = "gmac";
114 };
115
116 &sdhci {
117 status = "okay";
118 };
119
120 &pcie {
121 status = "okay";
122 };
123
124 &ehci {
125 status = "okay";
126 };
127
128 &ohci {
129 status = "okay";
130 };