mt76: update to the latest version
[openwrt/openwrt.git] / target / linux / ramips / dts / MZK-750DHP.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/input/input.h>
6
7 / {
8 compatible = "ralink,mt7620a-soc";
9 model = "Planex MZK-750DHP";
10
11 gpio-leds {
12 compatible = "gpio-leds";
13
14 wps {
15 label = "mzk-750dhp:green:wps";
16 gpios = <&gpio2 15 1>;
17 };
18
19 power {
20 label = "mzk-750dhp:green:power";
21 gpios = <&gpio1 15 1>;
22 };
23
24 wlan5g {
25 label = "mzk-750dhp:green:wlan5g";
26 gpios = <&gpio1 14 1>;
27 };
28 };
29
30 gpio-keys-polled {
31 compatible = "gpio-keys-polled";
32 #address-cells = <1>;
33 #size-cells = <0>;
34 poll-interval = <20>;
35
36 s1 {
37 label = "reset";
38 gpios = <&gpio0 1 1>;
39 linux,code = <KEY_RESTART>;
40 };
41
42 s2 {
43 label = "wps";
44 gpios = <&gpio2 19 1>;
45 linux,code = <KEY_WPS_BUTTON>;
46 };
47 };
48 };
49
50 &gpio1 {
51 status = "okay";
52 };
53
54 &gpio2 {
55 status = "okay";
56 };
57
58 &spi0 {
59 status = "okay";
60
61 m25p80@0 {
62 #address-cells = <1>;
63 #size-cells = <1>;
64 compatible = "jedec,spi-nor";
65 reg = <0>;
66 linux,modalias = "m25p80", "mx25l6405d";
67 spi-max-frequency = <10000000>;
68
69 partition@0 {
70 label = "u-boot";
71 reg = <0x0 0x30000>;
72 read-only;
73 };
74
75 partition@30000 {
76 label = "u-boot-env";
77 reg = <0x30000 0x10000>;
78 read-only;
79 };
80
81 factory: partition@40000 {
82 label = "factory";
83 reg = <0x40000 0x10000>;
84 read-only;
85 };
86
87 partition@50000 {
88 label = "firmware";
89 reg = <0x50000 0x7b0000>;
90 };
91 };
92 };
93
94 &pinctrl {
95 state_default: pinctrl0 {
96 gpio {
97 ralink,group = "i2c", "spi refclk", "rgmii1", "nd_sd";
98 ralink,function = "gpio";
99 };
100 };
101 };
102
103 &ethernet {
104 pinctrl-names = "default";
105 pinctrl-0 = <&ephy_pins>;
106 mtd-mac-address = <&factory 0x4>;
107 mediatek,portmap = "llllw";
108 };
109
110 &gsw {
111 mediatek,port4 = "ephy";
112 };
113
114 &wmac {
115 ralink,mtd-eeprom = <&factory 0>;
116 };
117
118 &pcie {
119 status = "okay";
120
121 pcie-bridge {
122 mt76@0,0 {
123 reg = <0x0000 0 0 0 0>;
124 device_type = "pci";
125 mediatek,mtd-eeprom = <&factory 0x8000>;
126 };
127 };
128 };