522bc7585510f9ce0e73c26117f0b35914083971
[openwrt/openwrt.git] / target / linux / ramips / dts / NA930.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/input/input.h>
6
7 / {
8 compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
9 model = "Sercomm NA930";
10
11 chosen {
12 bootargs = "console=ttyS1,57600";
13 };
14
15 nand {
16 #address-cells = <1>;
17 #size-cells = <1>;
18 compatible = "mtk,mt7620-nand";
19
20 partition@0 {
21 label = "u-boot";
22 reg = <0x0 0x20000>;
23 read-only;
24 };
25
26 partition@200000 {
27 label = "factory";
28 reg = <0x200000 0x40000>;
29 read-only;
30 };
31
32 partition@240000 {
33 label = "Config";
34 reg = <0x240000 0x400000>;
35 read-only;
36 };
37
38 partition@640000 {
39 label = "firmware";
40 reg = <0x640000 0x1400000>;
41 };
42 };
43
44 gpio-keys-polled {
45 compatible = "gpio-keys-polled";
46 #address-cells = <1>;
47 #size-cells = <0>;
48 poll-interval = <20>;
49
50 reset {
51 label = "reset";
52 gpios = <&gpio0 11 1>;
53 linux,code = <KEY_RESTART>;
54 };
55
56 zwave {
57 label = "zwave";
58 gpios = <&gpio0 12 1>;
59 linux,code = <BTN_0>;
60 };
61
62 wps {
63 label = "wps";
64 gpios = <&gpio0 14 1>;
65 linux,code = <KEY_WPS_BUTTON>;
66 };
67 };
68
69 gpio-leds {
70 compatible = "gpio-leds";
71
72 zwave {
73 label = "na930:blue:zwave";
74 gpios = <&gpio2 0 1>;
75 };
76
77 status {
78 label = "na930:blue:status";
79 gpios = <&gpio2 26 1>;
80 };
81
82 service {
83 label = "na930:blue:service";
84 gpios = <&gpio2 28 1>;
85 };
86
87 power {
88 label = "na930:blue:power";
89 gpios = <&gpio2 29 1>;
90 };
91 };
92
93 gpio_export {
94 compatible = "gpio-export";
95 #size-cells = <0>;
96
97 telit {
98 gpio-export,name = "telit";
99 gpio-export,output = <1>;
100 gpios = <&gpio0 13 0>;
101 };
102 };
103 };
104
105 &pinctrl {
106 state_default: pinctrl0 {
107 gpio {
108 ralink,group = "i2c", "rgmii2", "spi", "ephy";
109 ralink,function = "gpio";
110 };
111
112 uartf_gpio {
113 ralink,group = "uartf";
114 ralink,function = "gpio uartf";
115 };
116 };
117 };
118
119 &uart {
120 status = "okay";
121 };
122
123 &gpio1 {
124 status = "okay";
125 };
126
127 &gpio2 {
128 status = "okay";
129 };
130
131 &ethernet {
132 status = "okay";
133 pinctrl-names = "default";
134 pinctrl-0 = <&rgmii1_pins &mdio_pins>;
135 mediatek,portmap = "llllw";
136
137 port@4 {
138 status = "okay";
139 phy-handle = <&phy4>;
140 phy-mode = "rgmii";
141 };
142
143 port@5 {
144 status = "okay";
145 phy-handle = <&phy5>;
146 phy-mode = "rgmii";
147 };
148
149 mdio-bus {
150 status = "okay";
151
152 phy4: ethernet-phy@4 {
153 reg = <4>;
154 phy-mode = "rgmii";
155 };
156
157 phy5: ethernet-phy@5 {
158 reg = <5>;
159 phy-mode = "rgmii";
160 };
161 };
162 };
163
164 &gsw {
165 mediatek,port4 = "gmac";
166 };
167
168 &ehci {
169 status = "okay";
170 };
171
172 &ohci {
173 status = "okay";
174 };