target/linux/ramips/dts/mt7620a.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "ralink,mtk7620a-soc";
   5
   6         cpus {
   7                 cpu@0 {
   8                         compatible = "mips,mips24KEc";
   9                 };
  10         };
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,57600";
  14         };
  15
  16         cpuintc: cpuintc@0 {
  17                 #address-cells = <0>;
  18                 #interrupt-cells = <1>;
  19                 interrupt-controller;
  20                 compatible = "mti,cpu-interrupt-controller";
  21         };
  22
  23         aliases {
  24                 spi0 = &spi0;
  25                 spi1 = &spi1;
  26         };
  27
  28         palmbus@10000000 {
  29                 compatible = "palmbus";
  30                 reg = <0x10000000 0x200000>;
  31                 ranges = <0x0 0x10000000 0x1FFFFF>;
  32
  33                 #address-cells = <1>;
  34                 #size-cells = <1>;
  35
  36                 sysc@0 {
  37                         compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
  38                         reg = <0x0 0x100>;
  39                 };
  40
  41                 timer@100 {
  42                         compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
  43                         reg = <0x100 0x20>;
  44
  45                         interrupt-parent = <&intc>;
  46                         interrupts = <1>;
  47                 };
  48
  49                 watchdog@120 {
  50                         compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
  51                         reg = <0x120 0x10>;
  52
  53                         resets = <&rstctrl 8>;
  54                         reset-names = "wdt";
  55
  56                         interrupt-parent = <&intc>;
  57                         interrupts = <1>;
  58                 };
  59
  60                 intc: intc@200 {
  61                         compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
  62                         reg = <0x200 0x100>;
  63
  64                         resets = <&rstctrl 19>;
  65                         reset-names = "intc";
  66
  67                         interrupt-controller;
  68                         #interrupt-cells = <1>;
  69
  70                         interrupt-parent = <&cpuintc>;
  71                         interrupts = <2>;
  72                 };
  73
  74                 memc@300 {
  75                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  76                         reg = <0x300 0x100>;
  77
  78                         resets = <&rstctrl 20>;
  79                         reset-names = "mc";
  80
  81                         interrupt-parent = <&intc>;
  82                         interrupts = <3>;
  83                 };
  84
  85                 uart@500 {
  86                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
  87                         reg = <0x500 0x100>;
  88
  89                         resets = <&rstctrl 12>;
  90                         reset-names = "uart";
  91
  92                         interrupt-parent = <&intc>;
  93                         interrupts = <5>;
  94
  95                         reg-shift = <2>;
  96
  97                         status = "disabled";
  98                 };
  99
 100                 gpio0: gpio@600 {
 101                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 102                         reg = <0x600 0x34>;
 103
 104                         resets = <&rstctrl 13>;
 105                         reset-names = "pio";
 106
 107                         interrupt-parent = <&intc>;
 108                         interrupts = <6>;
 109
 110                         gpio-controller;
 111                         #gpio-cells = <2>;
 112
 113                         ralink,gpio-base = <0>;
 114                         ralink,num-gpios = <24>;
 115                         ralink,register-map = [ 00 04 08 0c
 116                                                 20 24 28 2c
 117                                                 30 34 ];
 118                 };
 119
 120                 gpio1: gpio@638 {
 121                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 122                         reg = <0x638 0x24>;
 123
 124                         interrupt-parent = <&intc>;
 125                         interrupts = <6>;
 126
 127                         gpio-controller;
 128                         #gpio-cells = <2>;
 129
 130                         ralink,gpio-base = <24>;
 131                         ralink,num-gpios = <16>;
 132                         ralink,register-map = [ 00 04 08 0c
 133                                                 10 14 18 1c
 134                                                 20 24 ];
 135
 136                         status = "disabled";
 137                 };
 138
 139                 gpio2: gpio@660 {
 140                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 141                         reg = <0x660 0x24>;
 142
 143                         interrupt-parent = <&intc>;
 144                         interrupts = <6>;
 145
 146                         gpio-controller;
 147                         #gpio-cells = <2>;
 148
 149                         ralink,gpio-base = <40>;
 150                         ralink,num-gpios = <32>;
 151                         ralink,register-map = [ 00 04 08 0c
 152                                                 10 14 18 1c
 153                                                 20 24 ];
 154
 155                         status = "disabled";
 156                 };
 157
 158                 gpio3: gpio@688 {
 159                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 160                         reg = <0x688 0x24>;
 161
 162                         interrupt-parent = <&intc>;
 163                         interrupts = <6>;
 164
 165                         gpio-controller;
 166                         #gpio-cells = <2>;
 167
 168                         ralink,gpio-base = <72>;
 169                         ralink,num-gpios = <1>;
 170                         ralink,register-map = [ 00 04 08 0c
 171                                                 10 14 18 1c
 172                                                 20 24 ];
 173
 174                         status = "disabled";
 175                 };
 176
 177                 i2c@900 {
 178                         compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c";
 179                         reg = <0x900 0x100>;
 180
 181                         resets = <&rstctrl 16>;
 182                         reset-names = "i2c";
 183
 184                         #address-cells = <1>;
 185                         #size-cells = <0>;
 186
 187                         status = "disabled";
 188
 189                         pinctrl-names = "default";
 190                         pinctrl-0 = <&i2c_pins>;
 191                 };
 192
 193                 i2s@a00 {
 194                         compatible = "ralink,mt7620a-i2s";
 195                         reg = <0xa00 0x100>;
 196
 197                         resets = <&rstctrl 17>;
 198                         reset-names = "i2s";
 199
 200                         interrupt-parent = <&intc>;
 201                         interrupts = <10>;
 202
 203                         dmas = <&gdma 4>,
 204                                 <&gdma 5>;
 205                         dma-names = "tx", "rx";
 206
 207                         status = "disabled";
 208                 };
 209
 210                 spi0: spi@b00 {
 211                         compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
 212                         reg = <0xb00 0x40>;
 213
 214                         resets = <&rstctrl 18>;
 215                         reset-names = "spi";
 216
 217                         #address-cells = <1>;
 218                         #size-cells = <0>;
 219
 220                         status = "disabled";
 221
 222                         pinctrl-names = "default";
 223                         pinctrl-0 = <&spi_pins>;
 224                 };
 225
 226                 spi1: spi@b40 {
 227                         compatible = "ralink,rt2880-spi";
 228                         reg = <0xb40 0x60>;
 229
 230                         resets = <&rstctrl 18>;
 231                         reset-names = "spi";
 232
 233                         #address-cells = <1>;
 234                         #size-cells = <1>;
 235
 236                         status = "disabled";
 237
 238                         pinctrl-names = "default";
 239                         pinctrl-0 = <&spi_cs1>;
 240                 };
 241
 242                 uartlite@c00 {
 243                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 244                         reg = <0xc00 0x100>;
 245
 246                         resets = <&rstctrl 19>;
 247                         reset-names = "uartl";
 248
 249                         interrupt-parent = <&intc>;
 250                         interrupts = <12>;
 251
 252                         reg-shift = <2>;
 253
 254                         pinctrl-names = "default";
 255                         pinctrl-0 = <&uartlite_pins>;
 256                 };
 257
 258                 systick@d00 {
 259                         compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
 260                         reg = <0xd00 0x10>;
 261
 262                         resets = <&rstctrl 28>;
 263                         reset-names = "intc";
 264
 265                         interrupt-parent = <&cpuintc>;
 266                         interrupts = <7>;
 267                 };
 268
 269                 pcm@2000 {
 270                         compatible = "ralink,mt7620a-pcm";
 271                         reg = <0x2000 0x800>;
 272
 273                         resets = <&rstctrl 11>;
 274                         reset-names = "pcm";
 275
 276                         interrupt-parent = <&intc>;
 277                         interrupts = <4>;
 278
 279                         status = "disabled";
 280                 };
 281
 282                 gdma: gdma@2800 {
 283                         compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
 284                         reg = <0x2800 0x800>;
 285
 286                         resets = <&rstctrl 14>;
 287                         reset-names = "dma";
 288
 289                         interrupt-parent = <&intc>;
 290                         interrupts = <7>;
 291
 292                         #dma-cells = <1>;
 293                         #dma-channels = <16>;
 294                         #dma-requests = <16>;
 295
 296                         status = "disabled";
 297                 };
 298         };
 299
 300         pinctrl {
 301                 compatible = "ralink,rt2880-pinmux";
 302                 pinctrl-names = "default";
 303                 pinctrl-0 = <&state_default>;
 304
 305                 state_default: pinctrl0 {
 306                 };
 307
 308                 pcm_i2s_pins: pcm_i2s {
 309                         pcm_i2s {
 310                                 ralink,group = "uartf";
 311                                 ralink,function = "pcm i2s";
 312                         };
 313                 };
 314
 315                 uartf_gpio_pins: uartf_gpio {
 316                         uartf_gpio {
 317                                 ralink,group = "uartf";
 318                                 ralink,function = "gpio uartf";
 319                         };
 320                 };
 321
 322                 spi_pins: spi {
 323                         spi {
 324                                 ralink,group = "spi";
 325                                 ralink,function = "spi";
 326                         };
 327                 };
 328
 329                 spi_cs1: spi1 {
 330                         spi1 {
 331                                 ralink,group = "spi_cs1";
 332                                 ralink,function = "spi_cs1";
 333                         };
 334                 };
 335
 336                 i2c_pins: i2c {
 337                         i2c {
 338                                 ralink,group = "i2c";
 339                                 ralink,function = "i2c";
 340                         };
 341                 };
 342
 343                 uartlite_pins: uartlite {
 344                         uart {
 345                                 ralink,group = "uartlite";
 346                                 ralink,function = "uartlite";
 347                         };
 348                 };
 349
 350                 mdio_pins: mdio {
 351                         mdio {
 352                                 ralink,group = "mdio";
 353                                 ralink,function = "mdio";
 354                         };
 355                 };
 356
 357                 ephy_pins: ephy {
 358                         ephy {
 359                                 ralink,group = "ephy";
 360                                 ralink,function = "ephy";
 361                         };
 362                 };
 363
 364                 wled_pins: wled {
 365                         wled {
 366                                 ralink,group = "wled";
 367                                 ralink,function = "wled";
 368                         };
 369                 };
 370
 371                 rgmii1_pins: rgmii1 {
 372                         rgmii1 {
 373                                 ralink,group = "rgmii1";
 374                                 ralink,function = "rgmii1";
 375                         };
 376                 };
 377
 378                 rgmii2_pins: rgmii2 {
 379                         rgmii2 {
 380                                 ralink,group = "rgmii2";
 381                                 ralink,function = "rgmii2";
 382                         };
 383                 };
 384
 385                 pcie_pins: pcie {
 386                         pcie {
 387                                 ralink,group = "pcie";
 388                                 ralink,function = "pcie rst";
 389                         };
 390                 };
 391         };
 392
 393         rstctrl: rstctrl {
 394                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 395                 #reset-cells = <1>;
 396         };
 397
 398         usbphy: usbphy {
 399                 compatible = "mediatek,mt7620-usbphy";
 400                 #phy-cells = <1>;
 401
 402                 resets = <&rstctrl 22 &rstctrl 25>;
 403                 reset-names = "host", "device";
 404         };
 405
 406         ethernet@10100000 {
 407                 compatible = "mediatek,mt7620-eth";
 408                 reg = <0x10100000 10000>;
 409
 410                 #address-cells = <1>;
 411                 #size-cells = <0>;
 412
 413                 interrupt-parent = <&cpuintc>;
 414                 interrupts = <5>;
 415
 416                 resets = <&rstctrl 21 &rstctrl 23>;
 417                 reset-names = "fe", "esw";
 418
 419                 mediatek,switch = <&gsw>;
 420
 421                 port@4 {
 422                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
 423                         reg = <4>;
 424
 425                         status = "disabled";
 426                 };
 427
 428                 port@5 {
 429                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
 430                         reg = <5>;
 431
 432                         status = "disabled";
 433                 };
 434
 435                 mdio-bus {
 436                         #address-cells = <1>;
 437                         #size-cells = <0>;
 438
 439                         status = "disabled";
 440                 };
 441         };
 442
 443         gsw: gsw@10110000 {
 444                 compatible = "mediatek,mt7620-gsw";
 445                 reg = <0x10110000 8000>;
 446
 447                 resets = <&rstctrl 23>;
 448                 reset-names = "esw";
 449
 450                 interrupt-parent = <&intc>;
 451                 interrupts = <17>;
 452         };
 453
 454         sdhci@10130000 {
 455                 compatible = "ralink,mt7620-sdhci";
 456                 reg = <0x10130000 4000>;
 457
 458                 interrupt-parent = <&intc>;
 459                 interrupts = <14>;
 460
 461                 status = "disabled";
 462         };
 463
 464         ehci@101c0000 {
 465                 compatible = "generic-ehci";
 466                 reg = <0x101c0000 0x1000>;
 467
 468                 interrupt-parent = <&intc>;
 469                 interrupts = <18>;
 470
 471                 phys = <&usbphy 1>;
 472                 phy-names = "usb";
 473
 474                 status = "disabled";
 475         };
 476
 477         ohci@101c1000 {
 478                 compatible = "generic-ohci";
 479                 reg = <0x101c1000 0x1000>;
 480
 481                 interrupt-parent = <&intc>;
 482                 interrupts = <18>;
 483
 484                 phys = <&usbphy 1>;
 485                 phy-names = "usb";
 486
 487                 status = "disabled";
 488         };
 489
 490         pcie@10140000 {
 491                 compatible = "mediatek,mt7620-pci";
 492                 reg = <0x10140000 0x100
 493                         0x10142000 0x100>;
 494
 495                 #address-cells = <3>;
 496                 #size-cells = <2>;
 497
 498                 resets = <&rstctrl 26>;
 499                 reset-names = "pcie0";
 500
 501                 interrupt-parent = <&cpuintc>;
 502                 interrupts = <4>;
 503
 504                 pinctrl-names = "default";
 505                 pinctrl-0 = <&pcie_pins>;
 506
 507                 device_type = "pci";
 508
 509                 bus-range = <0 255>;
 510                 ranges = <
 511                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 512                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 513                 >;
 514
 515                 status = "disabled";
 516
 517                 pcie-bridge {
 518                         reg = <0x0000 0 0 0 0>;
 519
 520                         #address-cells = <3>;
 521                         #size-cells = <2>;
 522
 523                         device_type = "pci";
 524                 };
 525         };
 526
 527         wmac@10180000 {
 528                 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
 529                 reg = <0x10180000 40000>;
 530
 531                 interrupt-parent = <&cpuintc>;
 532                 interrupts = <6>;
 533
 534                 ralink,eeprom = "soc_wmac.eeprom";
 535         };
 536 };