target/linux/ramips/dts/mt7620a_lb-link_bl-w1200.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /dts-v1/;
   4
   5 #include "mt7620a.dtsi"
   6
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/input/input.h>
   9
  10 / {
  11         compatible = "lb-link,bl-w1200", "ralink,mt7620a-soc";
  12         model = "LB-Link BL-W1200";
  13
  14         aliases {
  15                 led-boot = &led_wps;
  16                 led-failsafe = &led_wps;
  17                 led-upgrade = &led_wps;
  18         };
  19
  20         keys {
  21                 compatible = "gpio-keys";
  22
  23                 reset_wps {
  24                         label = "reset_wps";
  25                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  26                         linux,code = <KEY_RESTART>;
  27                 };
  28         };
  29
  30         leds {
  31                 compatible = "gpio-leds";
  32
  33                 led_wps: wps {
  34                         label = "bl-w1200:green:wps";
  35                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  36                 };
  37         };
  38 };
  39
  40 &gpio1 {
  41         status = "okay";
  42 };
  43
  44 &spi0 {
  45         status = "okay";
  46
  47         flash@0 {
  48                 compatible = "jedec,spi-nor";
  49                 reg = <0>;
  50                 spi-max-frequency = <50000000>;
  51
  52                 partitions {
  53                         compatible = "fixed-partitions";
  54                         #address-cells = <1>;
  55                         #size-cells = <1>;
  56
  57                         partition@0 {
  58                                 label = "u-boot";
  59                                 reg = <0x0 0x30000>;
  60                                 read-only;
  61                         };
  62
  63                         partition@30000 {
  64                                 label = "config";
  65                                 reg = <0x30000 0x10000>;
  66                                 read-only;
  67                         };
  68
  69                         factory: partition@40000 {
  70                                 label = "factory";
  71                                 reg = <0x40000 0x10000>;
  72                                 read-only;
  73                         };
  74
  75                         partition@50000 {
  76                                 compatible = "denx,uimage";
  77                                 label = "firmware";
  78                                 reg = <0x50000 0x7b0000>;
  79                         };
  80                 };
  81         };
  82 };
  83
  84 &state_default {
  85         gpio {
  86                 groups = "uartf", "spi refclk";
  87                 function = "gpio";
  88         };
  89 };
  90
  91 &ethernet {
  92         pinctrl-names = "default";
  93         pinctrl-0 = <&rgmii2_pins &mdio_pins>;
  94
  95         mtd-mac-address = <&factory 0x28>;
  96
  97         mediatek,portmap = "wllll";
  98
  99         port@5 {
 100                 status = "okay";
 101                 mediatek,fixed-link = <1000 1 1 1>;
 102                 phy-mode = "rgmii";
 103         };
 104
 105         mdio-bus {
 106                 status = "okay";
 107
 108                 ethernet-phy@0 {
 109                         reg = <0>;
 110                         phy-mode = "rgmii";
 111                 };
 112
 113                 ethernet-phy@1 {
 114                         reg = <1>;
 115                         phy-mode = "rgmii";
 116                 };
 117
 118                 ethernet-phy@2 {
 119                         reg = <2>;
 120                         phy-mode = "rgmii";
 121                 };
 122
 123                 ethernet-phy@3 {
 124                         reg = <3>;
 125                         phy-mode = "rgmii";
 126                 };
 127
 128                 ethernet-phy@4 {
 129                         reg = <4>;
 130                         phy-mode = "rgmii";
 131                 };
 132
 133                 ethernet-phy@1f {
 134                         reg = <0x1f>;
 135                         phy-mode = "rgmii";
 136                 };
 137         };
 138 };
 139
 140 &wmac {
 141         ralink,mtd-eeprom = <&factory 0x0>;
 142 };
 143
 144 &pcie {
 145         status = "okay";
 146 };
 147
 148 &pcie0 {
 149         wifi@0,0 {
 150                 compatible = "mediatek,mt76";
 151                 reg = <0x0000 0 0 0 0>;
 152                 ieee80211-freq-limit = <5000000 6000000>;
 153                 mediatek,mtd-eeprom = <&factory 0x8000>;
 154
 155                 led {
 156                         led-sources = <2>;
 157                         led-active-low;
 158                 };
 159         };
 160 };
 161
 162 &ehci {
 163         status = "okay";
 164 };
 165
 166 &ohci {
 167         status = "okay";
 168 };