target/linux/ramips/dts/mt7620a_lb-link_bl-w1200.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /dts-v1/;
   4
   5 #include "mt7620a.dtsi"
   6
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/input/input.h>
   9
  10 / {
  11         compatible = "lb-link,bl-w1200", "ralink,mt7620a-soc";
  12         model = "LB-Link BL-W1200";
  13
  14         aliases {
  15                 led-boot = &led_wps;
  16                 led-failsafe = &led_wps;
  17                 led-upgrade = &led_wps;
  18         };
  19
  20         chosen {
  21                 bootargs = "console=ttyS0,57600";
  22         };
  23
  24         keys {
  25                 compatible = "gpio-keys";
  26
  27                 reset_wps {
  28                         label = "reset_wps";
  29                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  30                         linux,code = <KEY_RESTART>;
  31                 };
  32         };
  33
  34         leds {
  35                 compatible = "gpio-leds";
  36
  37                 led_wps: wps {
  38                         label = "bl-w1200:green:wps";
  39                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  40                 };
  41         };
  42 };
  43
  44 &gpio1 {
  45         status = "okay";
  46 };
  47
  48 &spi0 {
  49         status = "okay";
  50
  51         flash@0 {
  52                 compatible = "jedec,spi-nor";
  53                 reg = <0>;
  54                 spi-max-frequency = <50000000>;
  55
  56                 partitions {
  57                         compatible = "fixed-partitions";
  58                         #address-cells = <1>;
  59                         #size-cells = <1>;
  60
  61                         partition@0 {
  62                                 label = "u-boot";
  63                                 reg = <0x0 0x30000>;
  64                                 read-only;
  65                         };
  66
  67                         partition@30000 {
  68                                 label = "config";
  69                                 reg = <0x30000 0x10000>;
  70                                 read-only;
  71                         };
  72
  73                         factory: partition@40000 {
  74                                 label = "factory";
  75                                 reg = <0x40000 0x10000>;
  76                                 read-only;
  77                         };
  78
  79                         partition@50000 {
  80                                 compatible = "denx,uimage";
  81                                 label = "firmware";
  82                                 reg = <0x50000 0x7b0000>;
  83                         };
  84                 };
  85         };
  86 };
  87
  88 &state_default {
  89         gpio {
  90                 groups = "uartf", "spi refclk";
  91                 function = "gpio";
  92         };
  93 };
  94
  95 &ethernet {
  96         pinctrl-names = "default";
  97         pinctrl-0 = <&rgmii2_pins &mdio_pins>;
  98
  99         mtd-mac-address = <&factory 0x28>;
 100
 101         mediatek,portmap = "wllll";
 102
 103         port@5 {
 104                 status = "okay";
 105                 mediatek,fixed-link = <1000 1 1 1>;
 106                 phy-mode = "rgmii";
 107         };
 108
 109         mdio-bus {
 110                 status = "okay";
 111
 112                 ethernet-phy@0 {
 113                         reg = <0>;
 114                         phy-mode = "rgmii";
 115                 };
 116
 117                 ethernet-phy@1 {
 118                         reg = <1>;
 119                         phy-mode = "rgmii";
 120                 };
 121
 122                 ethernet-phy@2 {
 123                         reg = <2>;
 124                         phy-mode = "rgmii";
 125                 };
 126
 127                 ethernet-phy@3 {
 128                         reg = <3>;
 129                         phy-mode = "rgmii";
 130                 };
 131
 132                 ethernet-phy@4 {
 133                         reg = <4>;
 134                         phy-mode = "rgmii";
 135                 };
 136
 137                 ethernet-phy@1f {
 138                         reg = <0x1f>;
 139                         phy-mode = "rgmii";
 140                 };
 141         };
 142 };
 143
 144 &wmac {
 145         ralink,mtd-eeprom = <&factory 0x0>;
 146 };
 147
 148 &pcie {
 149         status = "okay";
 150 };
 151
 152 &pcie0 {
 153         wifi@0,0 {
 154                 compatible = "mediatek,mt76";
 155                 reg = <0x0000 0 0 0 0>;
 156                 ieee80211-freq-limit = <5000000 6000000>;
 157                 mediatek,mtd-eeprom = <&factory 0x8000>;
 158
 159                 led {
 160                         led-sources = <2>;
 161                         led-active-low;
 162                 };
 163         };
 164 };
 165
 166 &ehci {
 167         status = "okay";
 168 };
 169
 170 &ohci {
 171         status = "okay";
 172 };