uclient: update to Git HEAD (2024-04-19)
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_sanlinking_d240.dts
1 /*
2 * BSD LICENSE
3 *
4 * Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * * Neither the name of Broadcom Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 /dts-v1/;
35
36 #include "mt7620a.dtsi"
37
38 #include <dt-bindings/gpio/gpio.h>
39 #include <dt-bindings/input/input.h>
40
41 / {
42 compatible = "sanlinking,d240", "ralink,mt7620a-soc";
43 model = "Sanlinking Technologies D240";
44
45 aliases {
46 led-boot = &led_power;
47 led-failsafe = &led_power;
48 led-running = &led_power;
49 led-upgrade = &led_power;
50 };
51
52 chosen {
53 bootargs = "console=ttyS0,115200";
54 };
55
56 gpio-export {
57 compatible = "gpio-export";
58 #size-cells = <0>;
59
60 power_mpcie2 {
61 gpio-export,name = "power_mpcie2";
62 gpio-export,output = <1>;
63 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
64 };
65
66 power_mpcie1 {
67 gpio-export,name = "power_mpcie1";
68 gpio-export,output = <1>;
69 gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
70 };
71 };
72
73 leds {
74 compatible = "gpio-leds";
75
76 led_power: power {
77 label = "d240:blue:power";
78 gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
79 };
80
81 usb {
82 label = "d240:blue:usb";
83 gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
84 trigger-sources = <&ohci_port1>, <&ehci_port1>;
85 linux,default-trigger = "usbport";
86 };
87
88 air {
89 label = "d240:blue:wifi";
90 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
91 };
92 };
93
94 keys {
95 compatible = "gpio-keys-polled";
96 poll-interval = <20>;
97
98 reset {
99 label = "reset";
100 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
101 linux,code = <KEY_RESTART>;
102 };
103 };
104 };
105
106 &gpio1 {
107 status = "okay";
108 };
109
110 &gpio2 {
111 status = "okay";
112 };
113
114 &gpio3 {
115 status = "okay";
116 };
117
118 &spi0 {
119 status = "okay";
120
121 en25q128@0 {
122 compatible = "jedec,spi-nor";
123 reg = <0>;
124 spi-max-frequency = <10000000>;
125
126 partitions {
127 compatible = "fixed-partitions";
128 #address-cells = <1>;
129 #size-cells = <1>;
130
131 partition@0 {
132 label = "u-boot";
133 reg = <0x0 0x30000>;
134 read-only;
135 };
136
137 partition@30000 {
138 label = "u-boot-env";
139 reg = <0x30000 0x10000>;
140 read-only;
141 };
142
143 factory: partition@40000 {
144 label = "factory";
145 reg = <0x40000 0x10000>;
146 read-only;
147 };
148
149 partition@50000 {
150 compatible = "denx,uimage";
151 label = "firmware";
152 reg = <0x50000 0xfb0000>;
153 };
154 };
155 };
156 };
157
158 &sdhci {
159 status = "okay";
160 /* the pins function is already set during pinmux driver load */
161 /delete-property/ pinctrl-0;
162 };
163
164 &ehci {
165 status = "okay";
166 };
167
168 &ohci {
169 status = "okay";
170 };
171
172 &ethernet {
173 mtd-mac-address = <&factory 0x4>;
174 mediatek,portmap = "wllll";
175 };
176
177 &wmac {
178 ralink,mtd-eeprom = <&factory 0>;
179 };
180
181 &pinctrl {
182 state_default: pinctrl0 {
183 default {
184 ralink,group = "i2c", "uartf", "wled", "spi refclk", "pa";
185 ralink,function = "gpio";
186 };
187
188 /*
189 * The sd function of the nd_sd group configures two of the
190 * groups pins as gpios. The pins are used as PCIe reset/power.
191 * Due to the driver load order, the pins are configured way to
192 * late if triggered by the sd-card driver.
193 * To not introduce another kind of driver load order
194 * dependency and configure the pins as early as possible,
195 * means during pinmux driver load.
196 */
197 gpio_sd {
198 ralink,group = "nd_sd";
199 ralink,function = "sd";
200 };
201 };
202 };
203
204 &pcie {
205 status = "okay";
206 };