target/linux/ramips/dts/mt7628an.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "ralink,mtk7628an-soc";
   5
   6         cpus {
   7                 cpu@0 {
   8                         compatible = "mips,mips24KEc";
   9                 };
  10         };
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,57600";
  14         };
  15
  16         cpuintc: cpuintc@0 {
  17                 #address-cells = <0>;
  18                 #interrupt-cells = <1>;
  19                 interrupt-controller;
  20                 compatible = "mti,cpu-interrupt-controller";
  21         };
  22
  23         palmbus@10000000 {
  24                 compatible = "palmbus";
  25                 reg = <0x10000000 0x200000>;
  26                 ranges = <0x0 0x10000000 0x1FFFFF>;
  27
  28                 #address-cells = <1>;
  29                 #size-cells = <1>;
  30
  31                 sysc@0 {
  32                         compatible = "ralink,mt7620a-sysc";
  33                         reg = <0x0 0x100>;
  34                 };
  35
  36                 watchdog@120 {
  37                         compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
  38                         reg = <0x120 0x10>;
  39
  40                         resets = <&rstctrl 8>;
  41                         reset-names = "wdt";
  42
  43                         interrupt-parent = <&intc>;
  44                         interrupts = <24>;
  45                 };
  46
  47                 intc: intc@200 {
  48                         compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
  49                         reg = <0x200 0x100>;
  50
  51                         resets = <&rstctrl 9>;
  52                         reset-names = "intc";
  53
  54                         interrupt-controller;
  55                         #interrupt-cells = <1>;
  56
  57                         interrupt-parent = <&cpuintc>;
  58                         interrupts = <2>;
  59
  60                         ralink,intc-registers = <0x9c 0xa0
  61                                                  0x6c 0xa4
  62                                                  0x80 0x78>;
  63                 };
  64
  65                 memc@300 {
  66                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  67                         reg = <0x300 0x100>;
  68
  69                         resets = <&rstctrl 20>;
  70                         reset-names = "mc";
  71
  72                         interrupt-parent = <&intc>;
  73                         interrupts = <3>;
  74                 };
  75
  76                 gpio@600 {
  77                         #address-cells = <1>;
  78                         #size-cells = <0>;
  79
  80                         compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
  81                         reg = <0x600 0x100>;
  82
  83                         interrupt-parent = <&intc>;
  84                         interrupts = <6>;
  85
  86                         gpio0: bank@0 {
  87                                 reg = <0>;
  88                                 compatible = "mtk,mt7621-gpio-bank";
  89                                 gpio-controller;
  90                                 #gpio-cells = <2>;
  91                         };
  92
  93                         gpio1: bank@1 {
  94                                 reg = <1>;
  95                                 compatible = "mtk,mt7621-gpio-bank";
  96                                 gpio-controller;
  97                                 #gpio-cells = <2>;
  98                         };
  99
 100                         gpio2: bank@2 {
 101                                 reg = <2>;
 102                                 compatible = "mtk,mt7621-gpio-bank";
 103                                 gpio-controller;
 104                                 #gpio-cells = <2>;
 105                         };
 106                 };
 107
 108                 i2c@900 {
 109                         compatible = "mediatek,mt7628-i2c";
 110                         reg = <0x900 0x100>;
 111
 112                         resets = <&rstctrl 16>;
 113                         reset-names = "i2c";
 114
 115                         #address-cells = <1>;
 116                         #size-cells = <0>;
 117
 118                         status = "disabled";
 119
 120                         pinctrl-names = "default";
 121                         pinctrl-0 = <&i2c_pins>;
 122                 };
 123
 124                 i2s@a00 {
 125                         compatible = "ralink,mt7620a-i2s";
 126                         reg = <0xa00 0x100>;
 127
 128                         resets = <&rstctrl 17>;
 129                         reset-names = "i2s";
 130
 131                         interrupt-parent = <&intc>;
 132                         interrupts = <10>;
 133
 134                         dmas = <&gdma 2>,
 135                                 <&gdma 3>;
 136                         dma-names = "tx", "rx";
 137
 138                         status = "disabled";
 139                 };
 140
 141                 spi@b00 {
 142                         compatible = "ralink,mt7621-spi";
 143                         reg = <0xb00 0x100>;
 144
 145                         resets = <&rstctrl 18>;
 146                         reset-names = "spi";
 147
 148                         #address-cells = <1>;
 149                         #size-cells = <0>;
 150
 151                         pinctrl-names = "default";
 152                         pinctrl-0 = <&spi_pins>;
 153
 154                         status = "disabled";
 155                 };
 156
 157                 uartlite@c00 {
 158                         compatible = "ns16550a";
 159                         reg = <0xc00 0x100>;
 160
 161                         reg-shift = <2>;
 162                         reg-io-width = <4>;
 163                         no-loopback-test;
 164
 165                         resets = <&rstctrl 12>;
 166                         reset-names = "uartl";
 167
 168                         interrupt-parent = <&intc>;
 169                         interrupts = <20>;
 170
 171                         pinctrl-names = "default";
 172                         pinctrl-0 = <&uart0_pins>;
 173                 };
 174
 175                 uart1@d00 {
 176                         compatible = "ns16550a";
 177                         reg = <0xd00 0x100>;
 178
 179                         reg-shift = <2>;
 180                         reg-io-width = <4>;
 181                         no-loopback-test;
 182
 183                         resets = <&rstctrl 19>;
 184                         reset-names = "uart1";
 185
 186                         interrupt-parent = <&intc>;
 187                         interrupts = <21>;
 188
 189                         pinctrl-names = "default";
 190                         pinctrl-0 = <&uart1_pins>;
 191
 192                         status = "disabled";
 193                 };
 194
 195                 uart2@e00 {
 196                         compatible = "ns16550a";
 197                         reg = <0xe00 0x100>;
 198
 199                         reg-shift = <2>;
 200                         reg-io-width = <4>;
 201                         no-loopback-test;
 202
 203                         resets = <&rstctrl 20>;
 204                         reset-names = "uart2";
 205
 206                         interrupt-parent = <&intc>;
 207                         interrupts = <22>;
 208
 209                         pinctrl-names = "default";
 210                         pinctrl-0 = <&uart2_pins>;
 211
 212                         status = "disabled";
 213                 };
 214
 215                 pwm@5000 {
 216                         compatible = "mediatek,mt7628-pwm";
 217                         reg = <0x5000 0x1000>;
 218
 219                         resets = <&rstctrl 31>;
 220                         reset-names = "pwm";
 221
 222                         pinctrl-names = "default";
 223                         pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
 224
 225                         status = "disabled";
 226                 };
 227
 228                 pcm@2000 {
 229                         compatible = "ralink,mt7620a-pcm";
 230                         reg = <0x2000 0x800>;
 231
 232                         resets = <&rstctrl 11>;
 233                         reset-names = "pcm";
 234
 235                         interrupt-parent = <&intc>;
 236                         interrupts = <4>;
 237
 238                         status = "disabled";
 239                 };
 240
 241                 gdma: gdma@2800 {
 242                         compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
 243                         reg = <0x2800 0x800>;
 244
 245                         resets = <&rstctrl 14>;
 246                         reset-names = "dma";
 247
 248                         interrupt-parent = <&intc>;
 249                         interrupts = <7>;
 250
 251                         #dma-cells = <1>;
 252                         #dma-channels = <16>;
 253                         #dma-requests = <16>;
 254
 255                         status = "disabled";
 256                 };
 257         };
 258
 259         pinctrl {
 260                 compatible = "ralink,rt2880-pinmux";
 261                 pinctrl-names = "default";
 262                 pinctrl-0 = <&state_default>;
 263
 264                 state_default: pinctrl0 {
 265                 };
 266
 267                 spi_pins: spi {
 268                         spi {
 269                                 ralink,group = "spi";
 270                                 ralink,function = "spi";
 271                         };
 272                 };
 273
 274                 spi_cs1_pins: spi_cs1 {
 275                         spi_cs1 {
 276                                 ralink,group = "spi cs1";
 277                                 ralink,function = "spi cs1";
 278                         };
 279                 };
 280
 281                 i2c_pins: i2c {
 282                         i2c {
 283                                 ralink,group = "i2c";
 284                                 ralink,function = "i2c";
 285                         };
 286                 };
 287
 288                 uart0_pins: uartlite {
 289                         uartlite {
 290                                 ralink,group = "uart0";
 291                                 ralink,function = "uart0";
 292                         };
 293                 };
 294
 295                 uart1_pins: uart1 {
 296                         uart1 {
 297                                 ralink,group = "uart1";
 298                                 ralink,function = "uart1";
 299                         };
 300                 };
 301
 302                 uart2_pins: uart2 {
 303                         uart2 {
 304                                 ralink,group = "uart2";
 305                                 ralink,function = "uart2";
 306                         };
 307                 };
 308
 309                 sdxc_pins: sdxc {
 310                         sdxc {
 311                                 ralink,group = "sdmode";
 312                                 ralink,function = "sdxc";
 313                         };
 314                 };
 315
 316                 pwm0_pins: pwm0 {
 317                         pwm0 {
 318                                 ralink,group = "pwm0";
 319                                 ralink,function = "pwm0";
 320                         };
 321                 };
 322
 323                 pwm1_pins: pwm1 {
 324                         pwm1 {
 325                                 ralink,group = "pwm1";
 326                                 ralink,function = "pwm1";
 327                         };
 328                 };
 329
 330                 pcm_i2s_pins: i2s {
 331                         i2s {
 332                                 ralink,group = "i2s";
 333                                 ralink,function = "pcm";
 334                         };
 335                 };
 336         };
 337
 338         rstctrl: rstctrl {
 339                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 340                 #reset-cells = <1>;
 341         };
 342
 343         usbphy: usbphy@10120000 {
 344                 compatible = "ralink,mt7628an-usbphy", "mediatek,mt7620-usbphy";
 345                 reg = <0x10120000 4000>;
 346                 #phy-cells = <1>;
 347
 348                 resets = <&rstctrl 22 &rstctrl 25>;
 349                 reset-names = "host", "device";
 350         };
 351
 352         sdhci@10130000 {
 353                 compatible = "ralink,mt7620-sdhci";
 354                 reg = <0x10130000 4000>;
 355
 356                 interrupt-parent = <&intc>;
 357                 interrupts = <14>;
 358
 359                 pinctrl-names = "default";
 360                 pinctrl-0 = <&sdxc_pins>;
 361
 362                 status = "disabled";
 363         };
 364
 365         ehci@101c0000 {
 366                 compatible = "generic-ehci";
 367                 reg = <0x101c0000 0x1000>;
 368
 369                 phys = <&usbphy 1>;
 370                 phy-names = "usb";
 371
 372                 interrupt-parent = <&intc>;
 373                 interrupts = <18>;
 374         };
 375
 376         ohci@101c1000 {
 377                 compatible = "generic-ohci";
 378                 reg = <0x101c1000 0x1000>;
 379
 380                 phys = <&usbphy 1>;
 381                 phy-names = "usb";
 382
 383                 interrupt-parent = <&intc>;
 384                 interrupts = <18>;
 385         };
 386
 387         ethernet@10100000 {
 388                 compatible = "ralink,rt5350-eth";
 389                 reg = <0x10100000 10000>;
 390
 391                 interrupt-parent = <&cpuintc>;
 392                 interrupts = <5>;
 393
 394                 resets = <&rstctrl 21 &rstctrl 23>;
 395                 reset-names = "fe", "esw";
 396
 397                 mediatek,switch = <&esw>;
 398         };
 399
 400         esw: esw@10110000 {
 401                 compatible = "ralink,rt3050-esw";
 402                 reg = <0x10110000 8000>;
 403
 404                 resets = <&rstctrl 23>;
 405                 reset-names = "esw";
 406
 407                 interrupt-parent = <&intc>;
 408                 interrupts = <17>;
 409         };
 410
 411         pcie@10140000 {
 412                 compatible = "mediatek,mt7620-pci";
 413                 reg = <0x10140000 0x100
 414                         0x10142000 0x100>;
 415
 416                 #address-cells = <3>;
 417                 #size-cells = <2>;
 418
 419                 resets = <&rstctrl 26>;
 420                 reset-names = "pcie0";
 421
 422                 interrupt-parent = <&cpuintc>;
 423                 interrupts = <4>;
 424
 425                 status = "disabled";
 426
 427                 device_type = "pci";
 428
 429                 bus-range = <0 255>;
 430                 ranges = <
 431                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 432                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 433                 >;
 434
 435                 pcie-bridge {
 436                         reg = <0x0000 0 0 0 0>;
 437
 438                         #address-cells = <3>;
 439                         #size-cells = <2>;
 440
 441                         device_type = "pci";
 442                 };
 443         };
 444
 445         wmac: wmac@10300000 {
 446                 compatible = "mediatek,mt7628-wmac";
 447                 reg = <0x10300000 100000>;
 448
 449                 interrupt-parent = <&cpuintc>;
 450                 interrupts = <6>;
 451
 452                 status = "disabled";
 453
 454                 mediatek,mtd-eeprom = <&factory 0x0000>;
 455                 mediatek,5ghz = <0>;
 456         };
 457 };