mxs: drop 6.1 support
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7628an.dtsi
1 /dts-v1/;
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "mediatek,mt7628an-soc";
7
8 aliases {
9 serial0 = &uartlite;
10 };
11
12 cpus {
13 #address-cells = <1>;
14 #size-cells = <0>;
15
16 cpu@0 {
17 compatible = "mips,mips24KEc";
18 reg = <0>;
19 };
20 };
21
22 chosen {
23 bootargs = "console=ttyS0,57600";
24 };
25
26 cpuintc: cpuintc {
27 #address-cells = <0>;
28 #interrupt-cells = <1>;
29 interrupt-controller;
30 compatible = "mti,cpu-interrupt-controller";
31 };
32
33 palmbus: palmbus@10000000 {
34 compatible = "palmbus";
35 reg = <0x10000000 0x200000>;
36 ranges = <0x0 0x10000000 0x1FFFFF>;
37
38 #address-cells = <1>;
39 #size-cells = <1>;
40
41 sysc: syscon@0 {
42 compatible = "ralink,mt7628-sysc", "ralink,mt7688-sysc", "syscon";
43 reg = <0x0 0x100>;
44 #clock-cells = <1>;
45 #reset-cells = <1>;
46 };
47
48 watchdog: watchdog@100 {
49 compatible = "mediatek,mt7621-wdt";
50 reg = <0x100 0x100>;
51 mediatek,sysctl = <&sysc>;
52 };
53
54 intc: intc@200 {
55 compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
56 reg = <0x200 0x100>;
57
58 interrupt-controller;
59 #interrupt-cells = <1>;
60
61 interrupt-parent = <&cpuintc>;
62 interrupts = <2>;
63
64 ralink,intc-registers = <0x9c 0xa0
65 0x6c 0xa4
66 0x80 0x78>;
67 };
68
69 memc: memc@300 {
70 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
71 reg = <0x300 0x100>;
72
73 interrupt-parent = <&intc>;
74 interrupts = <3>;
75 };
76
77 gpio: gpio@600 {
78 compatible = "mediatek,mt7621-gpio";
79 reg = <0x600 0x100>;
80
81 interrupt-parent = <&intc>;
82 interrupts = <6>;
83
84 #interrupt-cells = <2>;
85 interrupt-controller;
86
87 gpio-controller;
88 #gpio-cells = <2>;
89 };
90
91 i2c: i2c@900 {
92 compatible = "mediatek,mt7621-i2c";
93 reg = <0x900 0x100>;
94
95 clocks = <&sysc 7>;
96 clock-names = "i2c";
97
98 resets = <&sysc 16>;
99 reset-names = "i2c";
100
101 #address-cells = <1>;
102 #size-cells = <0>;
103
104 status = "disabled";
105
106 pinctrl-names = "default";
107 pinctrl-0 = <&i2c_pins>;
108 };
109
110 i2s: i2s@a00 {
111 compatible = "mediatek,mt7628-i2s";
112 reg = <0xa00 0x100>;
113
114 clocks = <&sysc 8>;
115
116 resets = <&sysc 17>;
117 reset-names = "i2s";
118
119 interrupt-parent = <&intc>;
120 interrupts = <10>;
121
122 txdma-req = <2>;
123 rxdma-req = <3>;
124
125 dmas = <&gdma 4>,
126 <&gdma 6>;
127 dma-names = "tx", "rx";
128
129 status = "disabled";
130 };
131
132 spi0: spi@b00 {
133 compatible = "ralink,mt7621-spi";
134 reg = <0xb00 0x100>;
135
136 clocks = <&sysc 9>;
137 clock-names = "spi";
138
139 resets = <&sysc 18>;
140 reset-names = "spi";
141
142 #address-cells = <1>;
143 #size-cells = <0>;
144
145 pinctrl-names = "default";
146 pinctrl-0 = <&spi_pins>;
147
148 status = "disabled";
149 };
150
151 uartlite: uart0@c00 {
152 compatible = "ns16550a";
153 reg = <0xc00 0x100>;
154
155 reg-shift = <2>;
156 reg-io-width = <4>;
157 no-loopback-test;
158
159 clocks = <&sysc 11>;
160
161 resets = <&sysc 12>;
162
163 interrupt-parent = <&intc>;
164 interrupts = <20>;
165
166 pinctrl-names = "default";
167 pinctrl-0 = <&uart0_pins>;
168 };
169
170 uart1: uart1@d00 {
171 compatible = "ns16550a";
172 reg = <0xd00 0x100>;
173
174 reg-shift = <2>;
175 reg-io-width = <4>;
176 no-loopback-test;
177
178 clocks = <&sysc 12>;
179
180 resets = <&sysc 19>;
181
182 interrupt-parent = <&intc>;
183 interrupts = <21>;
184
185 pinctrl-names = "default";
186 pinctrl-0 = <&uart1_pins>;
187
188 status = "disabled";
189 };
190
191 uart2: uart2@e00 {
192 compatible = "ns16550a";
193 reg = <0xe00 0x100>;
194
195 reg-shift = <2>;
196 reg-io-width = <4>;
197 no-loopback-test;
198
199 clocks = <&sysc 13>;
200
201 resets = <&sysc 20>;
202
203 interrupt-parent = <&intc>;
204 interrupts = <22>;
205
206 pinctrl-names = "default";
207 pinctrl-0 = <&uart2_pins>;
208
209 status = "disabled";
210 };
211
212 pwm: pwm@5000 {
213 compatible = "mediatek,mt7628-pwm";
214 reg = <0x5000 0x1000>;
215 #pwm-cells = <2>;
216
217 pinctrl-names = "default";
218 pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
219
220 status = "disabled";
221 };
222
223 pcm: pcm@2000 {
224 compatible = "ralink,mt7620a-pcm";
225 reg = <0x2000 0x800>;
226
227 resets = <&sysc 11>;
228 reset-names = "pcm";
229
230 interrupt-parent = <&intc>;
231 interrupts = <4>;
232
233 status = "disabled";
234 };
235
236 gdma: gdma@2800 {
237 compatible = "ralink,rt3883-gdma";
238 reg = <0x2800 0x800>;
239
240 resets = <&sysc 14>;
241 reset-names = "dma";
242
243 interrupt-parent = <&intc>;
244 interrupts = <7>;
245
246 #dma-cells = <1>;
247 #dma-channels = <16>;
248 #dma-requests = <16>;
249
250 status = "disabled";
251 };
252 };
253
254 pinctrl: pinctrl {
255 compatible = "ralink,rt2880-pinmux";
256 pinctrl-names = "default";
257 pinctrl-0 = <&state_default>;
258
259 state_default: pinctrl0 {
260 };
261
262 spi_pins: spi_pins {
263 spi_pins {
264 groups = "spi";
265 function = "spi";
266 };
267 };
268
269 spi_cs1_pins: spi_cs1 {
270 spi_cs1 {
271 groups = "spi cs1";
272 function = "spi cs1";
273 };
274 };
275
276 i2c_pins: i2c_pins {
277 i2c_pins {
278 groups = "i2c";
279 function = "i2c";
280 };
281 };
282
283 i2s_pins: i2s {
284 i2s {
285 groups = "i2s";
286 function = "i2s";
287 };
288 };
289
290 uart0_pins: uartlite {
291 uartlite {
292 groups = "uart0";
293 function = "uart0";
294 };
295 };
296
297 uart1_pins: uart1 {
298 uart1 {
299 groups = "uart1";
300 function = "uart1";
301 };
302 };
303
304 uart2_pins: uart2 {
305 uart2 {
306 groups = "uart2";
307 function = "uart2";
308 };
309 };
310
311 sdxc_pins: sdxc {
312 sdxc {
313 groups = "sdmode";
314 function = "sdxc";
315 };
316 };
317
318 pwm0_pins: pwm0 {
319 pwm0 {
320 groups = "pwm0";
321 function = "pwm0";
322 };
323 };
324
325 pwm1_pins: pwm1 {
326 pwm1 {
327 groups = "pwm1";
328 function = "pwm1";
329 };
330 };
331
332 pcm_i2s_pins: pcm_i2s {
333 pcm_i2s {
334 groups = "i2s";
335 function = "pcm";
336 };
337 };
338
339 refclk_pins: refclk {
340 refclk {
341 groups = "refclk";
342 function = "refclk";
343 };
344 };
345 };
346
347 usbphy: usbphy@10120000 {
348 compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy";
349 reg = <0x10120000 0x1000>;
350 #phy-cells = <0>;
351
352 ralink,sysctl = <&sysc>;
353 /* usb phy reset is only controled by RSTCTRL bit 22 */
354 resets = <&sysc 22>, <&sysc 25>;
355 reset-names = "host", "device";
356 };
357
358 sdhci: sdhci@10130000 {
359 compatible = "ralink,mt7620-sdhci";
360 reg = <0x10130000 0x4000>;
361
362 interrupt-parent = <&intc>;
363 interrupts = <14>;
364
365 pinctrl-names = "default";
366 pinctrl-0 = <&sdxc_pins>;
367
368 status = "disabled";
369 };
370
371 ehci: ehci@101c0000 {
372 #address-cells = <1>;
373 #size-cells = <0>;
374 compatible = "generic-ehci";
375 reg = <0x101c0000 0x1000>;
376
377 phys = <&usbphy>;
378 phy-names = "usb";
379
380 interrupt-parent = <&intc>;
381 interrupts = <18>;
382
383 ehci_port1: port@1 {
384 reg = <1>;
385 #trigger-source-cells = <0>;
386 };
387 };
388
389 ohci: ohci@101c1000 {
390 #address-cells = <1>;
391 #size-cells = <0>;
392 compatible = "generic-ohci";
393 reg = <0x101c1000 0x1000>;
394
395 phys = <&usbphy>;
396 phy-names = "usb";
397
398 interrupt-parent = <&intc>;
399 interrupts = <18>;
400
401 ohci_port1: port@1 {
402 reg = <1>;
403 #trigger-source-cells = <0>;
404 };
405 };
406
407 ethernet: ethernet@10100000 {
408 compatible = "ralink,rt5350-eth";
409 reg = <0x10100000 0x10000>;
410
411 interrupt-parent = <&cpuintc>;
412 interrupts = <5>;
413
414 resets = <&sysc 21>, <&sysc 23>;
415 reset-names = "fe", "esw";
416
417 mediatek,switch = <&esw>;
418 };
419
420 esw: esw@10110000 {
421 compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
422 reg = <0x10110000 0x8000>;
423
424 resets = <&sysc 24>;
425 reset-names = "ephy";
426
427 interrupt-parent = <&intc>;
428 interrupts = <17>;
429 };
430
431 pcie: pcie@10140000 {
432 compatible = "mediatek,mt7620-pci";
433 reg = <0x10140000 0x100
434 0x10142000 0x100>;
435
436 #address-cells = <3>;
437 #size-cells = <2>;
438
439 interrupt-parent = <&cpuintc>;
440 interrupts = <4>;
441
442 resets = <&sysc 26>;
443 reset-names = "pcie0";
444
445 status = "disabled";
446
447 device_type = "pci";
448
449 bus-range = <0 255>;
450 ranges = <
451 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
452 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
453 >;
454
455 pcie0: pcie@0,0 {
456 reg = <0x0000 0 0 0 0>;
457
458 #address-cells = <3>;
459 #size-cells = <2>;
460
461 device_type = "pci";
462
463 ranges;
464 };
465 };
466
467 wmac: wmac@10300000 {
468 compatible = "mediatek,mt7628-wmac";
469 reg = <0x10300000 0x100000>;
470
471 clocks = <&sysc 14>;
472
473 interrupt-parent = <&cpuintc>;
474 interrupts = <6>;
475
476 status = "disabled";
477 };
478 };