target/linux/ramips/dts/mt7628an.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "ralink,mtk7628an-soc";
   5
   6         cpus {
   7                 cpu@0 {
   8                         compatible = "mips,mips24KEc";
   9                 };
  10         };
  11
  12         cpuintc: cpuintc@0 {
  13                 #address-cells = <0>;
  14                 #interrupt-cells = <1>;
  15                 interrupt-controller;
  16                 compatible = "mti,cpu-interrupt-controller";
  17         };
  18
  19         palmbus@10000000 {
  20                 compatible = "palmbus";
  21                 reg = <0x10000000 0x200000>;
  22                 ranges = <0x0 0x10000000 0x1FFFFF>;
  23
  24                 #address-cells = <1>;
  25                 #size-cells = <1>;
  26
  27                 sysc@0 {
  28                         compatible = "ralink,mt7620a-sysc";
  29                         reg = <0x0 0x100>;
  30                 };
  31
  32                 watchdog@120 {
  33                         compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
  34                         reg = <0x120 0x10>;
  35
  36                         resets = <&rstctrl 8>;
  37                         reset-names = "wdt";
  38
  39                         interrupt-parent = <&intc>;
  40                         interrupts = <24>;
  41                 };
  42
  43                 intc: intc@200 {
  44                         compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
  45                         reg = <0x200 0x100>;
  46
  47                         resets = <&rstctrl 9>;
  48                         reset-names = "intc";
  49
  50                         interrupt-controller;
  51                         #interrupt-cells = <1>;
  52
  53                         interrupt-parent = <&cpuintc>;
  54                         interrupts = <2>;
  55
  56                         ralink,intc-registers = <0x9c 0xa0
  57                                                  0x6c 0xa4
  58                                                  0x80 0x78>;
  59                 };
  60
  61                 memc@300 {
  62                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  63                         reg = <0x300 0x100>;
  64
  65                         resets = <&rstctrl 20>;
  66                         reset-names = "mc";
  67
  68                         interrupt-parent = <&intc>;
  69                         interrupts = <3>;
  70                 };
  71
  72                 gpio@600 {
  73                         #address-cells = <1>;
  74                         #size-cells = <0>;
  75
  76                         compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
  77                         reg = <0x600 0x100>;
  78
  79                         gpio0: bank@0 {
  80                                 reg = <0>;
  81                                 compatible = "mtk,mt7621-gpio-bank";
  82                                 gpio-controller;
  83                                 #gpio-cells = <2>;
  84                         };
  85
  86                         gpio1: bank@1 {
  87                                 reg = <1>;
  88                                 compatible = "mtk,mt7621-gpio-bank";
  89                                 gpio-controller;
  90                                 #gpio-cells = <2>;
  91                         };
  92
  93                         gpio2: bank@2 {
  94                                 reg = <2>;
  95                                 compatible = "mtk,mt7621-gpio-bank";
  96                                 gpio-controller;
  97                                 #gpio-cells = <2>;
  98                         };
  99                 };
 100
 101                 spi@b00 {
 102                         compatible = "ralink,mt7621-spi";
 103                         reg = <0xb00 0x100>;
 104
 105                         resets = <&rstctrl 18>;
 106                         reset-names = "spi";
 107
 108                         #address-cells = <1>;
 109                         #size-cells = <1>;
 110
 111                         pinctrl-names = "default";
 112                         pinctrl-0 = <&spi_pins>;
 113
 114                         status = "disabled";
 115                 };
 116
 117                 uartlite@c00 {
 118                         compatible = "ns16550a";
 119                         reg = <0xc00 0x100>;
 120
 121                         reg-shift = <2>;
 122                         reg-io-width = <4>;
 123                         no-loopback-test;
 124
 125                         resets = <&rstctrl 12>;
 126                         reset-names = "uartl";
 127
 128                         interrupt-parent = <&intc>;
 129                         interrupts = <20>;
 130
 131                         pinctrl-names = "default";
 132                         pinctrl-0 = <&uart0_pins>;
 133                 };
 134         };
 135
 136         pinctrl {
 137                 compatible = "ralink,rt2880-pinmux";
 138                 pinctrl-names = "default";
 139                 pinctrl-0 = <&state_default>;
 140                 state_default: pinctrl0 {
 141                 };
 142                 spi_pins: spi {
 143                         spi {
 144                                 ralink,group = "spi";
 145                                 ralink,function = "spi";
 146                         };
 147                 };
 148                 uart0_pins: uartlite {
 149                         uart {
 150                                 ralink,group = "uart0";
 151                                 ralink,function = "uart";
 152                         };
 153                 };
 154         };
 155
 156         rstctrl: rstctrl {
 157                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 158                 #reset-cells = <1>;
 159         };
 160
 161         usbphy {
 162                 compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
 163
 164                 resets = <&rstctrl 22>;
 165                 reset-names = "host";
 166         };
 167
 168         sdhci@10130000 {
 169                 compatible = "ralink,mt7620-sdhci";
 170                 reg = <0x10130000 4000>;
 171
 172                 interrupt-parent = <&intc>;
 173                 interrupts = <14>;
 174
 175                 status = "disabled";
 176         };
 177
 178         ehci@101c0000 {
 179                 compatible = "ralink,rt3xxx-ehci";
 180                 reg = <0x101c0000 0x1000>;
 181
 182                 interrupt-parent = <&intc>;
 183                 interrupts = <18>;
 184         };
 185
 186         ohci@101c1000 {
 187                 compatible = "ralink,rt3xxx-ohci";
 188                 reg = <0x101c1000 0x1000>;
 189
 190                 interrupt-parent = <&intc>;
 191                 interrupts = <18>;
 192         };
 193
 194         ethernet@10100000 {
 195                 compatible = "ralink,rt5350-eth";
 196                 reg = <0x10100000 10000>;
 197
 198                 interrupt-parent = <&cpuintc>;
 199                 interrupts = <5>;
 200         };
 201
 202         esw@10110000 {
 203                 compatible = "ralink,rt3050-esw";
 204                 reg = <0x10110000 8000>;
 205
 206                 interrupt-parent = <&intc>;
 207                 interrupts = <17>;
 208         };
 209
 210         pcie@10140000 {
 211                 compatible = "mediatek,mt7620-pci";
 212                 reg = <0x10140000 0x100
 213                         0x10142000 0x100>;
 214
 215                 #address-cells = <3>;
 216                 #size-cells = <2>;
 217
 218                 resets = <&rstctrl 26>;
 219                 reset-names = "pcie0";
 220
 221                 interrupt-parent = <&cpuintc>;
 222                 interrupts = <4>;
 223
 224                 status = "disabled";
 225
 226                 device_type = "pci";
 227
 228                 bus-range = <0 255>;
 229                 ranges = <
 230                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 231                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 232                 >;
 233
 234                 pcie-bridge {
 235                         reg = <0x0000 0 0 0 0>;
 236
 237                         #address-cells = <3>;
 238                         #size-cells = <2>;
 239
 240                         device_type = "pci";
 241                 };
 242         };
 243
 244 };