ramips: add gdma hsdma dts info
[openwrt/openwrt.git] / target / linux / ramips / dts / rt3352.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,rt3352-soc";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips24KEc";
9 };
10 };
11
12 chosen {
13 bootargs = "console=ttyS0,57600";
14 };
15
16 cpuintc: cpuintc@0 {
17 #address-cells = <0>;
18 #interrupt-cells = <1>;
19 interrupt-controller;
20 compatible = "mti,cpu-interrupt-controller";
21 };
22
23 aliases {
24 spi0 = &spi0;
25 spi1 = &spi1;
26 serial0 = &uartlite;
27 };
28
29 palmbus: palmbus@10000000 {
30 compatible = "palmbus";
31 reg = <0x10000000 0x200000>;
32 ranges = <0x0 0x10000000 0x1FFFFF>;
33
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 sysc: sysc@0 {
38 compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc";
39 reg = <0x0 0x100>;
40 };
41
42 timer: timer@100 {
43 compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
44 reg = <0x100 0x20>;
45
46 interrupt-parent = <&intc>;
47 interrupts = <1>;
48 };
49
50 watchdog: watchdog@120 {
51 compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
52 reg = <0x120 0x10>;
53
54 resets = <&rstctrl 8>;
55 reset-names = "wdt";
56
57 interrupt-parent = <&intc>;
58 interrupts = <1>;
59 };
60
61 intc: intc@200 {
62 compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
63 reg = <0x200 0x100>;
64
65 interrupt-controller;
66 #interrupt-cells = <1>;
67
68 interrupt-parent = <&cpuintc>;
69 interrupts = <2>;
70 };
71
72 memc: memc@300 {
73 compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
74 reg = <0x300 0x100>;
75
76 resets = <&rstctrl 20>;
77 reset-names = "mc";
78
79 interrupt-parent = <&intc>;
80 interrupts = <3>;
81 };
82
83 uart: uart@500 {
84 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
85 reg = <0x500 0x100>;
86
87 resets = <&rstctrl 12>;
88 reset-names = "uart";
89
90 interrupt-parent = <&intc>;
91 interrupts = <5>;
92
93 reg-shift = <2>;
94
95 status = "disabled";
96 };
97
98 gpio0: gpio@600 {
99 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
100 reg = <0x600 0x34>;
101
102 gpio-controller;
103 #gpio-cells = <2>;
104
105 ralink,gpio-base = <0>;
106 ralink,num-gpios = <24>;
107 ralink,register-map = [ 00 04 08 0c
108 20 24 28 2c
109 30 34 ];
110 resets = <&rstctrl 13>;
111 reset-names = "pio";
112
113 interrupt-parent = <&intc>;
114 interrupts = <6>;
115 };
116
117 gpio1: gpio@638 {
118 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
119 reg = <0x638 0x24>;
120
121 gpio-controller;
122 #gpio-cells = <2>;
123
124 ralink,gpio-base = <24>;
125 ralink,num-gpios = <16>;
126 ralink,register-map = [ 00 04 08 0c
127 10 14 18 1c
128 20 24 ];
129
130 status = "disabled";
131 };
132
133 gpio2: gpio@660 {
134 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
135 reg = <0x660 0x24>;
136
137 gpio-controller;
138 #gpio-cells = <2>;
139
140 ralink,gpio-base = <40>;
141 ralink,num-gpios = <6>;
142 ralink,register-map = [ 00 04 08 0c
143 10 14 18 1c
144 20 24 ];
145
146 status = "disabled";
147 };
148
149 spi0: spi@b00 {
150 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
151 reg = <0xb00 0x40>;
152 #address-cells = <1>;
153 #size-cells = <0>;
154
155 resets = <&rstctrl 18>;
156 reset-names = "spi";
157
158 pinctrl-names = "default";
159 pinctrl-0 = <&spi_pins>;
160
161 status = "disabled";
162 };
163
164 spi1: spi@b40 {
165 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
166 reg = <0xb40 0x60>;
167 #address-cells = <1>;
168 #size-cells = <0>;
169
170 resets = <&rstctrl 18>;
171 reset-names = "spi";
172
173 pinctrl-names = "default";
174 pinctrl-0 = <&spi_cs1>;
175
176 status = "disabled";
177 };
178
179 uartlite: uartlite@c00 {
180 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
181 reg = <0xc00 0x100>;
182
183 resets = <&rstctrl 19>;
184 reset-names = "uartl";
185
186 interrupt-parent = <&intc>;
187 interrupts = <12>;
188
189 reg-shift = <2>;
190
191 pinctrl-names = "default";
192 pinctrl-0 = <&uartlite_pins>;
193 };
194
195 gdma: gdma@2800 {
196 compatible = "ralink,rt3883-gdma";
197 reg = <0x2800 0x800>;
198
199 resets = <&rstctrl 14>;
200 reset-names = "dma";
201
202 interrupt-parent = <&intc>;
203 interrupts = <7>;
204
205 #dma-cells = <1>;
206 #dma-channels = <16>;
207 #dma-requests = <16>;
208
209 status = "disabled";
210 };
211 };
212
213 pinctrl: pinctrl {
214 compatible = "ralink,rt2880-pinmux";
215
216 pinctrl-names = "default";
217 pinctrl-0 = <&state_default>;
218
219 state_default: pinctrl0 {
220 };
221
222 spi_pins: spi {
223 spi {
224 ralink,group = "spi";
225 ralink,function = "spi";
226 };
227 };
228
229 spi_cs1: spi1 {
230 spi1 {
231 ralink,group = "spi_cs1";
232 ralink,function = "spi_cs1";
233 };
234 };
235
236 uartlite_pins: uartlite {
237 uart {
238 ralink,group = "uartlite";
239 ralink,function = "uartlite";
240 };
241 };
242 };
243
244 rstctrl: rstctrl {
245 compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
246 #reset-cells = <1>;
247 };
248
249 clkctrl: clkctrl {
250 compatible = "ralink,rt2880-clock";
251 #clock-cells = <1>;
252 };
253
254 ethernet: ethernet@10100000 {
255 compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
256 reg = <0x10100000 0x10000>;
257
258 resets = <&rstctrl 21>;
259 reset-names = "fe";
260
261 interrupt-parent = <&cpuintc>;
262 interrupts = <5>;
263
264 mediatek,switch = <&esw>;
265 };
266
267 esw: esw@10110000 {
268 compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
269 reg = <0x10110000 0x8000>;
270
271 resets = <&rstctrl 23>;
272 reset-names = "esw";
273
274 interrupt-parent = <&intc>;
275 interrupts = <17>;
276 };
277
278 usbphy: usbphy {
279 compatible = "ralink,rt3352-usbphy";
280 #phy-cells = <1>;
281
282 resets = <&rstctrl 22 &rstctrl 25>;
283 reset-names = "host", "device";
284 clocks = <&clkctrl 18 &clkctrl 20>;
285 clock-names = "host", "device";
286 };
287
288 wmac: wmac@10180000 {
289 compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
290 reg = <0x10180000 0x40000>;
291
292 interrupt-parent = <&cpuintc>;
293 interrupts = <6>;
294
295 ralink,eeprom = "soc_wmac.eeprom";
296 };
297
298 ehci: ehci@101c0000 {
299 compatible = "generic-ehci";
300 reg = <0x101c0000 0x1000>;
301
302 phys = <&usbphy 1>;
303 phy-names = "usb";
304
305 interrupt-parent = <&intc>;
306 interrupts = <18>;
307
308 status = "disabled";
309 };
310
311 ohci: ohci@101c1000 {
312 compatible = "generic-ohci";
313 reg = <0x101c1000 0x1000>;
314
315 phys = <&usbphy 1>;
316 phy-names = "usb";
317
318 interrupt-parent = <&intc>;
319 interrupts = <18>;
320
321 status = "disabled";
322 };
323 };