ramips: DTS rework
[openwrt/openwrt.git] / target / linux / ramips / dts / rt3352.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,rt3352-soc";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips24KEc";
9 };
10 };
11
12 chosen {
13 bootargs = "console=ttyS0,57600";
14 };
15
16 cpuintc: cpuintc@0 {
17 #address-cells = <0>;
18 #interrupt-cells = <1>;
19 interrupt-controller;
20 compatible = "mti,cpu-interrupt-controller";
21 };
22
23 aliases {
24 spi0 = &spi0;
25 spi1 = &spi1;
26 serial0 = &uartlite;
27 };
28
29 palmbus: palmbus@10000000 {
30 compatible = "palmbus";
31 reg = <0x10000000 0x200000>;
32 ranges = <0x0 0x10000000 0x1FFFFF>;
33
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 sysc: sysc@0 {
38 compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc";
39 reg = <0x0 0x100>;
40 };
41
42 timer: timer@100 {
43 compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
44 reg = <0x100 0x20>;
45
46 interrupt-parent = <&intc>;
47 interrupts = <1>;
48 };
49
50 watchdog: watchdog@120 {
51 compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
52 reg = <0x120 0x10>;
53
54 resets = <&rstctrl 8>;
55 reset-names = "wdt";
56
57 interrupt-parent = <&intc>;
58 interrupts = <1>;
59 };
60
61 intc: intc@200 {
62 compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
63 reg = <0x200 0x100>;
64
65 interrupt-controller;
66 #interrupt-cells = <1>;
67
68 interrupt-parent = <&cpuintc>;
69 interrupts = <2>;
70 };
71
72 memc: memc@300 {
73 compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
74 reg = <0x300 0x100>;
75
76 resets = <&rstctrl 20>;
77 reset-names = "mc";
78
79 interrupt-parent = <&intc>;
80 interrupts = <3>;
81 };
82
83 uart: uart@500 {
84 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
85 reg = <0x500 0x100>;
86
87 resets = <&rstctrl 12>;
88 reset-names = "uart";
89
90 interrupt-parent = <&intc>;
91 interrupts = <5>;
92
93 reg-shift = <2>;
94
95 status = "disabled";
96 };
97
98 gpio0: gpio@600 {
99 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
100 reg = <0x600 0x34>;
101
102 gpio-controller;
103 #gpio-cells = <2>;
104
105 ralink,gpio-base = <0>;
106 ralink,num-gpios = <24>;
107 ralink,register-map = [ 00 04 08 0c
108 20 24 28 2c
109 30 34 ];
110 resets = <&rstctrl 13>;
111 reset-names = "pio";
112
113 interrupt-parent = <&intc>;
114 interrupts = <6>;
115 };
116
117 gpio1: gpio@638 {
118 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
119 reg = <0x638 0x24>;
120
121 gpio-controller;
122 #gpio-cells = <2>;
123
124 ralink,gpio-base = <24>;
125 ralink,num-gpios = <16>;
126 ralink,register-map = [ 00 04 08 0c
127 10 14 18 1c
128 20 24 ];
129
130 status = "disabled";
131 };
132
133 gpio2: gpio@660 {
134 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
135 reg = <0x660 0x24>;
136
137 gpio-controller;
138 #gpio-cells = <2>;
139
140 ralink,gpio-base = <40>;
141 ralink,num-gpios = <6>;
142 ralink,register-map = [ 00 04 08 0c
143 10 14 18 1c
144 20 24 ];
145
146 status = "disabled";
147 };
148
149 spi0: spi@b00 {
150 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
151 reg = <0xb00 0x40>;
152 #address-cells = <1>;
153 #size-cells = <0>;
154
155 resets = <&rstctrl 18>;
156 reset-names = "spi";
157
158 pinctrl-names = "default";
159 pinctrl-0 = <&spi_pins>;
160
161 status = "disabled";
162 };
163
164 spi1: spi@b40 {
165 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
166 reg = <0xb40 0x60>;
167 #address-cells = <1>;
168 #size-cells = <1>;
169
170 resets = <&rstctrl 18>;
171 reset-names = "spi";
172
173 pinctrl-names = "default";
174 pinctrl-0 = <&spi_cs1>;
175
176 status = "disabled";
177 };
178
179 uartlite: uartlite@c00 {
180 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
181 reg = <0xc00 0x100>;
182
183 resets = <&rstctrl 19>;
184 reset-names = "uartl";
185
186 interrupt-parent = <&intc>;
187 interrupts = <12>;
188
189 reg-shift = <2>;
190
191 pinctrl-names = "default";
192 pinctrl-0 = <&uartlite_pins>;
193 };
194 };
195
196 pinctrl: pinctrl {
197 compatible = "ralink,rt2880-pinmux";
198
199 pinctrl-names = "default";
200 pinctrl-0 = <&state_default>;
201
202 state_default: pinctrl0 {
203 };
204
205 spi_pins: spi {
206 spi {
207 ralink,group = "spi";
208 ralink,function = "spi";
209 };
210 };
211
212 spi_cs1: spi1 {
213 spi1 {
214 ralink,group = "spi_cs1";
215 ralink,function = "spi_cs1";
216 };
217 };
218
219 uartlite_pins: uartlite {
220 uart {
221 ralink,group = "uartlite";
222 ralink,function = "uartlite";
223 };
224 };
225 };
226
227 rstctrl: rstctrl {
228 compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
229 #reset-cells = <1>;
230 };
231
232 ethernet: ethernet@10100000 {
233 compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
234 reg = <0x10100000 0x10000>;
235
236 resets = <&rstctrl 21>;
237 reset-names = "fe";
238
239 interrupt-parent = <&cpuintc>;
240 interrupts = <5>;
241
242 mediatek,switch = <&esw>;
243 };
244
245 esw: esw@10110000 {
246 compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
247 reg = <0x10110000 0x8000>;
248
249 resets = <&rstctrl 23>;
250 reset-names = "esw";
251
252 interrupt-parent = <&intc>;
253 interrupts = <17>;
254 };
255
256 usbphy: usbphy {
257 compatible = "ralink,rt3352-usbphy";
258 #phy-cells = <1>;
259
260 resets = <&rstctrl 22 &rstctrl 25>;
261 reset-names = "host", "device";
262 };
263
264 wmac: wmac@10180000 {
265 compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
266 reg = <0x10180000 0x40000>;
267
268 interrupt-parent = <&cpuintc>;
269 interrupts = <6>;
270
271 ralink,eeprom = "soc_wmac.eeprom";
272 };
273
274 ehci: ehci@101c0000 {
275 compatible = "generic-ehci";
276 reg = <0x101c0000 0x1000>;
277
278 phys = <&usbphy 1>;
279 phy-names = "usb";
280
281 interrupt-parent = <&intc>;
282 interrupts = <18>;
283
284 status = "disabled";
285 };
286
287 ohci: ohci@101c1000 {
288 compatible = "generic-ohci";
289 reg = <0x101c1000 0x1000>;
290
291 phys = <&usbphy 1>;
292 phy-names = "usb";
293
294 interrupt-parent = <&intc>;
295 interrupts = <18>;
296
297 status = "disabled";
298 };
299 };