ramips: update dtsi files to support second spi device
[openwrt/openwrt.git] / target / linux / ramips / dts / rt3352.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,rt3352-soc";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips24KEc";
9 };
10 };
11
12 chosen {
13 bootargs = "console=ttyS0,57600";
14 };
15
16 cpuintc: cpuintc@0 {
17 #address-cells = <0>;
18 #interrupt-cells = <1>;
19 interrupt-controller;
20 compatible = "mti,cpu-interrupt-controller";
21 };
22
23 aliases {
24 spi0 = &spi0;
25 spi1 = &spi1;
26 };
27
28 palmbus@10000000 {
29 compatible = "palmbus";
30 reg = <0x10000000 0x200000>;
31 ranges = <0x0 0x10000000 0x1FFFFF>;
32
33 #address-cells = <1>;
34 #size-cells = <1>;
35
36 sysc@0 {
37 compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc";
38 reg = <0x0 0x100>;
39 };
40
41 timer@100 {
42 compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
43 reg = <0x100 0x20>;
44
45 interrupt-parent = <&intc>;
46 interrupts = <1>;
47 };
48
49 watchdog@120 {
50 compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
51 reg = <0x120 0x10>;
52
53 resets = <&rstctrl 8>;
54 reset-names = "wdt";
55
56 interrupt-parent = <&intc>;
57 interrupts = <1>;
58 };
59
60 intc: intc@200 {
61 compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
62 reg = <0x200 0x100>;
63
64 interrupt-controller;
65 #interrupt-cells = <1>;
66
67 interrupt-parent = <&cpuintc>;
68 interrupts = <2>;
69 };
70
71 memc@300 {
72 compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
73 reg = <0x300 0x100>;
74
75 resets = <&rstctrl 20>;
76 reset-names = "mc";
77
78 interrupt-parent = <&intc>;
79 interrupts = <3>;
80 };
81
82 uart@500 {
83 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
84 reg = <0x500 0x100>;
85
86 resets = <&rstctrl 12>;
87 reset-names = "uart";
88
89 interrupt-parent = <&intc>;
90 interrupts = <5>;
91
92 reg-shift = <2>;
93
94 status = "disabled";
95 };
96
97 gpio0: gpio@600 {
98 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
99 reg = <0x600 0x34>;
100
101 gpio-controller;
102 #gpio-cells = <2>;
103
104 ralink,gpio-base = <0>;
105 ralink,num-gpios = <24>;
106 ralink,register-map = [ 00 04 08 0c
107 20 24 28 2c
108 30 34 ];
109 resets = <&rstctrl 13>;
110 reset-names = "pio";
111
112 interrupt-parent = <&intc>;
113 interrupts = <6>;
114 };
115
116 gpio1: gpio@638 {
117 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
118 reg = <0x638 0x24>;
119
120 gpio-controller;
121 #gpio-cells = <2>;
122
123 ralink,gpio-base = <24>;
124 ralink,num-gpios = <16>;
125 ralink,register-map = [ 00 04 08 0c
126 10 14 18 1c
127 20 24 ];
128
129 status = "disabled";
130 };
131
132 gpio2: gpio@660 {
133 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
134 reg = <0x660 0x24>;
135
136 gpio-controller;
137 #gpio-cells = <2>;
138
139 ralink,gpio-base = <40>;
140 ralink,num-gpios = <6>;
141 ralink,register-map = [ 00 04 08 0c
142 10 14 18 1c
143 20 24 ];
144
145 status = "disabled";
146 };
147
148 spi0: spi@b00 {
149 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
150 reg = <0xb00 0x40>;
151 #address-cells = <1>;
152 #size-cells = <0>;
153
154 resets = <&rstctrl 18>;
155 reset-names = "spi";
156
157 pinctrl-names = "default";
158 pinctrl-0 = <&spi_pins>;
159
160 status = "disabled";
161 };
162
163 spi1: spi@b40 {
164 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
165 reg = <0xb40 0x60>;
166 #address-cells = <1>;
167 #size-cells = <1>;
168
169 resets = <&rstctrl 18>;
170 reset-names = "spi";
171
172 pinctrl-names = "default";
173 pinctrl-0 = <&spi_cs1>;
174
175 status = "disabled";
176 };
177
178 uartlite@c00 {
179 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
180 reg = <0xc00 0x100>;
181
182 resets = <&rstctrl 19>;
183 reset-names = "uartl";
184
185 interrupt-parent = <&intc>;
186 interrupts = <12>;
187
188 reg-shift = <2>;
189
190 pinctrl-names = "default";
191 pinctrl-0 = <&uartlite_pins>;
192 };
193 };
194
195 pinctrl {
196 compatible = "ralink,rt2880-pinmux";
197
198 pinctrl-names = "default";
199 pinctrl-0 = <&state_default>;
200
201 state_default: pinctrl0 {
202 };
203
204 spi_pins: spi {
205 spi {
206 ralink,group = "spi";
207 ralink,function = "spi";
208 };
209 };
210
211 spi_cs1: spi1 {
212 spi1 {
213 ralink,group = "spi_cs1";
214 ralink,function = "spi_cs1";
215 };
216 };
217
218 uartlite_pins: uartlite {
219 uart {
220 ralink,group = "uartlite";
221 ralink,function = "uartlite";
222 };
223 };
224 };
225
226 rstctrl: rstctrl {
227 compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
228 #reset-cells = <1>;
229 };
230
231 ethernet@10100000 {
232 compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
233 reg = <0x10100000 10000>;
234
235 resets = <&rstctrl 21>;
236 reset-names = "fe";
237
238 interrupt-parent = <&cpuintc>;
239 interrupts = <5>;
240 };
241
242 esw@10110000 {
243 compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
244 reg = <0x10110000 8000>;
245
246 resets = <&rstctrl 23>;
247 reset-names = "esw";
248
249 interrupt-parent = <&intc>;
250 interrupts = <17>;
251 };
252
253 usbphy {
254 compatible = "ralink,rt3xxx-usbphy";
255
256 resets = <&rstctrl 22 &rstctrl 25>;
257 reset-names = "host", "device";
258 };
259
260 wmac@10180000 {
261 compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
262 reg = <0x10180000 40000>;
263
264 interrupt-parent = <&cpuintc>;
265 interrupts = <6>;
266
267 ralink,eeprom = "soc_wmac.eeprom";
268 };
269
270 ehci@101c0000 {
271 compatible = "ralink,rt3xxx-ehci", "ehci-platform";
272 reg = <0x101c0000 0x1000>;
273
274 interrupt-parent = <&intc>;
275 interrupts = <18>;
276
277 status = "disabled";
278 };
279
280 ohci@101c1000 {
281 compatible = "ralink,rt3xxx-ohci", "ohci-platform";
282 reg = <0x101c1000 0x1000>;
283
284 interrupt-parent = <&intc>;
285 interrupts = <18>;
286
287 status = "disabled";
288 };
289 };