mpc85xx: fix address config for ws-ap3825i
[openwrt/openwrt.git] / target / linux / ramips / dts / rt3352.dtsi
1 /dts-v1/;
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,rt3352-soc";
7
8 aliases {
9 spi0 = &spi0;
10 spi1 = &spi1;
11 serial0 = &uartlite;
12 };
13
14 cpus {
15 #address-cells = <1>;
16 #size-cells = <0>;
17
18 cpu@0 {
19 compatible = "mips,mips24KEc";
20 reg = <0>;
21 };
22 };
23
24 chosen {
25 bootargs = "console=ttyS0,57600";
26 };
27
28 cpuintc: cpuintc {
29 #address-cells = <0>;
30 #interrupt-cells = <1>;
31 interrupt-controller;
32 compatible = "mti,cpu-interrupt-controller";
33 };
34
35 palmbus: palmbus@10000000 {
36 compatible = "palmbus";
37 reg = <0x10000000 0x200000>;
38 ranges = <0x0 0x10000000 0x1FFFFF>;
39
40 #address-cells = <1>;
41 #size-cells = <1>;
42
43 sysc: syscon@0 {
44 compatible = "ralink,rt3352-sysc", "syscon";
45 reg = <0x0 0x100>;
46 #clock-cells = <1>;
47 #reset-cells = <1>;
48 };
49
50 timer: timer@100 {
51 compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
52 reg = <0x100 0x20>;
53
54 clocks = <&sysc 4>;
55
56 interrupt-parent = <&intc>;
57 interrupts = <1>;
58 };
59
60 watchdog: watchdog@120 {
61 compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
62 reg = <0x120 0x10>;
63
64 clocks = <&sysc 5>;
65
66 resets = <&sysc 8>;
67 reset-names = "wdt";
68
69 interrupt-parent = <&intc>;
70 interrupts = <1>;
71 };
72
73 intc: intc@200 {
74 compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
75 reg = <0x200 0x100>;
76
77 interrupt-controller;
78 #interrupt-cells = <1>;
79
80 interrupt-parent = <&cpuintc>;
81 interrupts = <2>;
82 };
83
84 memc: memc@300 {
85 compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
86 reg = <0x300 0x100>;
87
88 interrupt-parent = <&intc>;
89 interrupts = <3>;
90 };
91
92 uart: uart@500 {
93 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
94 reg = <0x500 0x100>;
95
96 clocks = <&sysc 6>;
97
98 resets = <&sysc 12>;
99
100 interrupt-parent = <&intc>;
101 interrupts = <5>;
102
103 reg-shift = <2>;
104
105 status = "disabled";
106 };
107
108 gpio0: gpio@600 {
109 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
110 reg = <0x600 0x34>;
111
112 gpio-controller;
113 #gpio-cells = <2>;
114
115 ngpios = <24>;
116 ralink,gpio-base = <0>;
117 ralink,register-map = [ 00 04 08 0c
118 20 24 28 2c
119 30 34 ];
120
121 interrupt-parent = <&intc>;
122 interrupts = <6>;
123 };
124
125 gpio1: gpio@638 {
126 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
127 reg = <0x638 0x24>;
128
129 gpio-controller;
130 #gpio-cells = <2>;
131
132 ngpios = <16>;
133 ralink,gpio-base = <24>;
134 ralink,register-map = [ 00 04 08 0c
135 10 14 18 1c
136 20 24 ];
137
138 status = "disabled";
139 };
140
141 gpio2: gpio@660 {
142 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
143 reg = <0x660 0x24>;
144
145 gpio-controller;
146 #gpio-cells = <2>;
147
148 ngpios = <6>;
149 ralink,gpio-base = <40>;
150 ralink,register-map = [ 00 04 08 0c
151 10 14 18 1c
152 20 24 ];
153
154 status = "disabled";
155 };
156
157 i2c@900 {
158 compatible = "ralink,rt2880-i2c";
159 reg = <0x900 0x100>;
160
161 clocks = <&sysc 7>;
162
163 resets = <&sysc 16>;
164 reset-names = "i2c";
165
166 #address-cells = <1>;
167 #size-cells = <0>;
168
169 status = "disabled";
170
171 pinctrl-names = "default";
172 pinctrl-0 = <&i2c_pins>;
173 };
174
175 i2s@a00 {
176 compatible = "ralink,rt3352-i2s";
177 reg = <0xa00 0x100>;
178
179 clocks = <&sysc 8>;
180
181 resets = <&sysc 17>;
182 reset-names = "i2s";
183
184 interrupt-parent = <&intc>;
185 interrupts = <10>;
186
187 txdma-req = <2>;
188 rxdma-req = <3>;
189
190 dmas = <&gdma 4>,
191 <&gdma 6>;
192 dma-names = "tx", "rx";
193
194 status = "disabled";
195 };
196
197 spi0: spi@b00 {
198 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
199 reg = <0xb00 0x40>;
200 #address-cells = <1>;
201 #size-cells = <0>;
202
203 clocks = <&sysc 9>;
204
205 resets = <&sysc 18>;
206 reset-names = "spi";
207
208 pinctrl-names = "default";
209 pinctrl-0 = <&spi_pins>;
210
211 status = "disabled";
212 };
213
214 spi1: spi@b40 {
215 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
216 reg = <0xb40 0x60>;
217 #address-cells = <1>;
218 #size-cells = <0>;
219
220 resets = <&sysc 18>;
221 reset-names = "spi";
222
223 pinctrl-names = "default";
224 pinctrl-0 = <&spi_cs1>;
225
226 status = "disabled";
227 };
228
229 uartlite: uartlite@c00 {
230 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
231 reg = <0xc00 0x100>;
232
233 clocks = <&sysc 11>;
234
235 resets = <&sysc 19>;
236
237 interrupt-parent = <&intc>;
238 interrupts = <12>;
239
240 reg-shift = <2>;
241
242 pinctrl-names = "default";
243 pinctrl-0 = <&uartlite_pins>;
244 };
245
246 gdma: gdma@2800 {
247 compatible = "ralink,rt3883-gdma";
248 reg = <0x2800 0x800>;
249
250 resets = <&sysc 14>;
251 reset-names = "dma";
252
253 interrupt-parent = <&intc>;
254 interrupts = <7>;
255
256 #dma-cells = <1>;
257 #dma-channels = <16>;
258 #dma-requests = <16>;
259
260 status = "disabled";
261 };
262 };
263
264 pinctrl: pinctrl {
265 compatible = "ralink,rt2880-pinmux";
266
267 pinctrl-names = "default";
268 pinctrl-0 = <&state_default>;
269
270 state_default: pinctrl0 {
271 };
272
273 i2c_pins: i2c_pins {
274 i2c_pins {
275 groups = "i2c";
276 function = "i2c";
277 };
278 };
279
280 mdio_pins: mdio {
281 mdio {
282 groups = "mdio";
283 function = "mdio";
284 };
285 };
286
287 rgmii_pins: rgmii {
288 rgmii {
289 groups = "rgmii";
290 function = "rgmii";
291 };
292 };
293
294 spi_pins: spi_pins {
295 spi_pins {
296 groups = "spi";
297 function = "spi";
298 };
299 };
300
301 spi_cs1: spi1 {
302 spi1 {
303 groups = "spi_cs1";
304 function = "spi_cs1";
305 };
306 };
307
308 uartlite_pins: uartlite {
309 uart {
310 groups = "uartlite";
311 function = "uartlite";
312 };
313 };
314 };
315
316 ethernet: ethernet@10100000 {
317 compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
318 reg = <0x10100000 0x10000>;
319
320 clocks = <&sysc 12>;
321
322 resets = <&sysc 21>, <&sysc 23>;
323 reset-names = "fe", "esw";
324
325 interrupt-parent = <&cpuintc>;
326 interrupts = <5>;
327
328 mediatek,switch = <&esw>;
329 };
330
331 esw: esw@10110000 {
332 compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
333 reg = <0x10110000 0x8000>;
334
335 resets = <&sysc 24>;
336 reset-names = "ephy";
337
338 interrupt-parent = <&intc>;
339 interrupts = <17>;
340 };
341
342 usbphy: usbphy {
343 compatible = "ralink,rt3352-usbphy";
344 #phy-cells = <0>;
345
346 ralink,sysctl = <&sysc>;
347 resets = <&sysc 22>, <&sysc 25>;
348 reset-names = "host", "device";
349 };
350
351 wmac: wmac@10180000 {
352 compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
353 reg = <0x10180000 0x40000>;
354
355 clocks = <&sysc 13>;
356
357 interrupt-parent = <&cpuintc>;
358 interrupts = <6>;
359
360 ralink,eeprom = "soc_wmac.eeprom";
361 };
362
363 ehci: ehci@101c0000 {
364 #address-cells = <1>;
365 #size-cells = <0>;
366 compatible = "generic-ehci";
367 reg = <0x101c0000 0x1000>;
368
369 phys = <&usbphy>;
370 phy-names = "usb";
371
372 interrupt-parent = <&intc>;
373 interrupts = <18>;
374
375 status = "disabled";
376
377 ehci_port1: port@1 {
378 reg = <1>;
379 #trigger-source-cells = <0>;
380 };
381 };
382
383 ohci: ohci@101c1000 {
384 #address-cells = <1>;
385 #size-cells = <0>;
386 compatible = "generic-ohci";
387 reg = <0x101c1000 0x1000>;
388
389 phys = <&usbphy>;
390 phy-names = "usb";
391
392 interrupt-parent = <&intc>;
393 interrupts = <18>;
394
395 status = "disabled";
396
397 ohci_port1: port@1 {
398 reg = <1>;
399 #trigger-source-cells = <0>;
400 };
401 };
402 };