ramips: update dtsi files to support second spi device
[openwrt/openwrt.git] / target / linux / ramips / dts / rt3883.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,rt3883-soc";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips74Kc";
9 };
10 };
11
12 chosen {
13 bootargs = "console=ttyS0,57600";
14 };
15
16 aliases {
17 spi0 = &spi0;
18 spi1 = &spi1;
19 };
20
21 cpuintc: cpuintc@0 {
22 #address-cells = <0>;
23 #interrupt-cells = <1>;
24 interrupt-controller;
25 compatible = "mti,cpu-interrupt-controller";
26 };
27
28 palmbus@10000000 {
29 compatible = "palmbus";
30 reg = <0x10000000 0x200000>;
31 ranges = <0x0 0x10000000 0x1FFFFF>;
32
33 #address-cells = <1>;
34 #size-cells = <1>;
35
36 sysc@0 {
37 compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
38 reg = <0x0 0x100>;
39 };
40
41 timer@100 {
42 compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
43 reg = <0x100 0x20>;
44
45 interrupt-parent = <&intc>;
46 interrupts = <1>;
47 };
48
49 watchdog@120 {
50 compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
51 reg = <0x120 0x10>;
52
53 resets = <&rstctrl 8>;
54 reset-names = "wdt";
55
56 interrupt-parent = <&intc>;
57 interrupts = <1>;
58 };
59
60 intc: intc@200 {
61 compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
62 reg = <0x200 0x100>;
63
64 resets = <&rstctrl 19>;
65 reset-names = "intc";
66
67 interrupt-controller;
68 #interrupt-cells = <1>;
69
70 interrupt-parent = <&cpuintc>;
71 interrupts = <2>;
72 };
73
74 memc@300 {
75 compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
76 reg = <0x300 0x100>;
77
78 resets = <&rstctrl 20>;
79 reset-names = "mc";
80
81 interrupt-parent = <&intc>;
82 interrupts = <3>;
83 };
84
85 uart@500 {
86 compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
87 reg = <0x500 0x100>;
88
89 resets = <&rstctrl 12>;
90 reset-names = "uart";
91
92 interrupt-parent = <&intc>;
93 interrupts = <5>;
94
95 reg-shift = <2>;
96
97 status = "disabled";
98 };
99
100 gpio0: gpio@600 {
101 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
102 reg = <0x600 0x34>;
103
104 resets = <&rstctrl 13>;
105 reset-names = "pio";
106
107 interrupt-parent = <&intc>;
108 interrupts = <6>;
109
110 gpio-controller;
111 #gpio-cells = <2>;
112
113 ralink,gpio-base = <0>;
114 ralink,num-gpios = <24>;
115 ralink,register-map = [ 00 04 08 0c
116 20 24 28 2c
117 30 34 ];
118 };
119
120 gpio1: gpio@638 {
121 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
122 reg = <0x638 0x24>;
123
124 gpio-controller;
125 #gpio-cells = <2>;
126
127 ralink,gpio-base = <24>;
128 ralink,num-gpios = <16>;
129 ralink,register-map = [ 00 04 08 0c
130 10 14 18 1c
131 20 24 ];
132
133 status = "disabled";
134 };
135
136 gpio2: gpio@660 {
137 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
138 reg = <0x660 0x24>;
139
140 gpio-controller;
141 #gpio-cells = <2>;
142
143 ralink,gpio-base = <40>;
144 ralink,num-gpios = <32>;
145 ralink,register-map = [ 00 04 08 0c
146 10 14 18 1c
147 20 24 ];
148
149 status = "disabled";
150 };
151
152 gpio3: gpio@688 {
153 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
154 reg = <0x688 0x24>;
155
156 gpio-controller;
157 #gpio-cells = <2>;
158
159 ralink,gpio-base = <72>;
160 ralink,num-gpios = <24>;
161 ralink,register-map = [ 00 04 08 0c
162 10 14 18 1c
163 20 24 ];
164
165 status = "disabled";
166 };
167
168 spi0: spi@b00 {
169 compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
170 reg = <0xb00 0x40>;
171 #address-cells = <1>;
172 #size-cells = <0>;
173
174 resets = <&rstctrl 18>;
175 reset-names = "spi";
176
177 pinctrl-names = "default";
178 pinctrl-0 = <&spi_pins>;
179
180 status = "disabled";
181 };
182
183 spi1: spi@b40 {
184 compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
185 reg = <0xb40 0x60>;
186 #address-cells = <1>;
187 #size-cells = <0>;
188
189 resets = <&rstctrl 18>;
190 reset-names = "spi";
191
192 pinctrl-names = "default";
193 pinctrl-0 = <&spi_cs1>;
194
195 status = "disabled";
196 };
197
198 uartlite@c00 {
199 compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
200 reg = <0xc00 0x100>;
201
202 resets = <&rstctrl 19>;
203 reset-names = "uartl";
204
205 interrupt-parent = <&intc>;
206 interrupts = <12>;
207
208 reg-shift = <2>;
209
210 pinctrl-names = "default";
211 pinctrl-0 = <&uartlite_pins>;
212 };
213 };
214
215 pinctrl {
216 compatible = "ralink,rt2880-pinmux";
217
218 pinctrl-names = "default";
219 pinctrl-0 = <&state_default>;
220
221 state_default: pinctrl0 {
222 };
223
224 spi_pins: spi {
225 spi {
226 ralink,group = "spi";
227 ralink,function = "spi";
228 };
229 };
230
231 spi_cs1: spi1 {
232 spi1 {
233 ralink,group = "spi_cs1";
234 ralink,function = "spi_cs1";
235 };
236 };
237
238 uartlite_pins: uartlite {
239 uart {
240 ralink,group = "uartlite";
241 ralink,function = "uartlite";
242 };
243 };
244 };
245
246 ethernet@10100000 {
247 compatible = "ralink,rt3883-eth";
248 reg = <0x10100000 10000>;
249
250 resets = <&rstctrl 21>;
251 reset-names = "fe";
252
253 interrupt-parent = <&cpuintc>;
254 interrupts = <5>;
255
256 port@0 {
257 compatible = "ralink,rt3883-port", "ralink,eth-port";
258 reg = <0>;
259 };
260
261 mdio-bus {
262 #address-cells = <1>;
263 #size-cells = <0>;
264
265 status = "disabled";
266 };
267 };
268
269 rstctrl: rstctrl {
270 compatible = "ralink,rt3883-reset", "ralink,rt2880-reset";
271 #reset-cells = <1>;
272 };
273
274 pci@10140000 {
275 compatible = "ralink,rt3883-pci";
276 reg = <0x10140000 0x20000>;
277 #address-cells = <1>;
278 #size-cells = <1>;
279 ranges; /* direct mapping */
280
281 status = "disabled";
282
283 pciintc: interrupt-controller {
284 interrupt-controller;
285 #address-cells = <0>;
286 #interrupt-cells = <1>;
287
288 interrupt-parent = <&cpuintc>;
289 interrupts = <4>;
290 };
291
292 host-bridge {
293 #address-cells = <3>;
294 #size-cells = <2>;
295 #interrupt-cells = <1>;
296
297 device_type = "pci";
298
299 bus-range = <0 255>;
300 ranges = <
301 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
302 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
303 >;
304
305 interrupt-map-mask = <0xf800 0 0 7>;
306 interrupt-map = <
307 /* IDSEL 17 */
308 0x8800 0 0 1 &pciintc 18
309 0x8800 0 0 2 &pciintc 18
310 0x8800 0 0 3 &pciintc 18
311 0x8800 0 0 4 &pciintc 18
312 /* IDSEL 18 */
313 0x9000 0 0 1 &pciintc 19
314 0x9000 0 0 2 &pciintc 19
315 0x9000 0 0 3 &pciintc 19
316 0x9000 0 0 4 &pciintc 19
317 >;
318
319 pci-bridge@1 {
320 reg = <0x0800 0 0 0 0>;
321 device_type = "pci";
322 #interrupt-cells = <1>;
323 #address-cells = <3>;
324 #size-cells = <2>;
325
326 status = "disabled";
327
328 ralink,pci-slot = <1>;
329
330 interrupt-map-mask = <0x0 0 0 0>;
331 interrupt-map = <0x0 0 0 0 &pciintc 20>;
332 };
333
334 pci-slot@17 {
335 reg = <0x8800 0 0 0 0>;
336 device_type = "pci";
337 #interrupt-cells = <1>;
338 #address-cells = <3>;
339 #size-cells = <2>;
340
341 ralink,pci-slot = <17>;
342
343 status = "disabled";
344 };
345
346 pci-slot@18 {
347 reg = <0x9000 0 0 0 0>;
348 device_type = "pci";
349 #interrupt-cells = <1>;
350 #address-cells = <3>;
351 #size-cells = <2>;
352
353 ralink,pci-slot = <18>;
354
355 status = "disabled";
356 };
357 };
358 };
359
360 usbphy: usbphy {
361 compatible = "ralink,rt3xxx-usbphy";
362 #phy-cells = <1>;
363
364 resets = <&rstctrl 22 &rstctrl 25>;
365 reset-names = "host", "device";
366 };
367
368 wmac@10180000 {
369 compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
370 reg = <0x10180000 40000>;
371
372 interrupt-parent = <&cpuintc>;
373 interrupts = <6>;
374
375 ralink,eeprom = "soc_wmac.eeprom";
376 };
377
378 ehci@101c0000 {
379 compatible = "ralink,rt3xxx-ehci", "ehci-platform";
380 reg = <0x101c0000 0x1000>;
381
382 phys = <&usbphy 1>;
383 phy-names = "usb";
384
385 interrupt-parent = <&intc>;
386 interrupts = <18>;
387
388 status = "disabled";
389 };
390
391 ohci@101c1000 {
392 compatible = "ralink,rt3xxx-ohci", "ohci-platform";
393 reg = <0x101c1000 0x1000>;
394
395 phys = <&usbphy 1>;
396 phy-names = "usb";
397
398 interrupt-parent = <&intc>;
399 interrupts = <18>;
400
401 status = "disabled";
402 };
403 };