ramips: DTS rework
[openwrt/openwrt.git] / target / linux / ramips / dts / rt3883.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,rt3883-soc";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips74Kc";
9 };
10 };
11
12 chosen {
13 bootargs = "console=ttyS0,57600";
14 };
15
16 aliases {
17 spi0 = &spi0;
18 spi1 = &spi1;
19 serial0 = &uartlite;
20 };
21
22 cpuintc: cpuintc@0 {
23 #address-cells = <0>;
24 #interrupt-cells = <1>;
25 interrupt-controller;
26 compatible = "mti,cpu-interrupt-controller";
27 };
28
29 palmbus: palmbus@10000000 {
30 compatible = "palmbus";
31 reg = <0x10000000 0x200000>;
32 ranges = <0x0 0x10000000 0x1FFFFF>;
33
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 sysc: sysc@0 {
38 compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
39 reg = <0x0 0x100>;
40 };
41
42 timer: timer@100 {
43 compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
44 reg = <0x100 0x20>;
45
46 interrupt-parent = <&intc>;
47 interrupts = <1>;
48 };
49
50 watchdog: watchdog@120 {
51 compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
52 reg = <0x120 0x10>;
53
54 resets = <&rstctrl 8>;
55 reset-names = "wdt";
56
57 interrupt-parent = <&intc>;
58 interrupts = <1>;
59 };
60
61 intc: intc@200 {
62 compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
63 reg = <0x200 0x100>;
64
65 resets = <&rstctrl 19>;
66 reset-names = "intc";
67
68 interrupt-controller;
69 #interrupt-cells = <1>;
70
71 interrupt-parent = <&cpuintc>;
72 interrupts = <2>;
73 };
74
75 memc: memc@300 {
76 compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
77 reg = <0x300 0x100>;
78
79 resets = <&rstctrl 20>;
80 reset-names = "mc";
81
82 interrupt-parent = <&intc>;
83 interrupts = <3>;
84 };
85
86 uart: uart@500 {
87 compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
88 reg = <0x500 0x100>;
89
90 resets = <&rstctrl 12>;
91 reset-names = "uart";
92
93 interrupt-parent = <&intc>;
94 interrupts = <5>;
95
96 reg-shift = <2>;
97
98 status = "disabled";
99 };
100
101 gpio0: gpio@600 {
102 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
103 reg = <0x600 0x34>;
104
105 resets = <&rstctrl 13>;
106 reset-names = "pio";
107
108 interrupt-parent = <&intc>;
109 interrupts = <6>;
110
111 gpio-controller;
112 #gpio-cells = <2>;
113
114 ralink,gpio-base = <0>;
115 ralink,num-gpios = <24>;
116 ralink,register-map = [ 00 04 08 0c
117 20 24 28 2c
118 30 34 ];
119 };
120
121 gpio1: gpio@638 {
122 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
123 reg = <0x638 0x24>;
124
125 gpio-controller;
126 #gpio-cells = <2>;
127
128 ralink,gpio-base = <24>;
129 ralink,num-gpios = <16>;
130 ralink,register-map = [ 00 04 08 0c
131 10 14 18 1c
132 20 24 ];
133
134 status = "disabled";
135 };
136
137 gpio2: gpio@660 {
138 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
139 reg = <0x660 0x24>;
140
141 gpio-controller;
142 #gpio-cells = <2>;
143
144 ralink,gpio-base = <40>;
145 ralink,num-gpios = <32>;
146 ralink,register-map = [ 00 04 08 0c
147 10 14 18 1c
148 20 24 ];
149
150 status = "disabled";
151 };
152
153 gpio3: gpio@688 {
154 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
155 reg = <0x688 0x24>;
156
157 gpio-controller;
158 #gpio-cells = <2>;
159
160 ralink,gpio-base = <72>;
161 ralink,num-gpios = <24>;
162 ralink,register-map = [ 00 04 08 0c
163 10 14 18 1c
164 20 24 ];
165
166 status = "disabled";
167 };
168
169 spi0: spi@b00 {
170 compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
171 reg = <0xb00 0x40>;
172 #address-cells = <1>;
173 #size-cells = <0>;
174
175 resets = <&rstctrl 18>;
176 reset-names = "spi";
177
178 pinctrl-names = "default";
179 pinctrl-0 = <&spi_pins>;
180
181 status = "disabled";
182 };
183
184 spi1: spi@b40 {
185 compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
186 reg = <0xb40 0x60>;
187 #address-cells = <1>;
188 #size-cells = <0>;
189
190 resets = <&rstctrl 18>;
191 reset-names = "spi";
192
193 pinctrl-names = "default";
194 pinctrl-0 = <&spi_cs1>;
195
196 status = "disabled";
197 };
198
199 uartlite: uartlite@c00 {
200 compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
201 reg = <0xc00 0x100>;
202
203 resets = <&rstctrl 19>;
204 reset-names = "uartl";
205
206 interrupt-parent = <&intc>;
207 interrupts = <12>;
208
209 reg-shift = <2>;
210
211 pinctrl-names = "default";
212 pinctrl-0 = <&uartlite_pins>;
213 };
214 };
215
216 pinctrl: pinctrl {
217 compatible = "ralink,rt2880-pinmux";
218
219 pinctrl-names = "default";
220 pinctrl-0 = <&state_default>;
221
222 state_default: pinctrl0 {
223 };
224
225 spi_pins: spi {
226 spi {
227 ralink,group = "spi";
228 ralink,function = "spi";
229 };
230 };
231
232 spi_cs1: spi1 {
233 spi1 {
234 ralink,group = "spi_cs1";
235 ralink,function = "spi_cs1";
236 };
237 };
238
239 uartlite_pins: uartlite {
240 uart {
241 ralink,group = "uartlite";
242 ralink,function = "uartlite";
243 };
244 };
245 };
246
247 ethernet: ethernet@10100000 {
248 compatible = "ralink,rt3883-eth";
249 reg = <0x10100000 0x10000>;
250
251 resets = <&rstctrl 21>;
252 reset-names = "fe";
253
254 interrupt-parent = <&cpuintc>;
255 interrupts = <5>;
256
257 port@0 {
258 compatible = "ralink,rt3883-port", "mediatek,eth-port";
259 reg = <0>;
260 };
261
262 mdio-bus {
263 #address-cells = <1>;
264 #size-cells = <0>;
265
266 status = "disabled";
267 };
268 };
269
270 rstctrl: rstctrl {
271 compatible = "ralink,rt3883-reset", "ralink,rt2880-reset";
272 #reset-cells = <1>;
273 };
274
275 pci: pci@10140000 {
276 compatible = "ralink,rt3883-pci";
277 reg = <0x10140000 0x20000>;
278 #address-cells = <1>;
279 #size-cells = <1>;
280 ranges; /* direct mapping */
281
282 status = "disabled";
283
284 pciintc: interrupt-controller {
285 interrupt-controller;
286 #address-cells = <0>;
287 #interrupt-cells = <1>;
288
289 interrupt-parent = <&cpuintc>;
290 interrupts = <4>;
291 };
292
293 host-bridge {
294 #address-cells = <3>;
295 #size-cells = <2>;
296 #interrupt-cells = <1>;
297
298 device_type = "pci";
299
300 bus-range = <0 255>;
301 ranges = <
302 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
303 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
304 >;
305
306 interrupt-map-mask = <0xf800 0 0 7>;
307 interrupt-map = <
308 /* IDSEL 17 */
309 0x8800 0 0 1 &pciintc 18
310 0x8800 0 0 2 &pciintc 18
311 0x8800 0 0 3 &pciintc 18
312 0x8800 0 0 4 &pciintc 18
313 /* IDSEL 18 */
314 0x9000 0 0 1 &pciintc 19
315 0x9000 0 0 2 &pciintc 19
316 0x9000 0 0 3 &pciintc 19
317 0x9000 0 0 4 &pciintc 19
318 >;
319
320 pci-bridge@1 {
321 reg = <0x0800 0 0 0 0>;
322 device_type = "pci";
323 #interrupt-cells = <1>;
324 #address-cells = <3>;
325 #size-cells = <2>;
326
327 status = "disabled";
328
329 ralink,pci-slot = <1>;
330
331 interrupt-map-mask = <0x0 0 0 0>;
332 interrupt-map = <0x0 0 0 0 &pciintc 20>;
333 };
334
335 pci-slot@17 {
336 reg = <0x8800 0 0 0 0>;
337 device_type = "pci";
338 #interrupt-cells = <1>;
339 #address-cells = <3>;
340 #size-cells = <2>;
341
342 ralink,pci-slot = <17>;
343
344 status = "disabled";
345 };
346
347 pci-slot@18 {
348 reg = <0x9000 0 0 0 0>;
349 device_type = "pci";
350 #interrupt-cells = <1>;
351 #address-cells = <3>;
352 #size-cells = <2>;
353
354 ralink,pci-slot = <18>;
355
356 status = "disabled";
357 };
358 };
359 };
360
361 usbphy: usbphy {
362 compatible = "ralink,rt3352-usbphy";
363 #phy-cells = <1>;
364
365 resets = <&rstctrl 22 &rstctrl 25>;
366 reset-names = "host", "device";
367 };
368
369 wmac: wmac@10180000 {
370 compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
371 reg = <0x10180000 0x40000>;
372
373 interrupt-parent = <&cpuintc>;
374 interrupts = <6>;
375
376 ralink,eeprom = "soc_wmac.eeprom";
377 };
378
379 ehci: ehci@101c0000 {
380 compatible = "generic-ehci";
381 reg = <0x101c0000 0x1000>;
382
383 phys = <&usbphy 1>;
384 phy-names = "usb";
385
386 interrupt-parent = <&intc>;
387 interrupts = <18>;
388
389 status = "disabled";
390 };
391
392 ohci: ohci@101c1000 {
393 compatible = "generic-ohci";
394 reg = <0x101c1000 0x1000>;
395
396 phys = <&usbphy 1>;
397 phy-names = "usb";
398
399 interrupt-parent = <&intc>;
400 interrupts = <18>;
401
402 status = "disabled";
403 };
404 };