target/linux/ramips/dts/rt5350_nixcore_x1.dtsi

   1 #include "rt5350.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4
   5 / {
   6         compatible = "nixcore,x1", "ralink,rt5350-soc";
   7
   8         chosen {
   9                 bootargs = "console=ttyS1,57600";
  10         };
  11
  12         gpio-export {
  13                 compatible = "gpio-export";
  14                 #size-cells = <0>;
  15
  16                 gpio0 {
  17                         gpio-export,name = "gpio0";
  18                         gpio-export,direction_may_change = <1>;
  19                         gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
  20                 };
  21
  22                 gpio1 {
  23                         gpio-export,name = "gpio1";
  24                         gpio-export,direction_may_change = <1>;
  25                         gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
  26                 };
  27
  28                 /* GPIOs 1-6 are I2C,SPI */
  29                 /* GPIO 7-14 are uart1 */
  30                 /* GPIOs 15 & 16 are uart2 */
  31                 /* JTAG */
  32
  33                 gpio17 {
  34                         /* JTAG_TDO */
  35                         gpio-export,name = "gpio17";
  36                         gpio-export,direction_may_change = <1>;
  37                         gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
  38                 };
  39
  40                 gpio18 {
  41                         /* JTAG_TDI */
  42                         gpio-export,name = "gpio18";
  43                         gpio-export,direction_may_change = <1>;
  44                         gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
  45                 };
  46
  47                 gpio19 {
  48                         /* JTAG_TMS */
  49                         gpio-export,name = "gpio19";
  50                         gpio-export,direction_may_change = <1>;
  51                         gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
  52                 };
  53
  54                 gpio20 {
  55                         /* JTAG_TCLK */
  56                         gpio-export,name = "gpio20";
  57                         gpio-export,direction_may_change = <1>;
  58                         gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
  59                 };
  60
  61                 gpio21 {
  62                         /* JTAG_TRST_N */
  63                         gpio-export,name = "gpio21";
  64                         gpio-export,direction_may_change = <1>;
  65                         gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
  66                 };
  67
  68                 /* ETH LEDs */
  69                 /*
  70                 gpio22 {
  71                         gpio-export,name = "gpio22";
  72                         gpio-export,direction_may_change = <1>;
  73                         gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
  74                 };
  75
  76                 gpio23 {
  77                         gpio-export,name = "gpio23";
  78                         gpio-export,direction_may_change = <1>;
  79                         gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
  80                 };
  81
  82                 gpio24 {
  83                         gpio-export,name = "gpio24";
  84                         gpio-export,direction_may_change = <1>;
  85                         gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
  86                 };
  87
  88                 gpio25 {
  89                         gpio-export,name = "gpio25";
  90                         gpio-export,direction_may_change = <1>;
  91                         gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
  92                 };
  93
  94                 */
  95                 gpio26 {
  96                         /* ETH4_LED */
  97                         gpio-export,name = "gpio26";
  98                         gpio-export,direction_may_change = <1>;
  99                         gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
 100                 };
 101
 102                 gpio27 {
 103                         /* spi_cs1 */
 104                         gpio-export,name = "gpio27";
 105                         gpio-export,direction_may_change = <1>;
 106                         gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
 107                 };
 108         };
 109 };
 110
 111 &spi0 {
 112         status = "okay";
 113
 114         flash@0 {
 115                 compatible = "jedec,spi-nor";
 116                 reg = <0>;
 117                 spi-max-frequency = <10000000>;
 118
 119                 partitions {
 120                         compatible = "fixed-partitions";
 121                         #address-cells = <1>;
 122                         #size-cells = <1>;
 123
 124                         partition@0 {
 125                                 label = "uboot";
 126                                 reg = <0x0 0x30000>;
 127                                 read-only;
 128                         };
 129
 130                         partition@30000 {
 131                                 label = "uboot-env";
 132                                 reg = <0x30000 0x10000>;
 133                                 read-only;
 134                         };
 135
 136                         factory: partition@40000 {
 137                                 label = "factory";
 138                                 reg = <0x40000 0x10000>;
 139                                 read-only;
 140                         };
 141
 142                         firmware: partition@50000 {
 143                                 compatible = "denx,uimage";
 144                                 label = "firmware";
 145                                 /* reg property is set based on flash size in DTS files */
 146                         };
 147                 };
 148         };
 149 };
 150
 151 &gpio1 {
 152         status = "okay";
 153 };
 154
 155 &i2c {
 156         status = "okay";
 157 };
 158
 159 &uart {
 160         status = "okay";
 161         reset-names = "gpio uartf";
 162 };
 163
 164 &state_default {
 165         gpio {
 166                 groups = "jtag", "led", "spi_cs1";
 167                 function = "gpio";
 168         };
 169 };
 170
 171 &ethernet {
 172         nvmem-cells = <&macaddr_factory_4>;
 173         nvmem-cell-names = "mac-address";
 174 };
 175
 176 &esw {
 177         mediatek,portmap = <0x17>;
 178 };
 179
 180 &wmac {
 181         ralink,mtd-eeprom = <&factory 0x0>;
 182 };
 183
 184 &factory {
 185         compatible = "nvmem-cells";
 186         #address-cells = <1>;
 187         #size-cells = <1>;
 188
 189         macaddr_factory_4: macaddr@4 {
 190                 reg = <0x4 0x6>;
 191         };
 192 };