ramips: mt7530 swconfig: fix race condition in register access
[openwrt/openwrt.git] / target / linux / ramips / files-4.14 / drivers / net / ethernet / mediatek / mt7530.c
1 /*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version 2
5 * of the License, or (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
13 * Copyright (C) 2016 Vitaly Chekryzhev <13hakta@gmail.com>
14 */
15
16 #include <linux/if.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/list.h>
20 #include <linux/if_ether.h>
21 #include <linux/skbuff.h>
22 #include <linux/netdevice.h>
23 #include <linux/netlink.h>
24 #include <linux/bitops.h>
25 #include <net/genetlink.h>
26 #include <linux/switch.h>
27 #include <linux/delay.h>
28 #include <linux/phy.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/lockdep.h>
32 #include <linux/workqueue.h>
33 #include <linux/of_device.h>
34
35 #include "mt7530.h"
36
37 #define MT7530_CPU_PORT 6
38 #define MT7530_NUM_PORTS 8
39 #ifdef CONFIG_SOC_MT7621
40 #define MT7530_NUM_VLANS 4095
41 #else
42 #define MT7530_NUM_VLANS 16
43 #endif
44 #define MT7530_MAX_VID 4095
45 #define MT7530_MIN_VID 0
46
47 #define MT7530_PORT_MIB_TXB_ID 2 /* TxGOC */
48 #define MT7530_PORT_MIB_RXB_ID 6 /* RxGOC */
49
50 #define MT7621_PORT_MIB_TXB_ID 18 /* TxByte */
51 #define MT7621_PORT_MIB_RXB_ID 37 /* RxByte */
52
53 /* registers */
54 #define REG_ESW_VLAN_VTCR 0x90
55 #define REG_ESW_VLAN_VAWD1 0x94
56 #define REG_ESW_VLAN_VAWD2 0x98
57 #define REG_ESW_VLAN_VTIM(x) (0x100 + 4 * ((x) / 2))
58
59 #define REG_ESW_VLAN_VAWD1_IVL_MAC BIT(30)
60 #define REG_ESW_VLAN_VAWD1_VTAG_EN BIT(28)
61 #define REG_ESW_VLAN_VAWD1_VALID BIT(0)
62
63 /* vlan egress mode */
64 enum {
65 ETAG_CTRL_UNTAG = 0,
66 ETAG_CTRL_TAG = 2,
67 ETAG_CTRL_SWAP = 1,
68 ETAG_CTRL_STACK = 3,
69 };
70
71 #define REG_ESW_PORT_PCR(x) (0x2004 | ((x) << 8))
72 #define REG_ESW_PORT_PVC(x) (0x2010 | ((x) << 8))
73 #define REG_ESW_PORT_PPBV1(x) (0x2014 | ((x) << 8))
74
75 #define REG_HWTRAP 0x7804
76
77 #define MIB_DESC(_s , _o, _n) \
78 { \
79 .size = (_s), \
80 .offset = (_o), \
81 .name = (_n), \
82 }
83
84 struct mt7xxx_mib_desc {
85 unsigned int size;
86 unsigned int offset;
87 const char *name;
88 };
89
90 static const struct mt7xxx_mib_desc mt7620_mibs[] = {
91 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT0, "PPE_AC_BCNT0"),
92 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT0, "PPE_AC_PCNT0"),
93 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT63, "PPE_AC_BCNT63"),
94 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT63, "PPE_AC_PCNT63"),
95 MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT0, "PPE_MTR_CNT0"),
96 MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT63, "PPE_MTR_CNT63"),
97 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GBCNT, "GDM1_TX_GBCNT"),
98 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GPCNT, "GDM1_TX_GPCNT"),
99 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_SKIPCNT, "GDM1_TX_SKIPCNT"),
100 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_COLCNT, "GDM1_TX_COLCNT"),
101 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GBCNT1, "GDM1_RX_GBCNT1"),
102 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GPCNT1, "GDM1_RX_GPCNT1"),
103 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_OERCNT, "GDM1_RX_OERCNT"),
104 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FERCNT, "GDM1_RX_FERCNT"),
105 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_SERCNT, "GDM1_RX_SERCNT"),
106 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_LERCNT, "GDM1_RX_LERCNT"),
107 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_CERCNT, "GDM1_RX_CERCNT"),
108 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FCCNT, "GDM1_RX_FCCNT"),
109 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GBCNT, "GDM2_TX_GBCNT"),
110 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GPCNT, "GDM2_TX_GPCNT"),
111 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_SKIPCNT, "GDM2_TX_SKIPCNT"),
112 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_COLCNT, "GDM2_TX_COLCNT"),
113 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GBCNT, "GDM2_RX_GBCNT"),
114 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GPCNT, "GDM2_RX_GPCNT"),
115 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_OERCNT, "GDM2_RX_OERCNT"),
116 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FERCNT, "GDM2_RX_FERCNT"),
117 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_SERCNT, "GDM2_RX_SERCNT"),
118 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_LERCNT, "GDM2_RX_LERCNT"),
119 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_CERCNT, "GDM2_RX_CERCNT"),
120 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FCCNT, "GDM2_RX_FCCNT")
121 };
122
123 static const struct mt7xxx_mib_desc mt7620_port_mibs[] = {
124 MIB_DESC(1, MT7620_MIB_STATS_PORT_TGPCN, "TxGPC"),
125 MIB_DESC(1, MT7620_MIB_STATS_PORT_TBOCN, "TxBOC"),
126 MIB_DESC(1, MT7620_MIB_STATS_PORT_TGOCN, "TxGOC"),
127 MIB_DESC(1, MT7620_MIB_STATS_PORT_TEPCN, "TxEPC"),
128 MIB_DESC(1, MT7620_MIB_STATS_PORT_RGPCN, "RxGPC"),
129 MIB_DESC(1, MT7620_MIB_STATS_PORT_RBOCN, "RxBOC"),
130 MIB_DESC(1, MT7620_MIB_STATS_PORT_RGOCN, "RxGOC"),
131 MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC1N, "RxEPC1"),
132 MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC2N, "RxEPC2")
133 };
134
135 static const struct mt7xxx_mib_desc mt7621_mibs[] = {
136 MIB_DESC(1, MT7621_STATS_TDPC, "TxDrop"),
137 MIB_DESC(1, MT7621_STATS_TCRC, "TxCRC"),
138 MIB_DESC(1, MT7621_STATS_TUPC, "TxUni"),
139 MIB_DESC(1, MT7621_STATS_TMPC, "TxMulti"),
140 MIB_DESC(1, MT7621_STATS_TBPC, "TxBroad"),
141 MIB_DESC(1, MT7621_STATS_TCEC, "TxCollision"),
142 MIB_DESC(1, MT7621_STATS_TSCEC, "TxSingleCol"),
143 MIB_DESC(1, MT7621_STATS_TMCEC, "TxMultiCol"),
144 MIB_DESC(1, MT7621_STATS_TDEC, "TxDefer"),
145 MIB_DESC(1, MT7621_STATS_TLCEC, "TxLateCol"),
146 MIB_DESC(1, MT7621_STATS_TXCEC, "TxExcCol"),
147 MIB_DESC(1, MT7621_STATS_TPPC, "TxPause"),
148 MIB_DESC(1, MT7621_STATS_TL64PC, "Tx64Byte"),
149 MIB_DESC(1, MT7621_STATS_TL65PC, "Tx65Byte"),
150 MIB_DESC(1, MT7621_STATS_TL128PC, "Tx128Byte"),
151 MIB_DESC(1, MT7621_STATS_TL256PC, "Tx256Byte"),
152 MIB_DESC(1, MT7621_STATS_TL512PC, "Tx512Byte"),
153 MIB_DESC(1, MT7621_STATS_TL1024PC, "Tx1024Byte"),
154 MIB_DESC(2, MT7621_STATS_TOC, "TxByte"),
155 MIB_DESC(1, MT7621_STATS_RDPC, "RxDrop"),
156 MIB_DESC(1, MT7621_STATS_RFPC, "RxFiltered"),
157 MIB_DESC(1, MT7621_STATS_RUPC, "RxUni"),
158 MIB_DESC(1, MT7621_STATS_RMPC, "RxMulti"),
159 MIB_DESC(1, MT7621_STATS_RBPC, "RxBroad"),
160 MIB_DESC(1, MT7621_STATS_RAEPC, "RxAlignErr"),
161 MIB_DESC(1, MT7621_STATS_RCEPC, "RxCRC"),
162 MIB_DESC(1, MT7621_STATS_RUSPC, "RxUnderSize"),
163 MIB_DESC(1, MT7621_STATS_RFEPC, "RxFragment"),
164 MIB_DESC(1, MT7621_STATS_ROSPC, "RxOverSize"),
165 MIB_DESC(1, MT7621_STATS_RJEPC, "RxJabber"),
166 MIB_DESC(1, MT7621_STATS_RPPC, "RxPause"),
167 MIB_DESC(1, MT7621_STATS_RL64PC, "Rx64Byte"),
168 MIB_DESC(1, MT7621_STATS_RL65PC, "Rx65Byte"),
169 MIB_DESC(1, MT7621_STATS_RL128PC, "Rx128Byte"),
170 MIB_DESC(1, MT7621_STATS_RL256PC, "Rx256Byte"),
171 MIB_DESC(1, MT7621_STATS_RL512PC, "Rx512Byte"),
172 MIB_DESC(1, MT7621_STATS_RL1024PC, "Rx1024Byte"),
173 MIB_DESC(2, MT7621_STATS_ROC, "RxByte"),
174 MIB_DESC(1, MT7621_STATS_RDPC_CTRL, "RxCtrlDrop"),
175 MIB_DESC(1, MT7621_STATS_RDPC_ING, "RxIngDrop"),
176 MIB_DESC(1, MT7621_STATS_RDPC_ARL, "RxARLDrop")
177 };
178
179 enum {
180 /* Global attributes. */
181 MT7530_ATTR_ENABLE_VLAN,
182 };
183
184 struct mt7530_port_entry {
185 u16 pvid;
186 };
187
188 struct mt7530_vlan_entry {
189 u16 vid;
190 u8 member;
191 u8 etags;
192 };
193
194 struct mt7530_priv {
195 void __iomem *base;
196 struct mii_bus *bus;
197 struct switch_dev swdev;
198
199 bool global_vlan_enable;
200 struct mt7530_vlan_entry vlan_entries[MT7530_NUM_VLANS];
201 struct mt7530_port_entry port_entries[MT7530_NUM_PORTS];
202 };
203
204 struct mt7530_mapping {
205 char *name;
206 u16 pvids[MT7530_NUM_PORTS];
207 u8 members[MT7530_NUM_VLANS];
208 u8 etags[MT7530_NUM_VLANS];
209 u16 vids[MT7530_NUM_VLANS];
210 } mt7530_defaults[] = {
211 {
212 .name = "llllw",
213 .pvids = { 1, 1, 1, 1, 2, 1, 1 },
214 .members = { 0, 0x6f, 0x50 },
215 .etags = { 0, 0x40, 0x40 },
216 .vids = { 0, 1, 2 },
217 }, {
218 .name = "wllll",
219 .pvids = { 2, 1, 1, 1, 1, 1, 1 },
220 .members = { 0, 0x7e, 0x41 },
221 .etags = { 0, 0x40, 0x40 },
222 .vids = { 0, 1, 2 },
223 }, {
224 .name = "lwlll",
225 .pvids = { 1, 2, 1, 1, 1, 1, 1 },
226 .members = { 0, 0x7d, 0x42 },
227 .etags = { 0, 0x40, 0x40 },
228 .vids = { 0, 1, 2 },
229 },
230 };
231
232 struct mt7530_mapping*
233 mt7530_find_mapping(struct device_node *np)
234 {
235 const char *map;
236 int i;
237
238 if (of_property_read_string(np, "mediatek,portmap", &map))
239 return NULL;
240
241 for (i = 0; i < ARRAY_SIZE(mt7530_defaults); i++)
242 if (!strcmp(map, mt7530_defaults[i].name))
243 return &mt7530_defaults[i];
244
245 return NULL;
246 }
247
248 static void
249 mt7530_apply_mapping(struct mt7530_priv *mt7530, struct mt7530_mapping *map)
250 {
251 int i = 0;
252
253 for (i = 0; i < MT7530_NUM_PORTS; i++)
254 mt7530->port_entries[i].pvid = map->pvids[i];
255
256 for (i = 0; i < MT7530_NUM_VLANS; i++) {
257 mt7530->vlan_entries[i].member = map->members[i];
258 mt7530->vlan_entries[i].etags = map->etags[i];
259 mt7530->vlan_entries[i].vid = map->vids[i];
260 }
261 }
262
263 static int
264 mt7530_reset_switch(struct switch_dev *dev)
265 {
266 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
267 int i;
268
269 memset(priv->port_entries, 0, sizeof(priv->port_entries));
270 memset(priv->vlan_entries, 0, sizeof(priv->vlan_entries));
271
272 /* set default vid of each vlan to the same number of vlan, so the vid
273 * won't need be set explicitly.
274 */
275 for (i = 0; i < MT7530_NUM_VLANS; i++) {
276 priv->vlan_entries[i].vid = i;
277 }
278
279 return 0;
280 }
281
282 static int
283 mt7530_get_vlan_enable(struct switch_dev *dev,
284 const struct switch_attr *attr,
285 struct switch_val *val)
286 {
287 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
288
289 val->value.i = priv->global_vlan_enable;
290
291 return 0;
292 }
293
294 static int
295 mt7530_set_vlan_enable(struct switch_dev *dev,
296 const struct switch_attr *attr,
297 struct switch_val *val)
298 {
299 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
300
301 priv->global_vlan_enable = val->value.i != 0;
302
303 return 0;
304 }
305
306 static u32
307 mt7530_r32(struct mt7530_priv *priv, u32 reg)
308 {
309 u32 val;
310 if (priv->bus) {
311 u16 high, low;
312
313 mutex_lock(&priv->bus->mdio_lock);
314 __mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
315 low = __mdiobus_read(priv->bus, 0x1f, (reg >> 2) & 0xf);
316 high = __mdiobus_read(priv->bus, 0x1f, 0x10);
317 mutex_unlock(&priv->bus->mdio_lock);
318
319 return (high << 16) | (low & 0xffff);
320 }
321
322 val = ioread32(priv->base + reg);
323 pr_debug("MT7530 MDIO Read [%04x]=%08x\n", reg, val);
324
325 return val;
326 }
327
328 static void
329 mt7530_w32(struct mt7530_priv *priv, u32 reg, u32 val)
330 {
331 if (priv->bus) {
332 mutex_lock(&priv->bus->mdio_lock);
333 __mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
334 __mdiobus_write(priv->bus, 0x1f, (reg >> 2) & 0xf, val & 0xffff);
335 __mdiobus_write(priv->bus, 0x1f, 0x10, val >> 16);
336 mutex_unlock(&priv->bus->mdio_lock);
337 return;
338 }
339
340 pr_debug("MT7530 MDIO Write[%04x]=%08x\n", reg, val);
341 iowrite32(val, priv->base + reg);
342 }
343
344 static void
345 mt7530_vtcr(struct mt7530_priv *priv, u32 cmd, u32 val)
346 {
347 int i;
348
349 mt7530_w32(priv, REG_ESW_VLAN_VTCR, BIT(31) | (cmd << 12) | val);
350
351 for (i = 0; i < 20; i++) {
352 u32 val = mt7530_r32(priv, REG_ESW_VLAN_VTCR);
353
354 if ((val & BIT(31)) == 0)
355 break;
356
357 udelay(1000);
358 }
359 if (i == 20)
360 printk("mt7530: vtcr timeout\n");
361 }
362
363 static int
364 mt7530_get_port_pvid(struct switch_dev *dev, int port, int *val)
365 {
366 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
367
368 if (port >= MT7530_NUM_PORTS)
369 return -EINVAL;
370
371 *val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(port));
372 *val &= 0xfff;
373
374 return 0;
375 }
376
377 static int
378 mt7530_set_port_pvid(struct switch_dev *dev, int port, int pvid)
379 {
380 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
381
382 if (port >= MT7530_NUM_PORTS)
383 return -EINVAL;
384
385 if (pvid < MT7530_MIN_VID || pvid > MT7530_MAX_VID)
386 return -EINVAL;
387
388 priv->port_entries[port].pvid = pvid;
389
390 return 0;
391 }
392
393 static int
394 mt7530_get_vlan_ports(struct switch_dev *dev, struct switch_val *val)
395 {
396 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
397 u32 member;
398 u32 etags;
399 int i;
400
401 val->len = 0;
402
403 if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS)
404 return -EINVAL;
405
406 mt7530_vtcr(priv, 0, val->port_vlan);
407
408 member = mt7530_r32(priv, REG_ESW_VLAN_VAWD1);
409 member >>= 16;
410 member &= 0xff;
411
412 etags = mt7530_r32(priv, REG_ESW_VLAN_VAWD2);
413
414 for (i = 0; i < MT7530_NUM_PORTS; i++) {
415 struct switch_port *p;
416 int etag;
417
418 if (!(member & BIT(i)))
419 continue;
420
421 p = &val->value.ports[val->len++];
422 p->id = i;
423
424 etag = (etags >> (i * 2)) & 0x3;
425
426 if (etag == ETAG_CTRL_TAG)
427 p->flags |= BIT(SWITCH_PORT_FLAG_TAGGED);
428 else if (etag != ETAG_CTRL_UNTAG)
429 printk("vlan egress tag control neither untag nor tag.\n");
430 }
431
432 return 0;
433 }
434
435 static int
436 mt7530_set_vlan_ports(struct switch_dev *dev, struct switch_val *val)
437 {
438 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
439 u8 member = 0;
440 u8 etags = 0;
441 int i;
442
443 if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS ||
444 val->len > MT7530_NUM_PORTS)
445 return -EINVAL;
446
447 for (i = 0; i < val->len; i++) {
448 struct switch_port *p = &val->value.ports[i];
449
450 if (p->id >= MT7530_NUM_PORTS)
451 return -EINVAL;
452
453 member |= BIT(p->id);
454
455 if (p->flags & BIT(SWITCH_PORT_FLAG_TAGGED))
456 etags |= BIT(p->id);
457 }
458 priv->vlan_entries[val->port_vlan].member = member;
459 priv->vlan_entries[val->port_vlan].etags = etags;
460
461 return 0;
462 }
463
464 static int
465 mt7530_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
466 struct switch_val *val)
467 {
468 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
469 int vlan;
470 u16 vid;
471
472 vlan = val->port_vlan;
473 vid = (u16)val->value.i;
474
475 if (vlan < 0 || vlan >= MT7530_NUM_VLANS)
476 return -EINVAL;
477
478 if (vid < MT7530_MIN_VID || vid > MT7530_MAX_VID)
479 return -EINVAL;
480
481 priv->vlan_entries[vlan].vid = vid;
482 return 0;
483 }
484
485 static int
486 mt7621_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
487 struct switch_val *val)
488 {
489 val->value.i = val->port_vlan;
490 return 0;
491 }
492
493 static int
494 mt7530_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
495 struct switch_val *val)
496 {
497 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
498 u32 vid;
499 int vlan;
500
501 vlan = val->port_vlan;
502
503 vid = mt7530_r32(priv, REG_ESW_VLAN_VTIM(vlan));
504 if (vlan & 1)
505 vid = vid >> 12;
506 vid &= 0xfff;
507
508 val->value.i = vid;
509 return 0;
510 }
511
512 static void
513 mt7530_write_vlan_entry(struct mt7530_priv *priv, int vlan, u16 vid,
514 u8 ports, u8 etags)
515 {
516 int port;
517 u32 val;
518
519 #ifndef CONFIG_SOC_MT7621
520 /* vid of vlan */
521 val = mt7530_r32(priv, REG_ESW_VLAN_VTIM(vlan));
522 if (vlan % 2 == 0) {
523 val &= 0xfff000;
524 val |= vid;
525 } else {
526 val &= 0xfff;
527 val |= (vid << 12);
528 }
529 mt7530_w32(priv, REG_ESW_VLAN_VTIM(vlan), val);
530 #endif
531
532 /* vlan port membership */
533 if (ports)
534 mt7530_w32(priv, REG_ESW_VLAN_VAWD1, REG_ESW_VLAN_VAWD1_IVL_MAC |
535 REG_ESW_VLAN_VAWD1_VTAG_EN | (ports << 16) |
536 REG_ESW_VLAN_VAWD1_VALID);
537 else
538 mt7530_w32(priv, REG_ESW_VLAN_VAWD1, 0);
539
540 /* egress mode */
541 val = 0;
542 for (port = 0; port < MT7530_NUM_PORTS; port++) {
543 if (etags & BIT(port))
544 val |= ETAG_CTRL_TAG << (port * 2);
545 else
546 val |= ETAG_CTRL_UNTAG << (port * 2);
547 }
548 mt7530_w32(priv, REG_ESW_VLAN_VAWD2, val);
549
550 /* write to vlan table */
551 #ifdef CONFIG_SOC_MT7621
552 mt7530_vtcr(priv, 1, vid);
553 #else
554 mt7530_vtcr(priv, 1, vlan);
555 #endif
556 }
557
558 static int
559 mt7530_apply_config(struct switch_dev *dev)
560 {
561 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
562 int i, j;
563 u8 tag_ports;
564 u8 untag_ports;
565
566 if (!priv->global_vlan_enable) {
567 for (i = 0; i < MT7530_NUM_PORTS; i++)
568 mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00400000);
569
570 mt7530_w32(priv, REG_ESW_PORT_PCR(MT7530_CPU_PORT), 0x00ff0000);
571
572 for (i = 0; i < MT7530_NUM_PORTS; i++)
573 mt7530_w32(priv, REG_ESW_PORT_PVC(i), 0x810000c0);
574
575 return 0;
576 }
577
578 /* set all ports as security mode */
579 for (i = 0; i < MT7530_NUM_PORTS; i++)
580 mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00ff0003);
581
582 /* check if a port is used in tag/untag vlan egress mode */
583 tag_ports = 0;
584 untag_ports = 0;
585
586 for (i = 0; i < MT7530_NUM_VLANS; i++) {
587 u8 member = priv->vlan_entries[i].member;
588 u8 etags = priv->vlan_entries[i].etags;
589
590 if (!member)
591 continue;
592
593 for (j = 0; j < MT7530_NUM_PORTS; j++) {
594 if (!(member & BIT(j)))
595 continue;
596
597 if (etags & BIT(j))
598 tag_ports |= 1u << j;
599 else
600 untag_ports |= 1u << j;
601 }
602 }
603
604 /* set all untag-only ports as transparent and the rest as user port */
605 for (i = 0; i < MT7530_NUM_PORTS; i++) {
606 u32 pvc_mode = 0x81000000;
607
608 if (untag_ports & BIT(i) && !(tag_ports & BIT(i)))
609 pvc_mode = 0x810000c0;
610
611 mt7530_w32(priv, REG_ESW_PORT_PVC(i), pvc_mode);
612 }
613
614 /* first clear the swtich vlan table */
615 for (i = 0; i < MT7530_NUM_VLANS; i++)
616 mt7530_write_vlan_entry(priv, i, i, 0, 0);
617
618 /* now program only vlans with members to avoid
619 clobbering remapped entries in later iterations */
620 for (i = 0; i < MT7530_NUM_VLANS; i++) {
621 u16 vid = priv->vlan_entries[i].vid;
622 u8 member = priv->vlan_entries[i].member;
623 u8 etags = priv->vlan_entries[i].etags;
624
625 if (member)
626 mt7530_write_vlan_entry(priv, i, vid, member, etags);
627 }
628
629 /* Port Default PVID */
630 for (i = 0; i < MT7530_NUM_PORTS; i++) {
631 int vlan = priv->port_entries[i].pvid;
632 u16 pvid = 0;
633 u32 val;
634
635 if (vlan < MT7530_NUM_VLANS && priv->vlan_entries[vlan].member)
636 pvid = priv->vlan_entries[vlan].vid;
637
638 val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(i));
639 val &= ~0xfff;
640 val |= pvid;
641 mt7530_w32(priv, REG_ESW_PORT_PPBV1(i), val);
642 }
643
644 return 0;
645 }
646
647 static int
648 mt7530_get_port_link(struct switch_dev *dev, int port,
649 struct switch_port_link *link)
650 {
651 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
652 u32 speed, pmsr;
653
654 if (port < 0 || port >= MT7530_NUM_PORTS)
655 return -EINVAL;
656
657 pmsr = mt7530_r32(priv, 0x3008 + (0x100 * port));
658
659 link->link = pmsr & 1;
660 link->duplex = (pmsr >> 1) & 1;
661 speed = (pmsr >> 2) & 3;
662
663 switch (speed) {
664 case 0:
665 link->speed = SWITCH_PORT_SPEED_10;
666 break;
667 case 1:
668 link->speed = SWITCH_PORT_SPEED_100;
669 break;
670 case 2:
671 case 3: /* forced gige speed can be 2 or 3 */
672 link->speed = SWITCH_PORT_SPEED_1000;
673 break;
674 default:
675 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
676 break;
677 }
678
679 return 0;
680 }
681
682 static u64 get_mib_counter(struct mt7530_priv *priv, int i, int port)
683 {
684 unsigned int port_base;
685 u64 lo;
686
687 port_base = MT7621_MIB_COUNTER_BASE +
688 MT7621_MIB_COUNTER_PORT_OFFSET * port;
689
690 lo = mt7530_r32(priv, port_base + mt7621_mibs[i].offset);
691 if (mt7621_mibs[i].size == 2) {
692 u64 hi;
693
694 hi = mt7530_r32(priv, port_base + mt7621_mibs[i].offset + 4);
695 lo |= hi << 32;
696 }
697
698 return lo;
699 }
700
701 static int mt7621_sw_get_port_mib(struct switch_dev *dev,
702 const struct switch_attr *attr,
703 struct switch_val *val)
704 {
705 static char buf[4096];
706 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
707 int i, len = 0;
708
709 if (val->port_vlan >= MT7530_NUM_PORTS)
710 return -EINVAL;
711
712 len += snprintf(buf + len, sizeof(buf) - len,
713 "Port %d MIB counters\n", val->port_vlan);
714
715 for (i = 0; i < ARRAY_SIZE(mt7621_mibs); ++i) {
716 u64 counter;
717 len += snprintf(buf + len, sizeof(buf) - len,
718 "%-11s: ", mt7621_mibs[i].name);
719 counter = get_mib_counter(priv, i, val->port_vlan);
720 len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
721 counter);
722 }
723
724 val->value.s = buf;
725 val->len = len;
726 return 0;
727 }
728
729 static u64 get_mib_counter_7620(struct mt7530_priv *priv, int i)
730 {
731 return mt7530_r32(priv, MT7620_MIB_COUNTER_BASE + mt7620_mibs[i].offset);
732 }
733
734 static u64 get_mib_counter_port_7620(struct mt7530_priv *priv, int i, int port)
735 {
736 return mt7530_r32(priv,
737 MT7620_MIB_COUNTER_BASE_PORT +
738 (MT7620_MIB_COUNTER_PORT_OFFSET * port) +
739 mt7620_port_mibs[i].offset);
740 }
741
742 static int mt7530_sw_get_mib(struct switch_dev *dev,
743 const struct switch_attr *attr,
744 struct switch_val *val)
745 {
746 static char buf[4096];
747 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
748 int i, len = 0;
749
750 len += snprintf(buf + len, sizeof(buf) - len, "Switch MIB counters\n");
751
752 for (i = 0; i < ARRAY_SIZE(mt7620_mibs); ++i) {
753 u64 counter;
754 len += snprintf(buf + len, sizeof(buf) - len,
755 "%-11s: ", mt7620_mibs[i].name);
756 counter = get_mib_counter_7620(priv, i);
757 len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
758 counter);
759 }
760
761 val->value.s = buf;
762 val->len = len;
763 return 0;
764 }
765
766 static int mt7530_sw_get_port_mib(struct switch_dev *dev,
767 const struct switch_attr *attr,
768 struct switch_val *val)
769 {
770 static char buf[4096];
771 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
772 int i, len = 0;
773
774 if (val->port_vlan >= MT7530_NUM_PORTS)
775 return -EINVAL;
776
777 len += snprintf(buf + len, sizeof(buf) - len,
778 "Port %d MIB counters\n", val->port_vlan);
779
780 for (i = 0; i < ARRAY_SIZE(mt7620_port_mibs); ++i) {
781 u64 counter;
782 len += snprintf(buf + len, sizeof(buf) - len,
783 "%-11s: ", mt7620_port_mibs[i].name);
784 counter = get_mib_counter_port_7620(priv, i, val->port_vlan);
785 len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
786 counter);
787 }
788
789 val->value.s = buf;
790 val->len = len;
791 return 0;
792 }
793
794 static int mt7530_get_port_stats(struct switch_dev *dev, int port,
795 struct switch_port_stats *stats)
796 {
797 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
798
799 if (port < 0 || port >= MT7530_NUM_PORTS)
800 return -EINVAL;
801
802 stats->tx_bytes = get_mib_counter_port_7620(priv, MT7530_PORT_MIB_TXB_ID, port);
803 stats->rx_bytes = get_mib_counter_port_7620(priv, MT7530_PORT_MIB_RXB_ID, port);
804
805 return 0;
806 }
807
808 static int mt7621_get_port_stats(struct switch_dev *dev, int port,
809 struct switch_port_stats *stats)
810 {
811 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
812
813 if (port < 0 || port >= MT7530_NUM_PORTS)
814 return -EINVAL;
815
816 stats->tx_bytes = get_mib_counter(priv, MT7621_PORT_MIB_TXB_ID, port);
817 stats->rx_bytes = get_mib_counter(priv, MT7621_PORT_MIB_RXB_ID, port);
818
819 return 0;
820 }
821
822 static const struct switch_attr mt7530_global[] = {
823 {
824 .type = SWITCH_TYPE_INT,
825 .name = "enable_vlan",
826 .description = "VLAN mode (1:enabled)",
827 .max = 1,
828 .id = MT7530_ATTR_ENABLE_VLAN,
829 .get = mt7530_get_vlan_enable,
830 .set = mt7530_set_vlan_enable,
831 }, {
832 .type = SWITCH_TYPE_STRING,
833 .name = "mib",
834 .description = "Get MIB counters for switch",
835 .get = mt7530_sw_get_mib,
836 .set = NULL,
837 },
838 };
839
840 static const struct switch_attr mt7621_port[] = {
841 {
842 .type = SWITCH_TYPE_STRING,
843 .name = "mib",
844 .description = "Get MIB counters for port",
845 .get = mt7621_sw_get_port_mib,
846 .set = NULL,
847 },
848 };
849
850 static const struct switch_attr mt7621_vlan[] = {
851 {
852 .type = SWITCH_TYPE_INT,
853 .name = "vid",
854 .description = "VLAN ID (0-4094)",
855 .set = mt7530_set_vid,
856 .get = mt7621_get_vid,
857 .max = 4094,
858 },
859 };
860
861 static const struct switch_attr mt7530_port[] = {
862 {
863 .type = SWITCH_TYPE_STRING,
864 .name = "mib",
865 .description = "Get MIB counters for port",
866 .get = mt7530_sw_get_port_mib,
867 .set = NULL,
868 },
869 };
870
871 static const struct switch_attr mt7530_vlan[] = {
872 {
873 .type = SWITCH_TYPE_INT,
874 .name = "vid",
875 .description = "VLAN ID (0-4094)",
876 .set = mt7530_set_vid,
877 .get = mt7530_get_vid,
878 .max = 4094,
879 },
880 };
881
882 static const struct switch_dev_ops mt7621_ops = {
883 .attr_global = {
884 .attr = mt7530_global,
885 .n_attr = ARRAY_SIZE(mt7530_global),
886 },
887 .attr_port = {
888 .attr = mt7621_port,
889 .n_attr = ARRAY_SIZE(mt7621_port),
890 },
891 .attr_vlan = {
892 .attr = mt7621_vlan,
893 .n_attr = ARRAY_SIZE(mt7621_vlan),
894 },
895 .get_vlan_ports = mt7530_get_vlan_ports,
896 .set_vlan_ports = mt7530_set_vlan_ports,
897 .get_port_pvid = mt7530_get_port_pvid,
898 .set_port_pvid = mt7530_set_port_pvid,
899 .get_port_link = mt7530_get_port_link,
900 .get_port_stats = mt7621_get_port_stats,
901 .apply_config = mt7530_apply_config,
902 .reset_switch = mt7530_reset_switch,
903 };
904
905 static const struct switch_dev_ops mt7530_ops = {
906 .attr_global = {
907 .attr = mt7530_global,
908 .n_attr = ARRAY_SIZE(mt7530_global),
909 },
910 .attr_port = {
911 .attr = mt7530_port,
912 .n_attr = ARRAY_SIZE(mt7530_port),
913 },
914 .attr_vlan = {
915 .attr = mt7530_vlan,
916 .n_attr = ARRAY_SIZE(mt7530_vlan),
917 },
918 .get_vlan_ports = mt7530_get_vlan_ports,
919 .set_vlan_ports = mt7530_set_vlan_ports,
920 .get_port_pvid = mt7530_get_port_pvid,
921 .set_port_pvid = mt7530_set_port_pvid,
922 .get_port_link = mt7530_get_port_link,
923 .get_port_stats = mt7530_get_port_stats,
924 .apply_config = mt7530_apply_config,
925 .reset_switch = mt7530_reset_switch,
926 };
927
928 int
929 mt7530_probe(struct device *dev, void __iomem *base, struct mii_bus *bus, int vlan)
930 {
931 struct switch_dev *swdev;
932 struct mt7530_priv *mt7530;
933 struct mt7530_mapping *map;
934 int ret;
935
936 mt7530 = devm_kzalloc(dev, sizeof(struct mt7530_priv), GFP_KERNEL);
937 if (!mt7530)
938 return -ENOMEM;
939
940 mt7530->base = base;
941 mt7530->bus = bus;
942 mt7530->global_vlan_enable = vlan;
943
944 swdev = &mt7530->swdev;
945 if (bus) {
946 swdev->alias = "mt7530";
947 swdev->name = "mt7530";
948 } else if (IS_ENABLED(CONFIG_SOC_MT7621)) {
949 swdev->alias = "mt7621";
950 swdev->name = "mt7621";
951 } else {
952 swdev->alias = "mt7620";
953 swdev->name = "mt7620";
954 }
955 swdev->cpu_port = MT7530_CPU_PORT;
956 swdev->ports = MT7530_NUM_PORTS;
957 swdev->vlans = MT7530_NUM_VLANS;
958 if (IS_ENABLED(CONFIG_SOC_MT7621))
959 swdev->ops = &mt7621_ops;
960 else
961 swdev->ops = &mt7530_ops;
962
963 ret = register_switch(swdev, NULL);
964 if (ret) {
965 dev_err(dev, "failed to register mt7530\n");
966 return ret;
967 }
968
969
970 map = mt7530_find_mapping(dev->of_node);
971 if (map)
972 mt7530_apply_mapping(mt7530, map);
973 mt7530_apply_config(swdev);
974
975 /* magic vodoo */
976 if (!IS_ENABLED(CONFIG_SOC_MT7621) && bus && mt7530_r32(mt7530, REG_HWTRAP) != 0x1117edf) {
977 dev_info(dev, "fixing up MHWTRAP register - bootloader probably played with it\n");
978 mt7530_w32(mt7530, REG_HWTRAP, 0x1117edf);
979 }
980 dev_info(dev, "loaded %s driver\n", swdev->name);
981
982 return 0;
983 }