ramips: move mtk-mmc driver code out of patches-*/ and into files-*/
[openwrt/openwrt.git] / target / linux / ramips / files-4.9 / drivers / mmc / host / mtk-mmc / board.h
1 /* Copyright Statement:
2 *
3 * This software/firmware and related documentation ("MediaTek Software") are
4 * protected under relevant copyright laws. The information contained herein
5 * is confidential and proprietary to MediaTek Inc. and/or its licensors.
6 * Without the prior written permission of MediaTek inc. and/or its licensors,
7 * any reproduction, modification, use or disclosure of MediaTek Software,
8 * and information contained herein, in whole or in part, shall be strictly prohibited.
9 */
10 /* MediaTek Inc. (C) 2010. All rights reserved.
11 *
12 * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
13 * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
14 * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
15 * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
18 * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
19 * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
20 * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
21 * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
22 * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
23 * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
24 * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
25 * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
26 * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
27 * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
28 * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
29 * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
30 *
31 * The following software/firmware and/or related documentation ("MediaTek Software")
32 * have been modified by MediaTek Inc. All revisions are subject to any receiver's
33 * applicable license agreements with MediaTek Inc.
34 */
35
36 #ifndef __ARCH_ARM_MACH_BOARD_H
37 #define __ARCH_ARM_MACH_BOARD_H
38
39 #include <generated/autoconf.h>
40 #include <linux/pm.h>
41 /* --- chhung */
42 // #include <mach/mt6575.h>
43 // #include <board-custom.h>
44 /* end of chhung */
45
46 typedef void (*sdio_irq_handler_t)(void*); /* external irq handler */
47 typedef void (*pm_callback_t)(pm_message_t state, void *data);
48
49 #define MSDC_CD_PIN_EN (1 << 0) /* card detection pin is wired */
50 #define MSDC_WP_PIN_EN (1 << 1) /* write protection pin is wired */
51 #define MSDC_RST_PIN_EN (1 << 2) /* emmc reset pin is wired */
52 #define MSDC_SDIO_IRQ (1 << 3) /* use internal sdio irq (bus) */
53 #define MSDC_EXT_SDIO_IRQ (1 << 4) /* use external sdio irq */
54 #define MSDC_REMOVABLE (1 << 5) /* removable slot */
55 #define MSDC_SYS_SUSPEND (1 << 6) /* suspended by system */
56 #define MSDC_HIGHSPEED (1 << 7) /* high-speed mode support */
57 #define MSDC_UHS1 (1 << 8) /* uhs-1 mode support */
58 #define MSDC_DDR (1 << 9) /* ddr mode support */
59
60
61 #define MSDC_SMPL_RISING (0)
62 #define MSDC_SMPL_FALLING (1)
63
64 #define MSDC_CMD_PIN (0)
65 #define MSDC_DAT_PIN (1)
66 #define MSDC_CD_PIN (2)
67 #define MSDC_WP_PIN (3)
68 #define MSDC_RST_PIN (4)
69
70 enum {
71 MSDC_CLKSRC_48MHZ = 0,
72 // MSDC_CLKSRC_26MHZ = 0,
73 // MSDC_CLKSRC_197MHZ = 1,
74 // MSDC_CLKSRC_208MHZ = 2
75 };
76
77 struct msdc_hw {
78 unsigned char clk_src; /* host clock source */
79 unsigned char cmd_edge; /* command latch edge */
80 unsigned char data_edge; /* data latch edge */
81 unsigned char clk_drv; /* clock pad driving */
82 unsigned char cmd_drv; /* command pad driving */
83 unsigned char dat_drv; /* data pad driving */
84 unsigned long flags; /* hardware capability flags */
85 unsigned long data_pins; /* data pins */
86 unsigned long data_offset; /* data address offset */
87
88 /* config gpio pull mode */
89 void (*config_gpio_pin)(int type, int pull);
90
91 /* external power control for card */
92 void (*ext_power_on)(void);
93 void (*ext_power_off)(void);
94
95 /* external sdio irq operations */
96 void (*request_sdio_eirq)(sdio_irq_handler_t sdio_irq_handler, void *data);
97 void (*enable_sdio_eirq)(void);
98 void (*disable_sdio_eirq)(void);
99
100 /* external cd irq operations */
101 void (*request_cd_eirq)(sdio_irq_handler_t cd_irq_handler, void *data);
102 void (*enable_cd_eirq)(void);
103 void (*disable_cd_eirq)(void);
104 int (*get_cd_status)(void);
105
106 /* power management callback for external module */
107 void (*register_pm)(pm_callback_t pm_cb, void *data);
108 };
109
110 extern struct msdc_hw msdc0_hw;
111 extern struct msdc_hw msdc1_hw;
112 extern struct msdc_hw msdc2_hw;
113 extern struct msdc_hw msdc3_hw;
114
115 /*GPS driver*/
116 #define GPS_FLAG_FORCE_OFF 0x0001
117 struct mt3326_gps_hardware {
118 int (*ext_power_on)(int);
119 int (*ext_power_off)(int);
120 };
121 extern struct mt3326_gps_hardware mt3326_gps_hw;
122
123 /* NAND driver */
124 struct mt6575_nand_host_hw {
125 unsigned int nfi_bus_width; /* NFI_BUS_WIDTH */
126 unsigned int nfi_access_timing; /* NFI_ACCESS_TIMING */
127 unsigned int nfi_cs_num; /* NFI_CS_NUM */
128 unsigned int nand_sec_size; /* NAND_SECTOR_SIZE */
129 unsigned int nand_sec_shift; /* NAND_SECTOR_SHIFT */
130 unsigned int nand_ecc_size;
131 unsigned int nand_ecc_bytes;
132 unsigned int nand_ecc_mode;
133 };
134 extern struct mt6575_nand_host_hw mt6575_nand_hw;
135
136 #endif /* __ARCH_ARM_MACH_BOARD_H */
137