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[openwrt/openwrt.git] / target / linux / ramips / files-4.9 / drivers / net / ethernet / mtk / mt7530.c
1 /*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version 2
5 * of the License, or (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
13 * Copyright (C) 2016 Vitaly Chekryzhev <13hakta@gmail.com>
14 */
15
16 #include <linux/if.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/list.h>
20 #include <linux/if_ether.h>
21 #include <linux/skbuff.h>
22 #include <linux/netdevice.h>
23 #include <linux/netlink.h>
24 #include <linux/bitops.h>
25 #include <net/genetlink.h>
26 #include <linux/switch.h>
27 #include <linux/delay.h>
28 #include <linux/phy.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/lockdep.h>
32 #include <linux/workqueue.h>
33 #include <linux/of_device.h>
34
35 #include "mt7530.h"
36
37 #define MT7530_CPU_PORT 6
38 #define MT7530_NUM_PORTS 8
39 #ifdef CONFIG_SOC_MT7621
40 #define MT7530_NUM_VLANS 4095
41 #else
42 #define MT7530_NUM_VLANS 16
43 #endif
44 #define MT7530_MAX_VID 4095
45 #define MT7530_MIN_VID 0
46
47 /* registers */
48 #define REG_ESW_VLAN_VTCR 0x90
49 #define REG_ESW_VLAN_VAWD1 0x94
50 #define REG_ESW_VLAN_VAWD2 0x98
51 #define REG_ESW_VLAN_VTIM(x) (0x100 + 4 * ((x) / 2))
52
53 #define REG_ESW_VLAN_VAWD1_IVL_MAC BIT(30)
54 #define REG_ESW_VLAN_VAWD1_VTAG_EN BIT(28)
55 #define REG_ESW_VLAN_VAWD1_VALID BIT(0)
56
57 /* vlan egress mode */
58 enum {
59 ETAG_CTRL_UNTAG = 0,
60 ETAG_CTRL_TAG = 2,
61 ETAG_CTRL_SWAP = 1,
62 ETAG_CTRL_STACK = 3,
63 };
64
65 #define REG_ESW_PORT_PCR(x) (0x2004 | ((x) << 8))
66 #define REG_ESW_PORT_PVC(x) (0x2010 | ((x) << 8))
67 #define REG_ESW_PORT_PPBV1(x) (0x2014 | ((x) << 8))
68
69 #define REG_HWTRAP 0x7804
70
71 #define MIB_DESC(_s , _o, _n) \
72 { \
73 .size = (_s), \
74 .offset = (_o), \
75 .name = (_n), \
76 }
77
78 struct mt7xxx_mib_desc {
79 unsigned int size;
80 unsigned int offset;
81 const char *name;
82 };
83
84 static const struct mt7xxx_mib_desc mt7620_mibs[] = {
85 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT0, "PPE_AC_BCNT0"),
86 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT0, "PPE_AC_PCNT0"),
87 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT63, "PPE_AC_BCNT63"),
88 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT63, "PPE_AC_PCNT63"),
89 MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT0, "PPE_MTR_CNT0"),
90 MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT63, "PPE_MTR_CNT63"),
91 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GBCNT, "GDM1_TX_GBCNT"),
92 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GPCNT, "GDM1_TX_GPCNT"),
93 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_SKIPCNT, "GDM1_TX_SKIPCNT"),
94 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_COLCNT, "GDM1_TX_COLCNT"),
95 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GBCNT1, "GDM1_RX_GBCNT1"),
96 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GPCNT1, "GDM1_RX_GPCNT1"),
97 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_OERCNT, "GDM1_RX_OERCNT"),
98 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FERCNT, "GDM1_RX_FERCNT"),
99 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_SERCNT, "GDM1_RX_SERCNT"),
100 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_LERCNT, "GDM1_RX_LERCNT"),
101 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_CERCNT, "GDM1_RX_CERCNT"),
102 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FCCNT, "GDM1_RX_FCCNT"),
103 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GBCNT, "GDM2_TX_GBCNT"),
104 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GPCNT, "GDM2_TX_GPCNT"),
105 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_SKIPCNT, "GDM2_TX_SKIPCNT"),
106 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_COLCNT, "GDM2_TX_COLCNT"),
107 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GBCNT, "GDM2_RX_GBCNT"),
108 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GPCNT, "GDM2_RX_GPCNT"),
109 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_OERCNT, "GDM2_RX_OERCNT"),
110 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FERCNT, "GDM2_RX_FERCNT"),
111 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_SERCNT, "GDM2_RX_SERCNT"),
112 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_LERCNT, "GDM2_RX_LERCNT"),
113 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_CERCNT, "GDM2_RX_CERCNT"),
114 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FCCNT, "GDM2_RX_FCCNT")
115 };
116
117 static const struct mt7xxx_mib_desc mt7620_port_mibs[] = {
118 MIB_DESC(1, MT7620_MIB_STATS_PORT_TGPCN, "TxGPC"),
119 MIB_DESC(1, MT7620_MIB_STATS_PORT_TBOCN, "TxBOC"),
120 MIB_DESC(1, MT7620_MIB_STATS_PORT_TGOCN, "TxGOC"),
121 MIB_DESC(1, MT7620_MIB_STATS_PORT_TEPCN, "TxEPC"),
122 MIB_DESC(1, MT7620_MIB_STATS_PORT_RGPCN, "RxGPC"),
123 MIB_DESC(1, MT7620_MIB_STATS_PORT_RBOCN, "RxBOC"),
124 MIB_DESC(1, MT7620_MIB_STATS_PORT_RGOCN, "RxGOC"),
125 MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC1N, "RxEPC1"),
126 MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC2N, "RxEPC2")
127 };
128
129 static const struct mt7xxx_mib_desc mt7621_mibs[] = {
130 MIB_DESC(1, MT7621_STATS_TDPC, "TxDrop"),
131 MIB_DESC(1, MT7621_STATS_TCRC, "TxCRC"),
132 MIB_DESC(1, MT7621_STATS_TUPC, "TxUni"),
133 MIB_DESC(1, MT7621_STATS_TMPC, "TxMulti"),
134 MIB_DESC(1, MT7621_STATS_TBPC, "TxBroad"),
135 MIB_DESC(1, MT7621_STATS_TCEC, "TxCollision"),
136 MIB_DESC(1, MT7621_STATS_TSCEC, "TxSingleCol"),
137 MIB_DESC(1, MT7621_STATS_TMCEC, "TxMultiCol"),
138 MIB_DESC(1, MT7621_STATS_TDEC, "TxDefer"),
139 MIB_DESC(1, MT7621_STATS_TLCEC, "TxLateCol"),
140 MIB_DESC(1, MT7621_STATS_TXCEC, "TxExcCol"),
141 MIB_DESC(1, MT7621_STATS_TPPC, "TxPause"),
142 MIB_DESC(1, MT7621_STATS_TL64PC, "Tx64Byte"),
143 MIB_DESC(1, MT7621_STATS_TL65PC, "Tx65Byte"),
144 MIB_DESC(1, MT7621_STATS_TL128PC, "Tx128Byte"),
145 MIB_DESC(1, MT7621_STATS_TL256PC, "Tx256Byte"),
146 MIB_DESC(1, MT7621_STATS_TL512PC, "Tx512Byte"),
147 MIB_DESC(1, MT7621_STATS_TL1024PC, "Tx1024Byte"),
148 MIB_DESC(2, MT7621_STATS_TOC, "TxByte"),
149 MIB_DESC(1, MT7621_STATS_RDPC, "RxDrop"),
150 MIB_DESC(1, MT7621_STATS_RFPC, "RxFiltered"),
151 MIB_DESC(1, MT7621_STATS_RUPC, "RxUni"),
152 MIB_DESC(1, MT7621_STATS_RMPC, "RxMulti"),
153 MIB_DESC(1, MT7621_STATS_RBPC, "RxBroad"),
154 MIB_DESC(1, MT7621_STATS_RAEPC, "RxAlignErr"),
155 MIB_DESC(1, MT7621_STATS_RCEPC, "RxCRC"),
156 MIB_DESC(1, MT7621_STATS_RUSPC, "RxUnderSize"),
157 MIB_DESC(1, MT7621_STATS_RFEPC, "RxFragment"),
158 MIB_DESC(1, MT7621_STATS_ROSPC, "RxOverSize"),
159 MIB_DESC(1, MT7621_STATS_RJEPC, "RxJabber"),
160 MIB_DESC(1, MT7621_STATS_RPPC, "RxPause"),
161 MIB_DESC(1, MT7621_STATS_RL64PC, "Rx64Byte"),
162 MIB_DESC(1, MT7621_STATS_RL65PC, "Rx65Byte"),
163 MIB_DESC(1, MT7621_STATS_RL128PC, "Rx128Byte"),
164 MIB_DESC(1, MT7621_STATS_RL256PC, "Rx256Byte"),
165 MIB_DESC(1, MT7621_STATS_RL512PC, "Rx512Byte"),
166 MIB_DESC(1, MT7621_STATS_RL1024PC, "Rx1024Byte"),
167 MIB_DESC(2, MT7621_STATS_ROC, "RxByte"),
168 MIB_DESC(1, MT7621_STATS_RDPC_CTRL, "RxCtrlDrop"),
169 MIB_DESC(1, MT7621_STATS_RDPC_ING, "RxIngDrop"),
170 MIB_DESC(1, MT7621_STATS_RDPC_ARL, "RxARLDrop")
171 };
172
173 enum {
174 /* Global attributes. */
175 MT7530_ATTR_ENABLE_VLAN,
176 };
177
178 struct mt7530_port_entry {
179 u16 pvid;
180 };
181
182 struct mt7530_vlan_entry {
183 u16 vid;
184 u8 member;
185 u8 etags;
186 };
187
188 struct mt7530_priv {
189 void __iomem *base;
190 struct mii_bus *bus;
191 struct switch_dev swdev;
192
193 bool global_vlan_enable;
194 struct mt7530_vlan_entry vlan_entries[MT7530_NUM_VLANS];
195 struct mt7530_port_entry port_entries[MT7530_NUM_PORTS];
196 };
197
198 struct mt7530_mapping {
199 char *name;
200 u16 pvids[MT7530_NUM_PORTS];
201 u8 members[MT7530_NUM_VLANS];
202 u8 etags[MT7530_NUM_VLANS];
203 u16 vids[MT7530_NUM_VLANS];
204 } mt7530_defaults[] = {
205 {
206 .name = "llllw",
207 .pvids = { 1, 1, 1, 1, 2, 1, 1 },
208 .members = { 0, 0x6f, 0x50 },
209 .etags = { 0, 0x40, 0x40 },
210 .vids = { 0, 1, 2 },
211 }, {
212 .name = "wllll",
213 .pvids = { 2, 1, 1, 1, 1, 1, 1 },
214 .members = { 0, 0x7e, 0x41 },
215 .etags = { 0, 0x40, 0x40 },
216 .vids = { 0, 1, 2 },
217 },
218 };
219
220 struct mt7530_mapping*
221 mt7530_find_mapping(struct device_node *np)
222 {
223 const char *map;
224 int i;
225
226 if (of_property_read_string(np, "mediatek,portmap", &map))
227 return NULL;
228
229 for (i = 0; i < ARRAY_SIZE(mt7530_defaults); i++)
230 if (!strcmp(map, mt7530_defaults[i].name))
231 return &mt7530_defaults[i];
232
233 return NULL;
234 }
235
236 static void
237 mt7530_apply_mapping(struct mt7530_priv *mt7530, struct mt7530_mapping *map)
238 {
239 int i = 0;
240
241 for (i = 0; i < MT7530_NUM_PORTS; i++)
242 mt7530->port_entries[i].pvid = map->pvids[i];
243
244 for (i = 0; i < MT7530_NUM_VLANS; i++) {
245 mt7530->vlan_entries[i].member = map->members[i];
246 mt7530->vlan_entries[i].etags = map->etags[i];
247 mt7530->vlan_entries[i].vid = map->vids[i];
248 }
249 }
250
251 static int
252 mt7530_reset_switch(struct switch_dev *dev)
253 {
254 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
255 int i;
256
257 memset(priv->port_entries, 0, sizeof(priv->port_entries));
258 memset(priv->vlan_entries, 0, sizeof(priv->vlan_entries));
259
260 /* set default vid of each vlan to the same number of vlan, so the vid
261 * won't need be set explicitly.
262 */
263 for (i = 0; i < MT7530_NUM_VLANS; i++) {
264 priv->vlan_entries[i].vid = i;
265 }
266
267 return 0;
268 }
269
270 static int
271 mt7530_get_vlan_enable(struct switch_dev *dev,
272 const struct switch_attr *attr,
273 struct switch_val *val)
274 {
275 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
276
277 val->value.i = priv->global_vlan_enable;
278
279 return 0;
280 }
281
282 static int
283 mt7530_set_vlan_enable(struct switch_dev *dev,
284 const struct switch_attr *attr,
285 struct switch_val *val)
286 {
287 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
288
289 priv->global_vlan_enable = val->value.i != 0;
290
291 return 0;
292 }
293
294 static u32
295 mt7530_r32(struct mt7530_priv *priv, u32 reg)
296 {
297 u32 val;
298 if (priv->bus) {
299 u16 high, low;
300
301 mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
302 low = mdiobus_read(priv->bus, 0x1f, (reg >> 2) & 0xf);
303 high = mdiobus_read(priv->bus, 0x1f, 0x10);
304
305 return (high << 16) | (low & 0xffff);
306 }
307
308 val = ioread32(priv->base + reg);
309 pr_debug("MT7530 MDIO Read [%04x]=%08x\n", reg, val);
310
311 return val;
312 }
313
314 static void
315 mt7530_w32(struct mt7530_priv *priv, u32 reg, u32 val)
316 {
317 if (priv->bus) {
318 mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
319 mdiobus_write(priv->bus, 0x1f, (reg >> 2) & 0xf, val & 0xffff);
320 mdiobus_write(priv->bus, 0x1f, 0x10, val >> 16);
321 return;
322 }
323
324 pr_debug("MT7530 MDIO Write[%04x]=%08x\n", reg, val);
325 iowrite32(val, priv->base + reg);
326 }
327
328 static void
329 mt7530_vtcr(struct mt7530_priv *priv, u32 cmd, u32 val)
330 {
331 int i;
332
333 mt7530_w32(priv, REG_ESW_VLAN_VTCR, BIT(31) | (cmd << 12) | val);
334
335 for (i = 0; i < 20; i++) {
336 u32 val = mt7530_r32(priv, REG_ESW_VLAN_VTCR);
337
338 if ((val & BIT(31)) == 0)
339 break;
340
341 udelay(1000);
342 }
343 if (i == 20)
344 printk("mt7530: vtcr timeout\n");
345 }
346
347 static int
348 mt7530_get_port_pvid(struct switch_dev *dev, int port, int *val)
349 {
350 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
351
352 if (port >= MT7530_NUM_PORTS)
353 return -EINVAL;
354
355 *val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(port));
356 *val &= 0xfff;
357
358 return 0;
359 }
360
361 static int
362 mt7530_set_port_pvid(struct switch_dev *dev, int port, int pvid)
363 {
364 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
365
366 if (port >= MT7530_NUM_PORTS)
367 return -EINVAL;
368
369 if (pvid < MT7530_MIN_VID || pvid > MT7530_MAX_VID)
370 return -EINVAL;
371
372 priv->port_entries[port].pvid = pvid;
373
374 return 0;
375 }
376
377 static int
378 mt7530_get_vlan_ports(struct switch_dev *dev, struct switch_val *val)
379 {
380 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
381 u32 member;
382 u32 etags;
383 int i;
384
385 val->len = 0;
386
387 if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS)
388 return -EINVAL;
389
390 mt7530_vtcr(priv, 0, val->port_vlan);
391
392 member = mt7530_r32(priv, REG_ESW_VLAN_VAWD1);
393 member >>= 16;
394 member &= 0xff;
395
396 etags = mt7530_r32(priv, REG_ESW_VLAN_VAWD2);
397
398 for (i = 0; i < MT7530_NUM_PORTS; i++) {
399 struct switch_port *p;
400 int etag;
401
402 if (!(member & BIT(i)))
403 continue;
404
405 p = &val->value.ports[val->len++];
406 p->id = i;
407
408 etag = (etags >> (i * 2)) & 0x3;
409
410 if (etag == ETAG_CTRL_TAG)
411 p->flags |= BIT(SWITCH_PORT_FLAG_TAGGED);
412 else if (etag != ETAG_CTRL_UNTAG)
413 printk("vlan egress tag control neither untag nor tag.\n");
414 }
415
416 return 0;
417 }
418
419 static int
420 mt7530_set_vlan_ports(struct switch_dev *dev, struct switch_val *val)
421 {
422 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
423 u8 member = 0;
424 u8 etags = 0;
425 int i;
426
427 if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS ||
428 val->len > MT7530_NUM_PORTS)
429 return -EINVAL;
430
431 for (i = 0; i < val->len; i++) {
432 struct switch_port *p = &val->value.ports[i];
433
434 if (p->id >= MT7530_NUM_PORTS)
435 return -EINVAL;
436
437 member |= BIT(p->id);
438
439 if (p->flags & BIT(SWITCH_PORT_FLAG_TAGGED))
440 etags |= BIT(p->id);
441 }
442 priv->vlan_entries[val->port_vlan].member = member;
443 priv->vlan_entries[val->port_vlan].etags = etags;
444
445 return 0;
446 }
447
448 static int
449 mt7530_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
450 struct switch_val *val)
451 {
452 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
453 int vlan;
454 u16 vid;
455
456 vlan = val->port_vlan;
457 vid = (u16)val->value.i;
458
459 if (vlan < 0 || vlan >= MT7530_NUM_VLANS)
460 return -EINVAL;
461
462 if (vid < MT7530_MIN_VID || vid > MT7530_MAX_VID)
463 return -EINVAL;
464
465 priv->vlan_entries[vlan].vid = vid;
466 return 0;
467 }
468
469 static int
470 mt7530_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
471 struct switch_val *val)
472 {
473 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
474 u32 vid;
475 int vlan;
476
477 vlan = val->port_vlan;
478
479 vid = mt7530_r32(priv, REG_ESW_VLAN_VTIM(vlan));
480 if (vlan & 1)
481 vid = vid >> 12;
482 vid &= 0xfff;
483
484 val->value.i = vid;
485 return 0;
486 }
487
488 static int
489 mt7530_apply_config(struct switch_dev *dev)
490 {
491 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
492 int i, j;
493 u8 tag_ports;
494 u8 untag_ports;
495
496 if (!priv->global_vlan_enable) {
497 for (i = 0; i < MT7530_NUM_PORTS; i++)
498 mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00400000);
499
500 mt7530_w32(priv, REG_ESW_PORT_PCR(MT7530_CPU_PORT), 0x00ff0000);
501
502 for (i = 0; i < MT7530_NUM_PORTS; i++)
503 mt7530_w32(priv, REG_ESW_PORT_PVC(i), 0x810000c0);
504
505 return 0;
506 }
507
508 /* set all ports as security mode */
509 for (i = 0; i < MT7530_NUM_PORTS; i++)
510 mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00ff0003);
511
512 /* check if a port is used in tag/untag vlan egress mode */
513 tag_ports = 0;
514 untag_ports = 0;
515
516 for (i = 0; i < MT7530_NUM_VLANS; i++) {
517 u8 member = priv->vlan_entries[i].member;
518 u8 etags = priv->vlan_entries[i].etags;
519
520 if (!member)
521 continue;
522
523 for (j = 0; j < MT7530_NUM_PORTS; j++) {
524 if (!(member & BIT(j)))
525 continue;
526
527 if (etags & BIT(j))
528 tag_ports |= 1u << j;
529 else
530 untag_ports |= 1u << j;
531 }
532 }
533
534 /* set all untag-only ports as transparent and the rest as user port */
535 for (i = 0; i < MT7530_NUM_PORTS; i++) {
536 u32 pvc_mode = 0x81000000;
537
538 if (untag_ports & BIT(i) && !(tag_ports & BIT(i)))
539 pvc_mode = 0x810000c0;
540
541 mt7530_w32(priv, REG_ESW_PORT_PVC(i), pvc_mode);
542 }
543
544 for (i = 0; i < MT7530_NUM_VLANS; i++) {
545 u16 vid = priv->vlan_entries[i].vid;
546 u8 member = priv->vlan_entries[i].member;
547 u8 etags = priv->vlan_entries[i].etags;
548 u32 val;
549
550 #ifndef CONFIG_SOC_MT7621
551 /* vid of vlan */
552 val = mt7530_r32(priv, REG_ESW_VLAN_VTIM(i));
553 if (i % 2 == 0) {
554 val &= 0xfff000;
555 val |= vid;
556 } else {
557 val &= 0xfff;
558 val |= (vid << 12);
559 }
560 mt7530_w32(priv, REG_ESW_VLAN_VTIM(i), val);
561 #endif
562 /* vlan port membership */
563 if (member)
564 mt7530_w32(priv, REG_ESW_VLAN_VAWD1, REG_ESW_VLAN_VAWD1_IVL_MAC |
565 REG_ESW_VLAN_VAWD1_VTAG_EN | (member << 16) |
566 REG_ESW_VLAN_VAWD1_VALID);
567 else
568 mt7530_w32(priv, REG_ESW_VLAN_VAWD1, 0);
569
570 /* egress mode */
571 val = 0;
572 for (j = 0; j < MT7530_NUM_PORTS; j++) {
573 if (etags & BIT(j))
574 val |= ETAG_CTRL_TAG << (j * 2);
575 else
576 val |= ETAG_CTRL_UNTAG << (j * 2);
577 }
578 mt7530_w32(priv, REG_ESW_VLAN_VAWD2, val);
579
580 /* write to vlan table */
581 #ifdef CONFIG_SOC_MT7621
582 mt7530_vtcr(priv, 1, vid);
583 #else
584 mt7530_vtcr(priv, 1, i);
585 #endif
586 }
587
588 /* Port Default PVID */
589 for (i = 0; i < MT7530_NUM_PORTS; i++) {
590 u32 val;
591 val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(i));
592 val &= ~0xfff;
593 val |= priv->port_entries[i].pvid;
594 mt7530_w32(priv, REG_ESW_PORT_PPBV1(i), val);
595 }
596
597 return 0;
598 }
599
600 static int
601 mt7530_get_port_link(struct switch_dev *dev, int port,
602 struct switch_port_link *link)
603 {
604 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
605 u32 speed, pmsr;
606
607 if (port < 0 || port >= MT7530_NUM_PORTS)
608 return -EINVAL;
609
610 pmsr = mt7530_r32(priv, 0x3008 + (0x100 * port));
611
612 link->link = pmsr & 1;
613 link->duplex = (pmsr >> 1) & 1;
614 speed = (pmsr >> 2) & 3;
615
616 switch (speed) {
617 case 0:
618 link->speed = SWITCH_PORT_SPEED_10;
619 break;
620 case 1:
621 link->speed = SWITCH_PORT_SPEED_100;
622 break;
623 case 2:
624 case 3: /* forced gige speed can be 2 or 3 */
625 link->speed = SWITCH_PORT_SPEED_1000;
626 break;
627 default:
628 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
629 break;
630 }
631
632 return 0;
633 }
634
635 static u64 get_mib_counter(struct mt7530_priv *priv, int i, int port)
636 {
637 unsigned int port_base;
638 u64 lo;
639
640 port_base = MT7621_MIB_COUNTER_BASE +
641 MT7621_MIB_COUNTER_PORT_OFFSET * port;
642
643 lo = mt7530_r32(priv, port_base + mt7621_mibs[i].offset);
644 if (mt7621_mibs[i].size == 2) {
645 u64 hi;
646
647 hi = mt7530_r32(priv, port_base + mt7621_mibs[i].offset + 4);
648 lo |= hi << 32;
649 }
650
651 return lo;
652 }
653
654 static int mt7621_sw_get_port_mib(struct switch_dev *dev,
655 const struct switch_attr *attr,
656 struct switch_val *val)
657 {
658 static char buf[4096];
659 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
660 int i, len = 0;
661
662 if (val->port_vlan >= MT7530_NUM_PORTS)
663 return -EINVAL;
664
665 len += snprintf(buf + len, sizeof(buf) - len,
666 "Port %d MIB counters\n", val->port_vlan);
667
668 for (i = 0; i < ARRAY_SIZE(mt7621_mibs); ++i) {
669 u64 counter;
670 len += snprintf(buf + len, sizeof(buf) - len,
671 "%-11s: ", mt7621_mibs[i].name);
672 counter = get_mib_counter(priv, i, val->port_vlan);
673 len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
674 counter);
675 }
676
677 val->value.s = buf;
678 val->len = len;
679 return 0;
680 }
681
682 static u64 get_mib_counter_7620(struct mt7530_priv *priv, int i)
683 {
684 return mt7530_r32(priv, MT7620_MIB_COUNTER_BASE + mt7620_mibs[i].offset);
685 }
686
687 static u64 get_mib_counter_port_7620(struct mt7530_priv *priv, int i, int port)
688 {
689 return mt7530_r32(priv,
690 MT7620_MIB_COUNTER_BASE_PORT +
691 (MT7620_MIB_COUNTER_PORT_OFFSET * port) +
692 mt7620_port_mibs[i].offset);
693 }
694
695 static int mt7530_sw_get_mib(struct switch_dev *dev,
696 const struct switch_attr *attr,
697 struct switch_val *val)
698 {
699 static char buf[4096];
700 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
701 int i, len = 0;
702
703 len += snprintf(buf + len, sizeof(buf) - len, "Switch MIB counters\n");
704
705 for (i = 0; i < ARRAY_SIZE(mt7620_mibs); ++i) {
706 u64 counter;
707 len += snprintf(buf + len, sizeof(buf) - len,
708 "%-11s: ", mt7620_mibs[i].name);
709 counter = get_mib_counter_7620(priv, i);
710 len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
711 counter);
712 }
713
714 val->value.s = buf;
715 val->len = len;
716 return 0;
717 }
718
719 static int mt7530_sw_get_port_mib(struct switch_dev *dev,
720 const struct switch_attr *attr,
721 struct switch_val *val)
722 {
723 static char buf[4096];
724 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
725 int i, len = 0;
726
727 if (val->port_vlan >= MT7530_NUM_PORTS)
728 return -EINVAL;
729
730 len += snprintf(buf + len, sizeof(buf) - len,
731 "Port %d MIB counters\n", val->port_vlan);
732
733 for (i = 0; i < ARRAY_SIZE(mt7620_port_mibs); ++i) {
734 u64 counter;
735 len += snprintf(buf + len, sizeof(buf) - len,
736 "%-11s: ", mt7620_port_mibs[i].name);
737 counter = get_mib_counter_port_7620(priv, i, val->port_vlan);
738 len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
739 counter);
740 }
741
742 val->value.s = buf;
743 val->len = len;
744 return 0;
745 }
746
747 static const struct switch_attr mt7530_global[] = {
748 {
749 .type = SWITCH_TYPE_INT,
750 .name = "enable_vlan",
751 .description = "VLAN mode (1:enabled)",
752 .max = 1,
753 .id = MT7530_ATTR_ENABLE_VLAN,
754 .get = mt7530_get_vlan_enable,
755 .set = mt7530_set_vlan_enable,
756 }, {
757 .type = SWITCH_TYPE_STRING,
758 .name = "mib",
759 .description = "Get MIB counters for switch",
760 .get = mt7530_sw_get_mib,
761 .set = NULL,
762 },
763 };
764
765 static const struct switch_attr mt7621_port[] = {
766 {
767 .type = SWITCH_TYPE_STRING,
768 .name = "mib",
769 .description = "Get MIB counters for port",
770 .get = mt7621_sw_get_port_mib,
771 .set = NULL,
772 },
773 };
774
775 static const struct switch_attr mt7530_port[] = {
776 {
777 .type = SWITCH_TYPE_STRING,
778 .name = "mib",
779 .description = "Get MIB counters for port",
780 .get = mt7530_sw_get_port_mib,
781 .set = NULL,
782 },
783 };
784
785 static const struct switch_attr mt7530_vlan[] = {
786 {
787 .type = SWITCH_TYPE_INT,
788 .name = "vid",
789 .description = "VLAN ID (0-4094)",
790 .set = mt7530_set_vid,
791 .get = mt7530_get_vid,
792 .max = 4094,
793 },
794 };
795
796 static const struct switch_dev_ops mt7621_ops = {
797 .attr_global = {
798 .attr = mt7530_global,
799 .n_attr = ARRAY_SIZE(mt7530_global),
800 },
801 .attr_port = {
802 .attr = mt7621_port,
803 .n_attr = ARRAY_SIZE(mt7621_port),
804 },
805 .attr_vlan = {
806 .attr = mt7530_vlan,
807 .n_attr = ARRAY_SIZE(mt7530_vlan),
808 },
809 .get_vlan_ports = mt7530_get_vlan_ports,
810 .set_vlan_ports = mt7530_set_vlan_ports,
811 .get_port_pvid = mt7530_get_port_pvid,
812 .set_port_pvid = mt7530_set_port_pvid,
813 .get_port_link = mt7530_get_port_link,
814 .apply_config = mt7530_apply_config,
815 .reset_switch = mt7530_reset_switch,
816 };
817
818 static const struct switch_dev_ops mt7530_ops = {
819 .attr_global = {
820 .attr = mt7530_global,
821 .n_attr = ARRAY_SIZE(mt7530_global),
822 },
823 .attr_port = {
824 .attr = mt7530_port,
825 .n_attr = ARRAY_SIZE(mt7530_port),
826 },
827 .attr_vlan = {
828 .attr = mt7530_vlan,
829 .n_attr = ARRAY_SIZE(mt7530_vlan),
830 },
831 .get_vlan_ports = mt7530_get_vlan_ports,
832 .set_vlan_ports = mt7530_set_vlan_ports,
833 .get_port_pvid = mt7530_get_port_pvid,
834 .set_port_pvid = mt7530_set_port_pvid,
835 .get_port_link = mt7530_get_port_link,
836 .apply_config = mt7530_apply_config,
837 .reset_switch = mt7530_reset_switch,
838 };
839
840 int
841 mt7530_probe(struct device *dev, void __iomem *base, struct mii_bus *bus, int vlan)
842 {
843 struct switch_dev *swdev;
844 struct mt7530_priv *mt7530;
845 struct mt7530_mapping *map;
846 int ret;
847
848 mt7530 = devm_kzalloc(dev, sizeof(struct mt7530_priv), GFP_KERNEL);
849 if (!mt7530)
850 return -ENOMEM;
851
852 mt7530->base = base;
853 mt7530->bus = bus;
854 mt7530->global_vlan_enable = vlan;
855
856 swdev = &mt7530->swdev;
857 if (bus) {
858 swdev->alias = "mt7530";
859 swdev->name = "mt7530";
860 } else if (IS_ENABLED(CONFIG_SOC_MT7621)) {
861 swdev->alias = "mt7621";
862 swdev->name = "mt7621";
863 } else {
864 swdev->alias = "mt7620";
865 swdev->name = "mt7620";
866 }
867 swdev->cpu_port = MT7530_CPU_PORT;
868 swdev->ports = MT7530_NUM_PORTS;
869 swdev->vlans = MT7530_NUM_VLANS;
870 if (IS_ENABLED(CONFIG_SOC_MT7621))
871 swdev->ops = &mt7621_ops;
872 else
873 swdev->ops = &mt7530_ops;
874
875 ret = register_switch(swdev, NULL);
876 if (ret) {
877 dev_err(dev, "failed to register mt7530\n");
878 return ret;
879 }
880
881
882 map = mt7530_find_mapping(dev->of_node);
883 if (map)
884 mt7530_apply_mapping(mt7530, map);
885 mt7530_apply_config(swdev);
886
887 /* magic vodoo */
888 if (!IS_ENABLED(CONFIG_SOC_MT7621) && bus && mt7530_r32(mt7530, REG_HWTRAP) != 0x1117edf) {
889 dev_info(dev, "fixing up MHWTRAP register - bootloader probably played with it\n");
890 mt7530_w32(mt7530, REG_HWTRAP, 0x1117edf);
891 }
892 dev_info(dev, "loaded %s driver\n", swdev->name);
893
894 return 0;
895 }
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