ramips: provide get_port_stats() on mt7530/762x switches
[openwrt/openwrt.git] / target / linux / ramips / files-4.9 / drivers / net / ethernet / mtk / mt7530.c
1 /*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version 2
5 * of the License, or (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
13 * Copyright (C) 2016 Vitaly Chekryzhev <13hakta@gmail.com>
14 */
15
16 #include <linux/if.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/list.h>
20 #include <linux/if_ether.h>
21 #include <linux/skbuff.h>
22 #include <linux/netdevice.h>
23 #include <linux/netlink.h>
24 #include <linux/bitops.h>
25 #include <net/genetlink.h>
26 #include <linux/switch.h>
27 #include <linux/delay.h>
28 #include <linux/phy.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/lockdep.h>
32 #include <linux/workqueue.h>
33 #include <linux/of_device.h>
34
35 #include "mt7530.h"
36
37 #define MT7530_CPU_PORT 6
38 #define MT7530_NUM_PORTS 8
39 #ifdef CONFIG_SOC_MT7621
40 #define MT7530_NUM_VLANS 4095
41 #else
42 #define MT7530_NUM_VLANS 16
43 #endif
44 #define MT7530_MAX_VID 4095
45 #define MT7530_MIN_VID 0
46
47 #define MT7530_PORT_MIB_TXB_ID 2 /* TxGOC */
48 #define MT7530_PORT_MIB_RXB_ID 6 /* RxGOC */
49
50 #define MT7621_PORT_MIB_TXB_ID 18 /* TxByte */
51 #define MT7621_PORT_MIB_RXB_ID 37 /* RxByte */
52
53 /* registers */
54 #define REG_ESW_VLAN_VTCR 0x90
55 #define REG_ESW_VLAN_VAWD1 0x94
56 #define REG_ESW_VLAN_VAWD2 0x98
57 #define REG_ESW_VLAN_VTIM(x) (0x100 + 4 * ((x) / 2))
58
59 #define REG_ESW_VLAN_VAWD1_IVL_MAC BIT(30)
60 #define REG_ESW_VLAN_VAWD1_VTAG_EN BIT(28)
61 #define REG_ESW_VLAN_VAWD1_VALID BIT(0)
62
63 /* vlan egress mode */
64 enum {
65 ETAG_CTRL_UNTAG = 0,
66 ETAG_CTRL_TAG = 2,
67 ETAG_CTRL_SWAP = 1,
68 ETAG_CTRL_STACK = 3,
69 };
70
71 #define REG_ESW_PORT_PCR(x) (0x2004 | ((x) << 8))
72 #define REG_ESW_PORT_PVC(x) (0x2010 | ((x) << 8))
73 #define REG_ESW_PORT_PPBV1(x) (0x2014 | ((x) << 8))
74
75 #define REG_HWTRAP 0x7804
76
77 #define MIB_DESC(_s , _o, _n) \
78 { \
79 .size = (_s), \
80 .offset = (_o), \
81 .name = (_n), \
82 }
83
84 struct mt7xxx_mib_desc {
85 unsigned int size;
86 unsigned int offset;
87 const char *name;
88 };
89
90 static const struct mt7xxx_mib_desc mt7620_mibs[] = {
91 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT0, "PPE_AC_BCNT0"),
92 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT0, "PPE_AC_PCNT0"),
93 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT63, "PPE_AC_BCNT63"),
94 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT63, "PPE_AC_PCNT63"),
95 MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT0, "PPE_MTR_CNT0"),
96 MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT63, "PPE_MTR_CNT63"),
97 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GBCNT, "GDM1_TX_GBCNT"),
98 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GPCNT, "GDM1_TX_GPCNT"),
99 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_SKIPCNT, "GDM1_TX_SKIPCNT"),
100 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_COLCNT, "GDM1_TX_COLCNT"),
101 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GBCNT1, "GDM1_RX_GBCNT1"),
102 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GPCNT1, "GDM1_RX_GPCNT1"),
103 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_OERCNT, "GDM1_RX_OERCNT"),
104 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FERCNT, "GDM1_RX_FERCNT"),
105 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_SERCNT, "GDM1_RX_SERCNT"),
106 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_LERCNT, "GDM1_RX_LERCNT"),
107 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_CERCNT, "GDM1_RX_CERCNT"),
108 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FCCNT, "GDM1_RX_FCCNT"),
109 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GBCNT, "GDM2_TX_GBCNT"),
110 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GPCNT, "GDM2_TX_GPCNT"),
111 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_SKIPCNT, "GDM2_TX_SKIPCNT"),
112 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_COLCNT, "GDM2_TX_COLCNT"),
113 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GBCNT, "GDM2_RX_GBCNT"),
114 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GPCNT, "GDM2_RX_GPCNT"),
115 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_OERCNT, "GDM2_RX_OERCNT"),
116 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FERCNT, "GDM2_RX_FERCNT"),
117 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_SERCNT, "GDM2_RX_SERCNT"),
118 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_LERCNT, "GDM2_RX_LERCNT"),
119 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_CERCNT, "GDM2_RX_CERCNT"),
120 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FCCNT, "GDM2_RX_FCCNT")
121 };
122
123 static const struct mt7xxx_mib_desc mt7620_port_mibs[] = {
124 MIB_DESC(1, MT7620_MIB_STATS_PORT_TGPCN, "TxGPC"),
125 MIB_DESC(1, MT7620_MIB_STATS_PORT_TBOCN, "TxBOC"),
126 MIB_DESC(1, MT7620_MIB_STATS_PORT_TGOCN, "TxGOC"),
127 MIB_DESC(1, MT7620_MIB_STATS_PORT_TEPCN, "TxEPC"),
128 MIB_DESC(1, MT7620_MIB_STATS_PORT_RGPCN, "RxGPC"),
129 MIB_DESC(1, MT7620_MIB_STATS_PORT_RBOCN, "RxBOC"),
130 MIB_DESC(1, MT7620_MIB_STATS_PORT_RGOCN, "RxGOC"),
131 MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC1N, "RxEPC1"),
132 MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC2N, "RxEPC2")
133 };
134
135 static const struct mt7xxx_mib_desc mt7621_mibs[] = {
136 MIB_DESC(1, MT7621_STATS_TDPC, "TxDrop"),
137 MIB_DESC(1, MT7621_STATS_TCRC, "TxCRC"),
138 MIB_DESC(1, MT7621_STATS_TUPC, "TxUni"),
139 MIB_DESC(1, MT7621_STATS_TMPC, "TxMulti"),
140 MIB_DESC(1, MT7621_STATS_TBPC, "TxBroad"),
141 MIB_DESC(1, MT7621_STATS_TCEC, "TxCollision"),
142 MIB_DESC(1, MT7621_STATS_TSCEC, "TxSingleCol"),
143 MIB_DESC(1, MT7621_STATS_TMCEC, "TxMultiCol"),
144 MIB_DESC(1, MT7621_STATS_TDEC, "TxDefer"),
145 MIB_DESC(1, MT7621_STATS_TLCEC, "TxLateCol"),
146 MIB_DESC(1, MT7621_STATS_TXCEC, "TxExcCol"),
147 MIB_DESC(1, MT7621_STATS_TPPC, "TxPause"),
148 MIB_DESC(1, MT7621_STATS_TL64PC, "Tx64Byte"),
149 MIB_DESC(1, MT7621_STATS_TL65PC, "Tx65Byte"),
150 MIB_DESC(1, MT7621_STATS_TL128PC, "Tx128Byte"),
151 MIB_DESC(1, MT7621_STATS_TL256PC, "Tx256Byte"),
152 MIB_DESC(1, MT7621_STATS_TL512PC, "Tx512Byte"),
153 MIB_DESC(1, MT7621_STATS_TL1024PC, "Tx1024Byte"),
154 MIB_DESC(2, MT7621_STATS_TOC, "TxByte"),
155 MIB_DESC(1, MT7621_STATS_RDPC, "RxDrop"),
156 MIB_DESC(1, MT7621_STATS_RFPC, "RxFiltered"),
157 MIB_DESC(1, MT7621_STATS_RUPC, "RxUni"),
158 MIB_DESC(1, MT7621_STATS_RMPC, "RxMulti"),
159 MIB_DESC(1, MT7621_STATS_RBPC, "RxBroad"),
160 MIB_DESC(1, MT7621_STATS_RAEPC, "RxAlignErr"),
161 MIB_DESC(1, MT7621_STATS_RCEPC, "RxCRC"),
162 MIB_DESC(1, MT7621_STATS_RUSPC, "RxUnderSize"),
163 MIB_DESC(1, MT7621_STATS_RFEPC, "RxFragment"),
164 MIB_DESC(1, MT7621_STATS_ROSPC, "RxOverSize"),
165 MIB_DESC(1, MT7621_STATS_RJEPC, "RxJabber"),
166 MIB_DESC(1, MT7621_STATS_RPPC, "RxPause"),
167 MIB_DESC(1, MT7621_STATS_RL64PC, "Rx64Byte"),
168 MIB_DESC(1, MT7621_STATS_RL65PC, "Rx65Byte"),
169 MIB_DESC(1, MT7621_STATS_RL128PC, "Rx128Byte"),
170 MIB_DESC(1, MT7621_STATS_RL256PC, "Rx256Byte"),
171 MIB_DESC(1, MT7621_STATS_RL512PC, "Rx512Byte"),
172 MIB_DESC(1, MT7621_STATS_RL1024PC, "Rx1024Byte"),
173 MIB_DESC(2, MT7621_STATS_ROC, "RxByte"),
174 MIB_DESC(1, MT7621_STATS_RDPC_CTRL, "RxCtrlDrop"),
175 MIB_DESC(1, MT7621_STATS_RDPC_ING, "RxIngDrop"),
176 MIB_DESC(1, MT7621_STATS_RDPC_ARL, "RxARLDrop")
177 };
178
179 enum {
180 /* Global attributes. */
181 MT7530_ATTR_ENABLE_VLAN,
182 };
183
184 struct mt7530_port_entry {
185 u16 pvid;
186 };
187
188 struct mt7530_vlan_entry {
189 u16 vid;
190 u8 member;
191 u8 etags;
192 };
193
194 struct mt7530_priv {
195 void __iomem *base;
196 struct mii_bus *bus;
197 struct switch_dev swdev;
198
199 bool global_vlan_enable;
200 struct mt7530_vlan_entry vlan_entries[MT7530_NUM_VLANS];
201 struct mt7530_port_entry port_entries[MT7530_NUM_PORTS];
202 };
203
204 struct mt7530_mapping {
205 char *name;
206 u16 pvids[MT7530_NUM_PORTS];
207 u8 members[MT7530_NUM_VLANS];
208 u8 etags[MT7530_NUM_VLANS];
209 u16 vids[MT7530_NUM_VLANS];
210 } mt7530_defaults[] = {
211 {
212 .name = "llllw",
213 .pvids = { 1, 1, 1, 1, 2, 1, 1 },
214 .members = { 0, 0x6f, 0x50 },
215 .etags = { 0, 0x40, 0x40 },
216 .vids = { 0, 1, 2 },
217 }, {
218 .name = "wllll",
219 .pvids = { 2, 1, 1, 1, 1, 1, 1 },
220 .members = { 0, 0x7e, 0x41 },
221 .etags = { 0, 0x40, 0x40 },
222 .vids = { 0, 1, 2 },
223 },
224 };
225
226 struct mt7530_mapping*
227 mt7530_find_mapping(struct device_node *np)
228 {
229 const char *map;
230 int i;
231
232 if (of_property_read_string(np, "mediatek,portmap", &map))
233 return NULL;
234
235 for (i = 0; i < ARRAY_SIZE(mt7530_defaults); i++)
236 if (!strcmp(map, mt7530_defaults[i].name))
237 return &mt7530_defaults[i];
238
239 return NULL;
240 }
241
242 static void
243 mt7530_apply_mapping(struct mt7530_priv *mt7530, struct mt7530_mapping *map)
244 {
245 int i = 0;
246
247 for (i = 0; i < MT7530_NUM_PORTS; i++)
248 mt7530->port_entries[i].pvid = map->pvids[i];
249
250 for (i = 0; i < MT7530_NUM_VLANS; i++) {
251 mt7530->vlan_entries[i].member = map->members[i];
252 mt7530->vlan_entries[i].etags = map->etags[i];
253 mt7530->vlan_entries[i].vid = map->vids[i];
254 }
255 }
256
257 static int
258 mt7530_reset_switch(struct switch_dev *dev)
259 {
260 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
261 int i;
262
263 memset(priv->port_entries, 0, sizeof(priv->port_entries));
264 memset(priv->vlan_entries, 0, sizeof(priv->vlan_entries));
265
266 /* set default vid of each vlan to the same number of vlan, so the vid
267 * won't need be set explicitly.
268 */
269 for (i = 0; i < MT7530_NUM_VLANS; i++) {
270 priv->vlan_entries[i].vid = i;
271 }
272
273 return 0;
274 }
275
276 static int
277 mt7530_get_vlan_enable(struct switch_dev *dev,
278 const struct switch_attr *attr,
279 struct switch_val *val)
280 {
281 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
282
283 val->value.i = priv->global_vlan_enable;
284
285 return 0;
286 }
287
288 static int
289 mt7530_set_vlan_enable(struct switch_dev *dev,
290 const struct switch_attr *attr,
291 struct switch_val *val)
292 {
293 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
294
295 priv->global_vlan_enable = val->value.i != 0;
296
297 return 0;
298 }
299
300 static u32
301 mt7530_r32(struct mt7530_priv *priv, u32 reg)
302 {
303 u32 val;
304 if (priv->bus) {
305 u16 high, low;
306
307 mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
308 low = mdiobus_read(priv->bus, 0x1f, (reg >> 2) & 0xf);
309 high = mdiobus_read(priv->bus, 0x1f, 0x10);
310
311 return (high << 16) | (low & 0xffff);
312 }
313
314 val = ioread32(priv->base + reg);
315 pr_debug("MT7530 MDIO Read [%04x]=%08x\n", reg, val);
316
317 return val;
318 }
319
320 static void
321 mt7530_w32(struct mt7530_priv *priv, u32 reg, u32 val)
322 {
323 if (priv->bus) {
324 mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
325 mdiobus_write(priv->bus, 0x1f, (reg >> 2) & 0xf, val & 0xffff);
326 mdiobus_write(priv->bus, 0x1f, 0x10, val >> 16);
327 return;
328 }
329
330 pr_debug("MT7530 MDIO Write[%04x]=%08x\n", reg, val);
331 iowrite32(val, priv->base + reg);
332 }
333
334 static void
335 mt7530_vtcr(struct mt7530_priv *priv, u32 cmd, u32 val)
336 {
337 int i;
338
339 mt7530_w32(priv, REG_ESW_VLAN_VTCR, BIT(31) | (cmd << 12) | val);
340
341 for (i = 0; i < 20; i++) {
342 u32 val = mt7530_r32(priv, REG_ESW_VLAN_VTCR);
343
344 if ((val & BIT(31)) == 0)
345 break;
346
347 udelay(1000);
348 }
349 if (i == 20)
350 printk("mt7530: vtcr timeout\n");
351 }
352
353 static int
354 mt7530_get_port_pvid(struct switch_dev *dev, int port, int *val)
355 {
356 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
357
358 if (port >= MT7530_NUM_PORTS)
359 return -EINVAL;
360
361 *val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(port));
362 *val &= 0xfff;
363
364 return 0;
365 }
366
367 static int
368 mt7530_set_port_pvid(struct switch_dev *dev, int port, int pvid)
369 {
370 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
371
372 if (port >= MT7530_NUM_PORTS)
373 return -EINVAL;
374
375 if (pvid < MT7530_MIN_VID || pvid > MT7530_MAX_VID)
376 return -EINVAL;
377
378 priv->port_entries[port].pvid = pvid;
379
380 return 0;
381 }
382
383 static int
384 mt7530_get_vlan_ports(struct switch_dev *dev, struct switch_val *val)
385 {
386 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
387 u32 member;
388 u32 etags;
389 int i;
390
391 val->len = 0;
392
393 if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS)
394 return -EINVAL;
395
396 mt7530_vtcr(priv, 0, val->port_vlan);
397
398 member = mt7530_r32(priv, REG_ESW_VLAN_VAWD1);
399 member >>= 16;
400 member &= 0xff;
401
402 etags = mt7530_r32(priv, REG_ESW_VLAN_VAWD2);
403
404 for (i = 0; i < MT7530_NUM_PORTS; i++) {
405 struct switch_port *p;
406 int etag;
407
408 if (!(member & BIT(i)))
409 continue;
410
411 p = &val->value.ports[val->len++];
412 p->id = i;
413
414 etag = (etags >> (i * 2)) & 0x3;
415
416 if (etag == ETAG_CTRL_TAG)
417 p->flags |= BIT(SWITCH_PORT_FLAG_TAGGED);
418 else if (etag != ETAG_CTRL_UNTAG)
419 printk("vlan egress tag control neither untag nor tag.\n");
420 }
421
422 return 0;
423 }
424
425 static int
426 mt7530_set_vlan_ports(struct switch_dev *dev, struct switch_val *val)
427 {
428 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
429 u8 member = 0;
430 u8 etags = 0;
431 int i;
432
433 if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS ||
434 val->len > MT7530_NUM_PORTS)
435 return -EINVAL;
436
437 for (i = 0; i < val->len; i++) {
438 struct switch_port *p = &val->value.ports[i];
439
440 if (p->id >= MT7530_NUM_PORTS)
441 return -EINVAL;
442
443 member |= BIT(p->id);
444
445 if (p->flags & BIT(SWITCH_PORT_FLAG_TAGGED))
446 etags |= BIT(p->id);
447 }
448 priv->vlan_entries[val->port_vlan].member = member;
449 priv->vlan_entries[val->port_vlan].etags = etags;
450
451 return 0;
452 }
453
454 static int
455 mt7530_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
456 struct switch_val *val)
457 {
458 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
459 int vlan;
460 u16 vid;
461
462 vlan = val->port_vlan;
463 vid = (u16)val->value.i;
464
465 if (vlan < 0 || vlan >= MT7530_NUM_VLANS)
466 return -EINVAL;
467
468 if (vid < MT7530_MIN_VID || vid > MT7530_MAX_VID)
469 return -EINVAL;
470
471 priv->vlan_entries[vlan].vid = vid;
472 return 0;
473 }
474
475 static int
476 mt7530_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
477 struct switch_val *val)
478 {
479 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
480 u32 vid;
481 int vlan;
482
483 vlan = val->port_vlan;
484
485 vid = mt7530_r32(priv, REG_ESW_VLAN_VTIM(vlan));
486 if (vlan & 1)
487 vid = vid >> 12;
488 vid &= 0xfff;
489
490 val->value.i = vid;
491 return 0;
492 }
493
494 static int
495 mt7530_apply_config(struct switch_dev *dev)
496 {
497 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
498 int i, j;
499 u8 tag_ports;
500 u8 untag_ports;
501
502 if (!priv->global_vlan_enable) {
503 for (i = 0; i < MT7530_NUM_PORTS; i++)
504 mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00400000);
505
506 mt7530_w32(priv, REG_ESW_PORT_PCR(MT7530_CPU_PORT), 0x00ff0000);
507
508 for (i = 0; i < MT7530_NUM_PORTS; i++)
509 mt7530_w32(priv, REG_ESW_PORT_PVC(i), 0x810000c0);
510
511 return 0;
512 }
513
514 /* set all ports as security mode */
515 for (i = 0; i < MT7530_NUM_PORTS; i++)
516 mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00ff0003);
517
518 /* check if a port is used in tag/untag vlan egress mode */
519 tag_ports = 0;
520 untag_ports = 0;
521
522 for (i = 0; i < MT7530_NUM_VLANS; i++) {
523 u8 member = priv->vlan_entries[i].member;
524 u8 etags = priv->vlan_entries[i].etags;
525
526 if (!member)
527 continue;
528
529 for (j = 0; j < MT7530_NUM_PORTS; j++) {
530 if (!(member & BIT(j)))
531 continue;
532
533 if (etags & BIT(j))
534 tag_ports |= 1u << j;
535 else
536 untag_ports |= 1u << j;
537 }
538 }
539
540 /* set all untag-only ports as transparent and the rest as user port */
541 for (i = 0; i < MT7530_NUM_PORTS; i++) {
542 u32 pvc_mode = 0x81000000;
543
544 if (untag_ports & BIT(i) && !(tag_ports & BIT(i)))
545 pvc_mode = 0x810000c0;
546
547 mt7530_w32(priv, REG_ESW_PORT_PVC(i), pvc_mode);
548 }
549
550 for (i = 0; i < MT7530_NUM_VLANS; i++) {
551 u16 vid = priv->vlan_entries[i].vid;
552 u8 member = priv->vlan_entries[i].member;
553 u8 etags = priv->vlan_entries[i].etags;
554 u32 val;
555
556 #ifndef CONFIG_SOC_MT7621
557 /* vid of vlan */
558 val = mt7530_r32(priv, REG_ESW_VLAN_VTIM(i));
559 if (i % 2 == 0) {
560 val &= 0xfff000;
561 val |= vid;
562 } else {
563 val &= 0xfff;
564 val |= (vid << 12);
565 }
566 mt7530_w32(priv, REG_ESW_VLAN_VTIM(i), val);
567 #endif
568 /* vlan port membership */
569 if (member)
570 mt7530_w32(priv, REG_ESW_VLAN_VAWD1, REG_ESW_VLAN_VAWD1_IVL_MAC |
571 REG_ESW_VLAN_VAWD1_VTAG_EN | (member << 16) |
572 REG_ESW_VLAN_VAWD1_VALID);
573 else
574 mt7530_w32(priv, REG_ESW_VLAN_VAWD1, 0);
575
576 /* egress mode */
577 val = 0;
578 for (j = 0; j < MT7530_NUM_PORTS; j++) {
579 if (etags & BIT(j))
580 val |= ETAG_CTRL_TAG << (j * 2);
581 else
582 val |= ETAG_CTRL_UNTAG << (j * 2);
583 }
584 mt7530_w32(priv, REG_ESW_VLAN_VAWD2, val);
585
586 /* write to vlan table */
587 #ifdef CONFIG_SOC_MT7621
588 mt7530_vtcr(priv, 1, vid);
589 #else
590 mt7530_vtcr(priv, 1, i);
591 #endif
592 }
593
594 /* Port Default PVID */
595 for (i = 0; i < MT7530_NUM_PORTS; i++) {
596 u32 val;
597 val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(i));
598 val &= ~0xfff;
599 val |= priv->port_entries[i].pvid;
600 mt7530_w32(priv, REG_ESW_PORT_PPBV1(i), val);
601 }
602
603 return 0;
604 }
605
606 static int
607 mt7530_get_port_link(struct switch_dev *dev, int port,
608 struct switch_port_link *link)
609 {
610 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
611 u32 speed, pmsr;
612
613 if (port < 0 || port >= MT7530_NUM_PORTS)
614 return -EINVAL;
615
616 pmsr = mt7530_r32(priv, 0x3008 + (0x100 * port));
617
618 link->link = pmsr & 1;
619 link->duplex = (pmsr >> 1) & 1;
620 speed = (pmsr >> 2) & 3;
621
622 switch (speed) {
623 case 0:
624 link->speed = SWITCH_PORT_SPEED_10;
625 break;
626 case 1:
627 link->speed = SWITCH_PORT_SPEED_100;
628 break;
629 case 2:
630 case 3: /* forced gige speed can be 2 or 3 */
631 link->speed = SWITCH_PORT_SPEED_1000;
632 break;
633 default:
634 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
635 break;
636 }
637
638 return 0;
639 }
640
641 static u64 get_mib_counter(struct mt7530_priv *priv, int i, int port)
642 {
643 unsigned int port_base;
644 u64 lo;
645
646 port_base = MT7621_MIB_COUNTER_BASE +
647 MT7621_MIB_COUNTER_PORT_OFFSET * port;
648
649 lo = mt7530_r32(priv, port_base + mt7621_mibs[i].offset);
650 if (mt7621_mibs[i].size == 2) {
651 u64 hi;
652
653 hi = mt7530_r32(priv, port_base + mt7621_mibs[i].offset + 4);
654 lo |= hi << 32;
655 }
656
657 return lo;
658 }
659
660 static int mt7621_sw_get_port_mib(struct switch_dev *dev,
661 const struct switch_attr *attr,
662 struct switch_val *val)
663 {
664 static char buf[4096];
665 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
666 int i, len = 0;
667
668 if (val->port_vlan >= MT7530_NUM_PORTS)
669 return -EINVAL;
670
671 len += snprintf(buf + len, sizeof(buf) - len,
672 "Port %d MIB counters\n", val->port_vlan);
673
674 for (i = 0; i < ARRAY_SIZE(mt7621_mibs); ++i) {
675 u64 counter;
676 len += snprintf(buf + len, sizeof(buf) - len,
677 "%-11s: ", mt7621_mibs[i].name);
678 counter = get_mib_counter(priv, i, val->port_vlan);
679 len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
680 counter);
681 }
682
683 val->value.s = buf;
684 val->len = len;
685 return 0;
686 }
687
688 static u64 get_mib_counter_7620(struct mt7530_priv *priv, int i)
689 {
690 return mt7530_r32(priv, MT7620_MIB_COUNTER_BASE + mt7620_mibs[i].offset);
691 }
692
693 static u64 get_mib_counter_port_7620(struct mt7530_priv *priv, int i, int port)
694 {
695 return mt7530_r32(priv,
696 MT7620_MIB_COUNTER_BASE_PORT +
697 (MT7620_MIB_COUNTER_PORT_OFFSET * port) +
698 mt7620_port_mibs[i].offset);
699 }
700
701 static int mt7530_sw_get_mib(struct switch_dev *dev,
702 const struct switch_attr *attr,
703 struct switch_val *val)
704 {
705 static char buf[4096];
706 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
707 int i, len = 0;
708
709 len += snprintf(buf + len, sizeof(buf) - len, "Switch MIB counters\n");
710
711 for (i = 0; i < ARRAY_SIZE(mt7620_mibs); ++i) {
712 u64 counter;
713 len += snprintf(buf + len, sizeof(buf) - len,
714 "%-11s: ", mt7620_mibs[i].name);
715 counter = get_mib_counter_7620(priv, i);
716 len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
717 counter);
718 }
719
720 val->value.s = buf;
721 val->len = len;
722 return 0;
723 }
724
725 static int mt7530_sw_get_port_mib(struct switch_dev *dev,
726 const struct switch_attr *attr,
727 struct switch_val *val)
728 {
729 static char buf[4096];
730 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
731 int i, len = 0;
732
733 if (val->port_vlan >= MT7530_NUM_PORTS)
734 return -EINVAL;
735
736 len += snprintf(buf + len, sizeof(buf) - len,
737 "Port %d MIB counters\n", val->port_vlan);
738
739 for (i = 0; i < ARRAY_SIZE(mt7620_port_mibs); ++i) {
740 u64 counter;
741 len += snprintf(buf + len, sizeof(buf) - len,
742 "%-11s: ", mt7620_port_mibs[i].name);
743 counter = get_mib_counter_port_7620(priv, i, val->port_vlan);
744 len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
745 counter);
746 }
747
748 val->value.s = buf;
749 val->len = len;
750 return 0;
751 }
752
753 static int mt7530_get_port_stats(struct switch_dev *dev, int port,
754 struct switch_port_stats *stats)
755 {
756 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
757
758 if (port < 0 || port >= MT7530_NUM_PORTS)
759 return -EINVAL;
760
761 stats->tx_bytes = get_mib_counter_port_7620(priv, MT7530_PORT_MIB_TXB_ID, port);
762 stats->rx_bytes = get_mib_counter_port_7620(priv, MT7530_PORT_MIB_RXB_ID, port);
763
764 return 0;
765 }
766
767 static int mt7621_get_port_stats(struct switch_dev *dev, int port,
768 struct switch_port_stats *stats)
769 {
770 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
771
772 if (port < 0 || port >= MT7530_NUM_PORTS)
773 return -EINVAL;
774
775 stats->tx_bytes = get_mib_counter(priv, MT7621_PORT_MIB_TXB_ID, port);
776 stats->rx_bytes = get_mib_counter(priv, MT7621_PORT_MIB_RXB_ID, port);
777
778 return 0;
779 }
780
781 static const struct switch_attr mt7530_global[] = {
782 {
783 .type = SWITCH_TYPE_INT,
784 .name = "enable_vlan",
785 .description = "VLAN mode (1:enabled)",
786 .max = 1,
787 .id = MT7530_ATTR_ENABLE_VLAN,
788 .get = mt7530_get_vlan_enable,
789 .set = mt7530_set_vlan_enable,
790 }, {
791 .type = SWITCH_TYPE_STRING,
792 .name = "mib",
793 .description = "Get MIB counters for switch",
794 .get = mt7530_sw_get_mib,
795 .set = NULL,
796 },
797 };
798
799 static const struct switch_attr mt7621_port[] = {
800 {
801 .type = SWITCH_TYPE_STRING,
802 .name = "mib",
803 .description = "Get MIB counters for port",
804 .get = mt7621_sw_get_port_mib,
805 .set = NULL,
806 },
807 };
808
809 static const struct switch_attr mt7530_port[] = {
810 {
811 .type = SWITCH_TYPE_STRING,
812 .name = "mib",
813 .description = "Get MIB counters for port",
814 .get = mt7530_sw_get_port_mib,
815 .set = NULL,
816 },
817 };
818
819 static const struct switch_attr mt7530_vlan[] = {
820 {
821 .type = SWITCH_TYPE_INT,
822 .name = "vid",
823 .description = "VLAN ID (0-4094)",
824 .set = mt7530_set_vid,
825 .get = mt7530_get_vid,
826 .max = 4094,
827 },
828 };
829
830 static const struct switch_dev_ops mt7621_ops = {
831 .attr_global = {
832 .attr = mt7530_global,
833 .n_attr = ARRAY_SIZE(mt7530_global),
834 },
835 .attr_port = {
836 .attr = mt7621_port,
837 .n_attr = ARRAY_SIZE(mt7621_port),
838 },
839 .attr_vlan = {
840 .attr = mt7530_vlan,
841 .n_attr = ARRAY_SIZE(mt7530_vlan),
842 },
843 .get_vlan_ports = mt7530_get_vlan_ports,
844 .set_vlan_ports = mt7530_set_vlan_ports,
845 .get_port_pvid = mt7530_get_port_pvid,
846 .set_port_pvid = mt7530_set_port_pvid,
847 .get_port_link = mt7530_get_port_link,
848 .get_port_stats = mt7621_get_port_stats,
849 .apply_config = mt7530_apply_config,
850 .reset_switch = mt7530_reset_switch,
851 };
852
853 static const struct switch_dev_ops mt7530_ops = {
854 .attr_global = {
855 .attr = mt7530_global,
856 .n_attr = ARRAY_SIZE(mt7530_global),
857 },
858 .attr_port = {
859 .attr = mt7530_port,
860 .n_attr = ARRAY_SIZE(mt7530_port),
861 },
862 .attr_vlan = {
863 .attr = mt7530_vlan,
864 .n_attr = ARRAY_SIZE(mt7530_vlan),
865 },
866 .get_vlan_ports = mt7530_get_vlan_ports,
867 .set_vlan_ports = mt7530_set_vlan_ports,
868 .get_port_pvid = mt7530_get_port_pvid,
869 .set_port_pvid = mt7530_set_port_pvid,
870 .get_port_link = mt7530_get_port_link,
871 .get_port_stats = mt7530_get_port_stats,
872 .apply_config = mt7530_apply_config,
873 .reset_switch = mt7530_reset_switch,
874 };
875
876 int
877 mt7530_probe(struct device *dev, void __iomem *base, struct mii_bus *bus, int vlan)
878 {
879 struct switch_dev *swdev;
880 struct mt7530_priv *mt7530;
881 struct mt7530_mapping *map;
882 int ret;
883
884 mt7530 = devm_kzalloc(dev, sizeof(struct mt7530_priv), GFP_KERNEL);
885 if (!mt7530)
886 return -ENOMEM;
887
888 mt7530->base = base;
889 mt7530->bus = bus;
890 mt7530->global_vlan_enable = vlan;
891
892 swdev = &mt7530->swdev;
893 if (bus) {
894 swdev->alias = "mt7530";
895 swdev->name = "mt7530";
896 } else if (IS_ENABLED(CONFIG_SOC_MT7621)) {
897 swdev->alias = "mt7621";
898 swdev->name = "mt7621";
899 } else {
900 swdev->alias = "mt7620";
901 swdev->name = "mt7620";
902 }
903 swdev->cpu_port = MT7530_CPU_PORT;
904 swdev->ports = MT7530_NUM_PORTS;
905 swdev->vlans = MT7530_NUM_VLANS;
906 if (IS_ENABLED(CONFIG_SOC_MT7621))
907 swdev->ops = &mt7621_ops;
908 else
909 swdev->ops = &mt7530_ops;
910
911 ret = register_switch(swdev, NULL);
912 if (ret) {
913 dev_err(dev, "failed to register mt7530\n");
914 return ret;
915 }
916
917
918 map = mt7530_find_mapping(dev->of_node);
919 if (map)
920 mt7530_apply_mapping(mt7530, map);
921 mt7530_apply_config(swdev);
922
923 /* magic vodoo */
924 if (!IS_ENABLED(CONFIG_SOC_MT7621) && bus && mt7530_r32(mt7530, REG_HWTRAP) != 0x1117edf) {
925 dev_info(dev, "fixing up MHWTRAP register - bootloader probably played with it\n");
926 mt7530_w32(mt7530, REG_HWTRAP, 0x1117edf);
927 }
928 dev_info(dev, "loaded %s driver\n", swdev->name);
929
930 return 0;
931 }