target/linux/ramips/files-4.9/drivers/net/ethernet/mtk/mt7530.h

   1 /*
   2  * This program is free software; you can redistribute it and/or
   3  * modify it under the terms of the GNU General Public License
   4  * as published by the Free Software Foundation; either version 2
   5  * of the License, or (at your option) any later version.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  13  * Copyright (C) 2016 Vitaly Chekryzhev <13hakta@gmail.com>
  14  */
  15
  16 #ifndef _MT7530_H__
  17 #define _MT7530_H__
  18
  19 #define MT7620_MIB_COUNTER_BASE_PORT    0x4000
  20 #define MT7620_MIB_COUNTER_PORT_OFFSET  0x100
  21 #define MT7620_MIB_COUNTER_BASE 0x1010
  22
  23 /* PPE Accounting Group #0 Byte Counter */
  24 #define MT7620_MIB_STATS_PPE_AC_BCNT0   0x000
  25
  26 /* PPE Accounting Group #0 Packet Counter */
  27 #define MT7620_MIB_STATS_PPE_AC_PCNT0   0x004
  28
  29 /* PPE Accounting Group #63 Byte Counter */
  30 #define MT7620_MIB_STATS_PPE_AC_BCNT63  0x1F8
  31
  32 /* PPE Accounting Group #63 Packet Counter */
  33 #define MT7620_MIB_STATS_PPE_AC_PCNT63  0x1FC
  34
  35 /* PPE Meter Group #0 */
  36 #define MT7620_MIB_STATS_PPE_MTR_CNT0   0x200
  37
  38 /* PPE Meter Group #63 */
  39 #define MT7620_MIB_STATS_PPE_MTR_CNT63  0x2FC
  40
  41 /* Transmit good byte count for CPU GDM */
  42 #define MT7620_MIB_STATS_GDM1_TX_GBCNT  0x300
  43
  44 /* Transmit good packet count for CPU GDM (exclude flow control frames) */
  45 #define MT7620_MIB_STATS_GDM1_TX_GPCNT  0x304
  46
  47 /* Transmit abort count for CPU GDM */
  48 #define MT7620_MIB_STATS_GDM1_TX_SKIPCNT        0x308
  49
  50 /* Transmit collision count for CPU GDM */
  51 #define MT7620_MIB_STATS_GDM1_TX_COLCNT 0x30C
  52
  53 /* Received good byte count for CPU GDM */
  54 #define MT7620_MIB_STATS_GDM1_RX_GBCNT1 0x320
  55
  56 /* Received good packet count for CPU GDM (exclude flow control frame) */
  57 #define MT7620_MIB_STATS_GDM1_RX_GPCNT1 0x324
  58
  59 /* Received overflow error packet count for CPU GDM */
  60 #define MT7620_MIB_STATS_GDM1_RX_OERCNT 0x328
  61
  62 /* Received FCS error packet count for CPU GDM */
  63 #define MT7620_MIB_STATS_GDM1_RX_FERCNT 0x32C
  64
  65 /* Received too short error packet count for CPU GDM */
  66 #define MT7620_MIB_STATS_GDM1_RX_SERCNT 0x330
  67
  68 /* Received too long error packet count for CPU GDM */
  69 #define MT7620_MIB_STATS_GDM1_RX_LERCNT 0x334
  70
  71 /* Received IP/TCP/UDP checksum error packet count for CPU GDM */
  72 #define MT7620_MIB_STATS_GDM1_RX_CERCNT 0x338
  73
  74 /* Received flow control pkt count for CPU GDM */
  75 #define MT7620_MIB_STATS_GDM1_RX_FCCNT  0x33C
  76
  77 /* Transmit good byte count for PPE GDM */
  78 #define MT7620_MIB_STATS_GDM2_TX_GBCNT  0x340
  79
  80 /* Transmit good packet count for PPE GDM (exclude flow control frames) */
  81 #define MT7620_MIB_STATS_GDM2_TX_GPCNT  0x344
  82
  83 /* Transmit abort count for PPE GDM */
  84 #define MT7620_MIB_STATS_GDM2_TX_SKIPCNT        0x348
  85
  86 /* Transmit collision count for PPE GDM */
  87 #define MT7620_MIB_STATS_GDM2_TX_COLCNT 0x34C
  88
  89 /* Received good byte count for PPE GDM */
  90 #define MT7620_MIB_STATS_GDM2_RX_GBCNT  0x360
  91
  92 /* Received good packet count for PPE GDM (exclude flow control frame) */
  93 #define MT7620_MIB_STATS_GDM2_RX_GPCNT  0x364
  94
  95 /* Received overflow error packet count for PPE GDM */
  96 #define MT7620_MIB_STATS_GDM2_RX_OERCNT 0x368
  97
  98 /* Received FCS error packet count for PPE GDM */
  99 #define MT7620_MIB_STATS_GDM2_RX_FERCNT 0x36C
 100
 101 /* Received too short error packet count for PPE GDM */
 102 #define MT7620_MIB_STATS_GDM2_RX_SERCNT 0x370
 103
 104 /* Received too long error packet count for PPE GDM */
 105 #define MT7620_MIB_STATS_GDM2_RX_LERCNT 0x374
 106
 107 /* Received IP/TCP/UDP checksum error packet count for PPE GDM */
 108 #define MT7620_MIB_STATS_GDM2_RX_CERCNT 0x378
 109
 110 /* Received flow control pkt count for PPE GDM */
 111 #define MT7620_MIB_STATS_GDM2_RX_FCCNT  0x37C
 112
 113 /* Tx Packet Counter of Port n */
 114 #define MT7620_MIB_STATS_PORT_TGPCN     0x10
 115
 116 /* Tx Bad Octet Counter of Port n */
 117 #define MT7620_MIB_STATS_PORT_TBOCN     0x14
 118
 119 /* Tx Good Octet Counter of Port n */
 120 #define MT7620_MIB_STATS_PORT_TGOCN     0x18
 121
 122 /* Tx Event Packet Counter of Port n */
 123 #define MT7620_MIB_STATS_PORT_TEPCN     0x1C
 124
 125 /* Rx Packet Counter of Port n */
 126 #define MT7620_MIB_STATS_PORT_RGPCN     0x20
 127
 128 /* Rx Bad Octet Counter of Port n */
 129 #define MT7620_MIB_STATS_PORT_RBOCN     0x24
 130
 131 /* Rx Good Octet Counter of Port n */
 132 #define MT7620_MIB_STATS_PORT_RGOCN     0x28
 133
 134 /* Rx Event Packet Counter of Port n */
 135 #define MT7620_MIB_STATS_PORT_REPC1N    0x2C
 136
 137 /* Rx Event Packet Counter of Port n */
 138 #define MT7620_MIB_STATS_PORT_REPC2N    0x30
 139
 140 #define MT7621_MIB_COUNTER_BASE 0x4000
 141 #define MT7621_MIB_COUNTER_PORT_OFFSET  0x100
 142 #define MT7621_STATS_TDPC       0x00
 143 #define MT7621_STATS_TCRC       0x04
 144 #define MT7621_STATS_TUPC       0x08
 145 #define MT7621_STATS_TMPC       0x0C
 146 #define MT7621_STATS_TBPC       0x10
 147 #define MT7621_STATS_TCEC       0x14
 148 #define MT7621_STATS_TSCEC      0x18
 149 #define MT7621_STATS_TMCEC      0x1C
 150 #define MT7621_STATS_TDEC       0x20
 151 #define MT7621_STATS_TLCEC      0x24
 152 #define MT7621_STATS_TXCEC      0x28
 153 #define MT7621_STATS_TPPC       0x2C
 154 #define MT7621_STATS_TL64PC     0x30
 155 #define MT7621_STATS_TL65PC     0x34
 156 #define MT7621_STATS_TL128PC    0x38
 157 #define MT7621_STATS_TL256PC    0x3C
 158 #define MT7621_STATS_TL512PC    0x40
 159 #define MT7621_STATS_TL1024PC   0x44
 160 #define MT7621_STATS_TOC        0x48
 161 #define MT7621_STATS_RDPC       0x60
 162 #define MT7621_STATS_RFPC       0x64
 163 #define MT7621_STATS_RUPC       0x68
 164 #define MT7621_STATS_RMPC       0x6C
 165 #define MT7621_STATS_RBPC       0x70
 166 #define MT7621_STATS_RAEPC      0x74
 167 #define MT7621_STATS_RCEPC      0x78
 168 #define MT7621_STATS_RUSPC      0x7C
 169 #define MT7621_STATS_RFEPC      0x80
 170 #define MT7621_STATS_ROSPC      0x84
 171 #define MT7621_STATS_RJEPC      0x88
 172 #define MT7621_STATS_RPPC       0x8C
 173 #define MT7621_STATS_RL64PC     0x90
 174 #define MT7621_STATS_RL65PC     0x94
 175 #define MT7621_STATS_RL128PC    0x98
 176 #define MT7621_STATS_RL256PC    0x9C
 177 #define MT7621_STATS_RL512PC    0xA0
 178 #define MT7621_STATS_RL1024PC   0xA4
 179 #define MT7621_STATS_ROC        0xA8
 180 #define MT7621_STATS_RDPC_CTRL  0xB0
 181 #define MT7621_STATS_RDPC_ING   0xB4
 182 #define MT7621_STATS_RDPC_ARL   0xB8
 183
 184 int mt7530_probe(struct device *dev, void __iomem *base, struct mii_bus *bus, int vlan);
 185
 186 #endif