2 * Ralink RT305x SoC platform device registration
4 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/err.h>
14 #include <linux/clk.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/mtd/physmap.h>
17 #include <linux/spi/spi.h>
18 #include <linux/rt2x00_platform.h>
19 #include <linux/delay.h>
20 #include <linux/dma-mapping.h>
22 #include <asm/addrspace.h>
24 #include <asm/mach-ralink/rt305x.h>
25 #include <asm/mach-ralink/rt305x_regs.h>
28 #include <ramips_eth_platform.h>
29 #include <rt305x_esw_platform.h>
30 #include <rt3883_ehci_platform.h>
31 #include <rt3883_ohci_platform.h>
33 static struct resource rt305x_flash0_resources
[] = {
35 .flags
= IORESOURCE_MEM
,
36 .start
= KSEG1ADDR(RT305X_FLASH0_BASE
),
37 .end
= KSEG1ADDR(RT305X_FLASH0_BASE
) +
38 RT305X_FLASH0_SIZE
- 1,
42 struct physmap_flash_data rt305x_flash0_data
;
43 static struct platform_device rt305x_flash0_device
= {
44 .name
= "physmap-flash",
45 .resource
= rt305x_flash0_resources
,
46 .num_resources
= ARRAY_SIZE(rt305x_flash0_resources
),
48 .platform_data
= &rt305x_flash0_data
,
52 static struct resource rt305x_flash1_resources
[] = {
54 .flags
= IORESOURCE_MEM
,
55 .start
= KSEG1ADDR(RT305X_FLASH1_BASE
),
56 .end
= KSEG1ADDR(RT305X_FLASH1_BASE
) +
57 RT305X_FLASH1_SIZE
- 1,
61 struct physmap_flash_data rt305x_flash1_data
;
62 static struct platform_device rt305x_flash1_device
= {
63 .name
= "physmap-flash",
64 .resource
= rt305x_flash1_resources
,
65 .num_resources
= ARRAY_SIZE(rt305x_flash1_resources
),
67 .platform_data
= &rt305x_flash1_data
,
71 static int rt305x_flash_instance __initdata
;
72 void __init
rt305x_register_flash(unsigned int id
)
74 struct platform_device
*pdev
;
75 struct physmap_flash_data
*pdata
;
81 pdev
= &rt305x_flash0_device
;
82 reg
= MEMC_REG_FLASH_CFG0
;
85 pdev
= &rt305x_flash1_device
;
86 reg
= MEMC_REG_FLASH_CFG1
;
92 t
= rt305x_memc_rr(reg
);
93 t
= (t
>> FLASH_CFG_WIDTH_SHIFT
) & FLASH_CFG_WIDTH_MASK
;
95 pdata
= pdev
->dev
.platform_data
;
97 case FLASH_CFG_WIDTH_8BIT
:
100 case FLASH_CFG_WIDTH_16BIT
:
103 case FLASH_CFG_WIDTH_32BIT
:
107 printk(KERN_ERR
"RT305x: flash bank%u witdh is invalid\n", id
);
111 pdev
->id
= rt305x_flash_instance
;
113 platform_device_register(pdev
);
114 rt305x_flash_instance
++;
117 static void rt305x_fe_reset(void)
119 rt305x_sysc_wr(RT305X_RESET_FE
, SYSC_REG_RESET_CTRL
);
120 rt305x_sysc_wr(0, SYSC_REG_RESET_CTRL
);
123 static struct resource rt305x_eth_resources
[] = {
125 .start
= RT305X_FE_BASE
,
126 .end
= RT305X_FE_BASE
+ PAGE_SIZE
- 1,
127 .flags
= IORESOURCE_MEM
,
129 .start
= RT305X_CPU_IRQ_FE
,
130 .end
= RT305X_CPU_IRQ_FE
,
131 .flags
= IORESOURCE_IRQ
,
135 static struct ramips_eth_platform_data ramips_eth_data
= {
136 .mac
= { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 },
137 .reset_fe
= rt305x_fe_reset
,
141 static struct platform_device rt305x_eth_device
= {
142 .name
= "ramips_eth",
143 .resource
= rt305x_eth_resources
,
144 .num_resources
= ARRAY_SIZE(rt305x_eth_resources
),
146 .platform_data
= &ramips_eth_data
,
150 static struct resource rt305x_esw_resources
[] = {
152 .start
= RT305X_SWITCH_BASE
,
153 .end
= RT305X_SWITCH_BASE
+ PAGE_SIZE
- 1,
154 .flags
= IORESOURCE_MEM
,
158 struct rt305x_esw_platform_data rt305x_esw_data
= {
159 /* All ports are LAN ports. */
160 .vlan_config
= RT305X_ESW_VLAN_CONFIG_NONE
,
161 .reg_initval_fct2
= 0x00d6500c,
163 * ext phy base addr 31, enable port 5 polling, rx/tx clock skew 1,
164 * turbo mii off, rgmi 3.3v off
166 * port6: enabled, gige, full-duplex, rx/tx-flow-control
168 .reg_initval_fpa2
= 0x3f502b28,
171 static struct platform_device rt305x_esw_device
= {
172 .name
= "rt305x-esw",
173 .resource
= rt305x_esw_resources
,
174 .num_resources
= ARRAY_SIZE(rt305x_esw_resources
),
176 .platform_data
= &rt305x_esw_data
,
180 void __init
rt305x_register_ethernet(void)
184 clk
= clk_get(NULL
, "sys");
186 panic("unable to get SYS clock, err=%ld", PTR_ERR(clk
));
188 ramips_eth_data
.sys_freq
= clk_get_rate(clk
);
190 platform_device_register(&rt305x_esw_device
);
191 platform_device_register(&rt305x_eth_device
);
194 static struct resource rt305x_wifi_resources
[] = {
196 .start
= RT305X_WMAC_BASE
,
197 .end
= RT305X_WMAC_BASE
+ 0x3FFFF,
198 .flags
= IORESOURCE_MEM
,
200 .start
= RT305X_CPU_IRQ_WNIC
,
201 .end
= RT305X_CPU_IRQ_WNIC
,
202 .flags
= IORESOURCE_IRQ
,
206 static struct rt2x00_platform_data rt305x_wifi_data
;
207 static struct platform_device rt305x_wifi_device
= {
208 .name
= "rt2800_wmac",
209 .resource
= rt305x_wifi_resources
,
210 .num_resources
= ARRAY_SIZE(rt305x_wifi_resources
),
212 .platform_data
= &rt305x_wifi_data
,
216 void __init
rt305x_register_wifi(void)
219 rt305x_wifi_data
.eeprom_file_name
= "RT305X.eeprom";
221 if (soc_is_rt3352() || soc_is_rt5350()) {
222 t
= rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG
);
223 t
&= RT3352_SYSCFG0_XTAL_SEL
;
225 rt305x_wifi_data
.clk_is_20mhz
= 1;
227 platform_device_register(&rt305x_wifi_device
);
230 static struct resource rt305x_wdt_resources
[] = {
232 .start
= RT305X_TIMER_BASE
,
233 .end
= RT305X_TIMER_BASE
+ RT305X_TIMER_SIZE
- 1,
234 .flags
= IORESOURCE_MEM
,
238 static struct platform_device rt305x_wdt_device
= {
239 .name
= "ramips-wdt",
241 .resource
= rt305x_wdt_resources
,
242 .num_resources
= ARRAY_SIZE(rt305x_wdt_resources
),
245 void __init
rt305x_register_wdt(void)
249 /* enable WDT reset output on pin SRAM_CS_N */
250 t
= rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG
);
251 t
|= RT305X_SYSCFG_SRAM_CS0_MODE_WDT
<<
252 RT305X_SYSCFG_SRAM_CS0_MODE_SHIFT
;
253 rt305x_sysc_wr(t
, SYSC_REG_SYSTEM_CONFIG
);
255 platform_device_register(&rt305x_wdt_device
);
258 static struct resource rt305x_spi_resources
[] = {
260 .flags
= IORESOURCE_MEM
,
261 .start
= RT305X_SPI_BASE
,
262 .end
= RT305X_SPI_BASE
+ RT305X_SPI_SIZE
- 1,
266 static struct platform_device rt305x_spi_device
= {
267 .name
= "ramips-spi",
269 .resource
= rt305x_spi_resources
,
270 .num_resources
= ARRAY_SIZE(rt305x_spi_resources
),
273 void __init
rt305x_register_spi(struct spi_board_info
*info
, int n
)
275 spi_register_board_info(info
, n
);
276 platform_device_register(&rt305x_spi_device
);
279 static struct resource rt305x_dwc_otg_resources
[] = {
281 .start
= RT305X_OTG_BASE
,
282 .end
= RT305X_OTG_BASE
+ 0x3FFFF,
283 .flags
= IORESOURCE_MEM
,
285 .start
= RT305X_INTC_IRQ_OTG
,
286 .end
= RT305X_INTC_IRQ_OTG
,
287 .flags
= IORESOURCE_IRQ
,
291 static struct platform_device rt305x_dwc_otg_device
= {
293 .resource
= rt305x_dwc_otg_resources
,
294 .num_resources
= ARRAY_SIZE(rt305x_dwc_otg_resources
),
296 .platform_data
= NULL
,
300 static atomic_t rt3352_usb_use_count
= ATOMIC_INIT(0);
302 static void rt3352_usb_host_start(void)
306 if (atomic_inc_return(&rt3352_usb_use_count
) != 1)
309 t
= rt305x_sysc_rr(RT3352_SYSC_REG_USB_PS
);
311 /* enable clock for port0's and port1's phys */
312 t
= rt305x_sysc_rr(RT3352_SYSC_REG_CLKCFG1
);
313 t
= t
| RT3352_CLKCFG1_UPHY0_CLK_EN
| RT3352_CLKCFG1_UPHY1_CLK_EN
;
314 rt305x_sysc_wr(t
, RT3352_SYSC_REG_CLKCFG1
);
317 /* pull USBHOST and USBDEV out from reset */
318 t
= rt305x_sysc_rr(RT3352_SYSC_REG_RSTCTRL
);
319 t
&= ~(RT3352_RSTCTRL_UHST
| RT3352_RSTCTRL_UDEV
);
320 rt305x_sysc_wr(t
, RT3352_SYSC_REG_RSTCTRL
);
323 /* enable host mode */
324 t
= rt305x_sysc_rr(RT3352_SYSC_REG_SYSCFG1
);
325 t
|= RT3352_SYSCFG1_USB0_HOST_MODE
;
326 rt305x_sysc_wr(t
, RT3352_SYSC_REG_SYSCFG1
);
328 t
= rt305x_sysc_rr(RT3352_SYSC_REG_USB_PS
);
331 static void rt3352_usb_host_stop(void)
335 if (atomic_dec_return(&rt3352_usb_use_count
) != 0)
338 /* put USBHOST and USBDEV into reset */
339 t
= rt305x_sysc_rr(RT3352_SYSC_REG_RSTCTRL
);
340 t
|= RT3352_RSTCTRL_UHST
| RT3352_RSTCTRL_UDEV
;
341 rt305x_sysc_wr(t
, RT3352_SYSC_REG_RSTCTRL
);
344 /* disable clock for port0's and port1's phys*/
345 t
= rt305x_sysc_rr(RT3352_SYSC_REG_CLKCFG1
);
346 t
&= ~(RT3352_CLKCFG1_UPHY0_CLK_EN
| RT3352_CLKCFG1_UPHY1_CLK_EN
);
347 rt305x_sysc_wr(t
, RT3352_SYSC_REG_CLKCFG1
);
351 static struct rt3883_ehci_platform_data rt3352_ehci_data
= {
352 .start_hw
= rt3352_usb_host_start
,
353 .stop_hw
= rt3352_usb_host_stop
,
356 static struct resource rt3352_ehci_resources
[] = {
358 .start
= RT3352_EHCI_BASE
,
359 .end
= RT3352_EHCI_BASE
+ RT3352_EHCI_SIZE
- 1,
360 .flags
= IORESOURCE_MEM
,
362 .start
= RT305X_INTC_IRQ_OTG
,
363 .end
= RT305X_INTC_IRQ_OTG
,
364 .flags
= IORESOURCE_IRQ
,
368 static u64 rt3352_ehci_dmamask
= DMA_BIT_MASK(32);
369 static struct platform_device rt3352_ehci_device
= {
370 .name
= "rt3883-ehci",
372 .resource
= rt3352_ehci_resources
,
373 .num_resources
= ARRAY_SIZE(rt3352_ehci_resources
),
375 .dma_mask
= &rt3352_ehci_dmamask
,
376 .coherent_dma_mask
= DMA_BIT_MASK(32),
377 .platform_data
= &rt3352_ehci_data
,
381 static struct resource rt3352_ohci_resources
[] = {
383 .start
= RT3352_OHCI_BASE
,
384 .end
= RT3352_OHCI_BASE
+ RT3352_OHCI_SIZE
- 1,
385 .flags
= IORESOURCE_MEM
,
387 .start
= RT305X_INTC_IRQ_OTG
,
388 .end
= RT305X_INTC_IRQ_OTG
,
389 .flags
= IORESOURCE_IRQ
,
393 static struct rt3883_ohci_platform_data rt3352_ohci_data
= {
394 .start_hw
= rt3352_usb_host_start
,
395 .stop_hw
= rt3352_usb_host_stop
,
398 static u64 rt3352_ohci_dmamask
= DMA_BIT_MASK(32);
399 static struct platform_device rt3352_ohci_device
= {
400 .name
= "rt3883-ohci",
402 .resource
= rt3352_ohci_resources
,
403 .num_resources
= ARRAY_SIZE(rt3352_ohci_resources
),
405 .dma_mask
= &rt3352_ohci_dmamask
,
406 .coherent_dma_mask
= DMA_BIT_MASK(32),
407 .platform_data
= &rt3352_ohci_data
,
411 void __init
rt305x_register_usb(void)
413 if (soc_is_rt305x() || soc_is_rt3350()) {
414 platform_device_register(&rt305x_dwc_otg_device
);
415 } else if (soc_is_rt3352() || soc_is_rt5350()) {
416 platform_device_register(&rt3352_ehci_device
);
417 platform_device_register(&rt3352_ohci_device
);