2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version 2
5 * of the License, or (at your option) any later version.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/list.h>
19 #include <linux/if_ether.h>
20 #include <linux/skbuff.h>
21 #include <linux/netdevice.h>
22 #include <linux/netlink.h>
23 #include <linux/bitops.h>
24 #include <net/genetlink.h>
25 #include <linux/switch.h>
26 #include <linux/delay.h>
27 #include <linux/phy.h>
28 #include <linux/netdevice.h>
29 #include <linux/etherdevice.h>
30 #include <linux/lockdep.h>
31 #include <linux/workqueue.h>
32 #include <linux/of_device.h>
36 #define MT7530_CPU_PORT 6
37 #define MT7530_NUM_PORTS 8
38 #define MT7530_NUM_VLANS 16
39 #define MT7530_MAX_VID 4095
40 #define MT7530_MIN_VID 0
43 #define REG_ESW_VLAN_VTCR 0x90
44 #define REG_ESW_VLAN_VAWD1 0x94
45 #define REG_ESW_VLAN_VAWD2 0x98
46 #define REG_ESW_VLAN_VTIM(x) (0x100 + 4 * ((x) / 2))
48 #define REG_ESW_VLAN_VAWD1_IVL_MAC BIT(30)
49 #define REG_ESW_VLAN_VAWD1_VTAG_EN BIT(28)
50 #define REG_ESW_VLAN_VAWD1_VALID BIT(0)
52 /* vlan egress mode */
60 #define REG_ESW_PORT_PCR(x) (0x2004 | ((x) << 8))
61 #define REG_ESW_PORT_PVC(x) (0x2010 | ((x) << 8))
62 #define REG_ESW_PORT_PPBV1(x) (0x2014 | ((x) << 8))
64 #define REG_HWTRAP 0x7804
66 #define MIB_DESC(_s , _o, _n) \
73 struct mt7xxx_mib_desc
{
79 #define MT7621_MIB_COUNTER_BASE 0x4000
80 #define MT7621_MIB_COUNTER_PORT_OFFSET 0x100
81 #define MT7621_STATS_TDPC 0x00
82 #define MT7621_STATS_TCRC 0x04
83 #define MT7621_STATS_TUPC 0x08
84 #define MT7621_STATS_TMPC 0x0C
85 #define MT7621_STATS_TBPC 0x10
86 #define MT7621_STATS_TCEC 0x14
87 #define MT7621_STATS_TSCEC 0x18
88 #define MT7621_STATS_TMCEC 0x1C
89 #define MT7621_STATS_TDEC 0x20
90 #define MT7621_STATS_TLCEC 0x24
91 #define MT7621_STATS_TXCEC 0x28
92 #define MT7621_STATS_TPPC 0x2C
93 #define MT7621_STATS_TL64PC 0x30
94 #define MT7621_STATS_TL65PC 0x34
95 #define MT7621_STATS_TL128PC 0x38
96 #define MT7621_STATS_TL256PC 0x3C
97 #define MT7621_STATS_TL512PC 0x40
98 #define MT7621_STATS_TL1024PC 0x44
99 #define MT7621_STATS_TOC 0x48
100 #define MT7621_STATS_RDPC 0x60
101 #define MT7621_STATS_RFPC 0x64
102 #define MT7621_STATS_RUPC 0x68
103 #define MT7621_STATS_RMPC 0x6C
104 #define MT7621_STATS_RBPC 0x70
105 #define MT7621_STATS_RAEPC 0x74
106 #define MT7621_STATS_RCEPC 0x78
107 #define MT7621_STATS_RUSPC 0x7C
108 #define MT7621_STATS_RFEPC 0x80
109 #define MT7621_STATS_ROSPC 0x84
110 #define MT7621_STATS_RJEPC 0x88
111 #define MT7621_STATS_RPPC 0x8C
112 #define MT7621_STATS_RL64PC 0x90
113 #define MT7621_STATS_RL65PC 0x94
114 #define MT7621_STATS_RL128PC 0x98
115 #define MT7621_STATS_RL256PC 0x9C
116 #define MT7621_STATS_RL512PC 0xA0
117 #define MT7621_STATS_RL1024PC 0xA4
118 #define MT7621_STATS_ROC 0xA8
119 #define MT7621_STATS_RDPC_CTRL 0xB0
120 #define MT7621_STATS_RDPC_ING 0xB4
121 #define MT7621_STATS_RDPC_ARL 0xB8
123 static const struct mt7xxx_mib_desc mt7621_mibs
[] = {
124 MIB_DESC(1, MT7621_STATS_TDPC
, "TxDrop"),
125 MIB_DESC(1, MT7621_STATS_TCRC
, "TxCRC"),
126 MIB_DESC(1, MT7621_STATS_TUPC
, "TxUni"),
127 MIB_DESC(1, MT7621_STATS_TMPC
, "TxMulti"),
128 MIB_DESC(1, MT7621_STATS_TBPC
, "TxBroad"),
129 MIB_DESC(1, MT7621_STATS_TCEC
, "TxCollision"),
130 MIB_DESC(1, MT7621_STATS_TSCEC
, "TxSingleCol"),
131 MIB_DESC(1, MT7621_STATS_TMCEC
, "TxMultiCol"),
132 MIB_DESC(1, MT7621_STATS_TDEC
, "TxDefer"),
133 MIB_DESC(1, MT7621_STATS_TLCEC
, "TxLateCol"),
134 MIB_DESC(1, MT7621_STATS_TXCEC
, "TxExcCol"),
135 MIB_DESC(1, MT7621_STATS_TPPC
, "TxPause"),
136 MIB_DESC(1, MT7621_STATS_TL64PC
, "Tx64Byte"),
137 MIB_DESC(1, MT7621_STATS_TL65PC
, "Tx65Byte"),
138 MIB_DESC(1, MT7621_STATS_TL128PC
, "Tx128Byte"),
139 MIB_DESC(1, MT7621_STATS_TL256PC
, "Tx256Byte"),
140 MIB_DESC(1, MT7621_STATS_TL512PC
, "Tx512Byte"),
141 MIB_DESC(1, MT7621_STATS_TL1024PC
, "Tx1024Byte"),
142 MIB_DESC(2, MT7621_STATS_TOC
, "TxByte"),
143 MIB_DESC(1, MT7621_STATS_RDPC
, "RxDrop"),
144 MIB_DESC(1, MT7621_STATS_RFPC
, "RxFiltered"),
145 MIB_DESC(1, MT7621_STATS_RUPC
, "RxUni"),
146 MIB_DESC(1, MT7621_STATS_RMPC
, "RxMulti"),
147 MIB_DESC(1, MT7621_STATS_RBPC
, "RxBroad"),
148 MIB_DESC(1, MT7621_STATS_RAEPC
, "RxAlignErr"),
149 MIB_DESC(1, MT7621_STATS_RCEPC
, "RxCRC"),
150 MIB_DESC(1, MT7621_STATS_RUSPC
, "RxUnderSize"),
151 MIB_DESC(1, MT7621_STATS_RFEPC
, "RxFragment"),
152 MIB_DESC(1, MT7621_STATS_ROSPC
, "RxOverSize"),
153 MIB_DESC(1, MT7621_STATS_RJEPC
, "RxJabber"),
154 MIB_DESC(1, MT7621_STATS_RPPC
, "RxPause"),
155 MIB_DESC(1, MT7621_STATS_RL64PC
, "Rx64Byte"),
156 MIB_DESC(1, MT7621_STATS_RL65PC
, "Rx65Byte"),
157 MIB_DESC(1, MT7621_STATS_RL128PC
, "Rx128Byte"),
158 MIB_DESC(1, MT7621_STATS_RL256PC
, "Rx256Byte"),
159 MIB_DESC(1, MT7621_STATS_RL512PC
, "Rx512Byte"),
160 MIB_DESC(1, MT7621_STATS_RL1024PC
, "Rx1024Byte"),
161 MIB_DESC(2, MT7621_STATS_ROC
, "RxByte"),
162 MIB_DESC(1, MT7621_STATS_RDPC_CTRL
, "RxCtrlDrop"),
163 MIB_DESC(1, MT7621_STATS_RDPC_ING
, "RxIngDrop"),
164 MIB_DESC(1, MT7621_STATS_RDPC_ARL
, "RxARLDrop")
168 /* Global attributes. */
169 MT7530_ATTR_ENABLE_VLAN
,
172 struct mt7530_port_entry
{
176 struct mt7530_vlan_entry
{
185 struct switch_dev swdev
;
187 bool global_vlan_enable
;
188 struct mt7530_vlan_entry vlan_entries
[MT7530_NUM_VLANS
];
189 struct mt7530_port_entry port_entries
[MT7530_NUM_PORTS
];
192 struct mt7530_mapping
{
194 u16 pvids
[MT7530_NUM_PORTS
];
195 u8 members
[MT7530_NUM_VLANS
];
196 u8 etags
[MT7530_NUM_VLANS
];
197 u16 vids
[MT7530_NUM_VLANS
];
198 } mt7530_defaults
[] = {
201 .pvids
= { 1, 1, 1, 1, 2, 1, 1 },
202 .members
= { 0, 0x6f, 0x50 },
203 .etags
= { 0, 0x40, 0x40 },
207 .pvids
= { 2, 1, 1, 1, 1, 1, 1 },
208 .members
= { 0, 0x7e, 0x41 },
209 .etags
= { 0, 0x40, 0x40 },
214 struct mt7530_mapping
*
215 mt7530_find_mapping(struct device_node
*np
)
220 if (of_property_read_string(np
, "ralink,port-map", &map
))
223 for (i
= 0; i
< ARRAY_SIZE(mt7530_defaults
); i
++)
224 if (!strcmp(map
, mt7530_defaults
[i
].name
))
225 return &mt7530_defaults
[i
];
231 mt7530_apply_mapping(struct mt7530_priv
*mt7530
, struct mt7530_mapping
*map
)
235 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
236 mt7530
->port_entries
[i
].pvid
= map
->pvids
[i
];
238 for (i
= 0; i
< MT7530_NUM_VLANS
; i
++) {
239 mt7530
->vlan_entries
[i
].member
= map
->members
[i
];
240 mt7530
->vlan_entries
[i
].etags
= map
->etags
[i
];
241 mt7530
->vlan_entries
[i
].vid
= map
->vids
[i
];
246 mt7530_reset_switch(struct switch_dev
*dev
)
248 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
251 memset(priv
->port_entries
, 0, sizeof(priv
->port_entries
));
252 memset(priv
->vlan_entries
, 0, sizeof(priv
->vlan_entries
));
254 /* set default vid of each vlan to the same number of vlan, so the vid
255 * won't need be set explicitly.
257 for (i
= 0; i
< MT7530_NUM_VLANS
; i
++) {
258 priv
->vlan_entries
[i
].vid
= i
;
265 mt7530_get_vlan_enable(struct switch_dev
*dev
,
266 const struct switch_attr
*attr
,
267 struct switch_val
*val
)
269 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
271 val
->value
.i
= priv
->global_vlan_enable
;
277 mt7530_set_vlan_enable(struct switch_dev
*dev
,
278 const struct switch_attr
*attr
,
279 struct switch_val
*val
)
281 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
283 priv
->global_vlan_enable
= val
->value
.i
!= 0;
289 mt7530_r32(struct mt7530_priv
*priv
, u32 reg
)
295 mdiobus_write(priv
->bus
, 0x1f, 0x1f, (reg
>> 6) & 0x3ff);
296 low
= mdiobus_read(priv
->bus
, 0x1f, (reg
>> 2) & 0xf);
297 high
= mdiobus_read(priv
->bus
, 0x1f, 0x10);
299 return (high
<< 16) | (low
& 0xffff);
302 val
= ioread32(priv
->base
+ reg
);
303 pr_debug("MT7530 MDIO Read [%04x]=%08x\n", reg
, val
);
309 mt7530_w32(struct mt7530_priv
*priv
, u32 reg
, u32 val
)
312 mdiobus_write(priv
->bus
, 0x1f, 0x1f, (reg
>> 6) & 0x3ff);
313 mdiobus_write(priv
->bus
, 0x1f, (reg
>> 2) & 0xf, val
& 0xffff);
314 mdiobus_write(priv
->bus
, 0x1f, 0x10, val
>> 16);
318 pr_debug("MT7530 MDIO Write[%04x]=%08x\n", reg
, val
);
319 iowrite32(val
, priv
->base
+ reg
);
323 mt7530_vtcr(struct mt7530_priv
*priv
, u32 cmd
, u32 val
)
327 mt7530_w32(priv
, REG_ESW_VLAN_VTCR
, BIT(31) | (cmd
<< 12) | val
);
329 for (i
= 0; i
< 20; i
++) {
330 u32 val
= mt7530_r32(priv
, REG_ESW_VLAN_VTCR
);
332 if ((val
& BIT(31)) == 0)
338 printk("mt7530: vtcr timeout\n");
342 mt7530_get_port_pvid(struct switch_dev
*dev
, int port
, int *val
)
344 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
346 if (port
>= MT7530_NUM_PORTS
)
349 *val
= mt7530_r32(priv
, REG_ESW_PORT_PPBV1(port
));
356 mt7530_set_port_pvid(struct switch_dev
*dev
, int port
, int pvid
)
358 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
360 if (port
>= MT7530_NUM_PORTS
)
363 if (pvid
< MT7530_MIN_VID
|| pvid
> MT7530_MAX_VID
)
366 priv
->port_entries
[port
].pvid
= pvid
;
372 mt7530_get_vlan_ports(struct switch_dev
*dev
, struct switch_val
*val
)
374 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
381 if (val
->port_vlan
< 0 || val
->port_vlan
>= MT7530_NUM_VLANS
)
384 mt7530_vtcr(priv
, 0, val
->port_vlan
);
386 member
= mt7530_r32(priv
, REG_ESW_VLAN_VAWD1
);
390 etags
= mt7530_r32(priv
, REG_ESW_VLAN_VAWD2
);
392 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++) {
393 struct switch_port
*p
;
396 if (!(member
& BIT(i
)))
399 p
= &val
->value
.ports
[val
->len
++];
402 etag
= (etags
>> (i
* 2)) & 0x3;
404 if (etag
== ETAG_CTRL_TAG
)
405 p
->flags
|= BIT(SWITCH_PORT_FLAG_TAGGED
);
406 else if (etag
!= ETAG_CTRL_UNTAG
)
407 printk("vlan egress tag control neither untag nor tag.\n");
414 mt7530_set_vlan_ports(struct switch_dev
*dev
, struct switch_val
*val
)
416 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
421 if (val
->port_vlan
< 0 || val
->port_vlan
>= MT7530_NUM_VLANS
||
422 val
->len
> MT7530_NUM_PORTS
)
425 for (i
= 0; i
< val
->len
; i
++) {
426 struct switch_port
*p
= &val
->value
.ports
[i
];
428 if (p
->id
>= MT7530_NUM_PORTS
)
431 member
|= BIT(p
->id
);
433 if (p
->flags
& BIT(SWITCH_PORT_FLAG_TAGGED
))
436 priv
->vlan_entries
[val
->port_vlan
].member
= member
;
437 priv
->vlan_entries
[val
->port_vlan
].etags
= etags
;
443 mt7530_set_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
444 struct switch_val
*val
)
446 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
450 vlan
= val
->port_vlan
;
451 vid
= (u16
)val
->value
.i
;
453 if (vlan
< 0 || vlan
>= MT7530_NUM_VLANS
)
456 if (vid
< MT7530_MIN_VID
|| vid
> MT7530_MAX_VID
)
459 priv
->vlan_entries
[vlan
].vid
= vid
;
464 mt7530_get_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
465 struct switch_val
*val
)
467 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
471 vlan
= val
->port_vlan
;
473 vid
= mt7530_r32(priv
, REG_ESW_VLAN_VTIM(vlan
));
483 mt7530_apply_config(struct switch_dev
*dev
)
485 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
488 if (!priv
->global_vlan_enable
) {
489 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
490 mt7530_w32(priv
, REG_ESW_PORT_PCR(i
), 0x00ff0000);
492 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
493 mt7530_w32(priv
, REG_ESW_PORT_PVC(i
), 0x810000c0);
498 /* set all ports as security mode */
499 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
500 mt7530_w32(priv
, REG_ESW_PORT_PCR(i
), 0x00ff0003);
502 /* set all ports as user port */
503 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
504 mt7530_w32(priv
, REG_ESW_PORT_PVC(i
), 0x81000000);
506 for (i
= 0; i
< MT7530_NUM_VLANS
; i
++) {
507 u16 vid
= priv
->vlan_entries
[i
].vid
;
508 u8 member
= priv
->vlan_entries
[i
].member
;
509 u8 etags
= priv
->vlan_entries
[i
].etags
;
513 val
= mt7530_r32(priv
, REG_ESW_VLAN_VTIM(i
));
521 mt7530_w32(priv
, REG_ESW_VLAN_VTIM(i
), val
);
523 /* vlan port membership */
525 mt7530_w32(priv
, REG_ESW_VLAN_VAWD1
, REG_ESW_VLAN_VAWD1_IVL_MAC
|
526 REG_ESW_VLAN_VAWD1_VTAG_EN
| (member
<< 16) |
527 REG_ESW_VLAN_VAWD1_VALID
);
529 mt7530_w32(priv
, REG_ESW_VLAN_VAWD1
, 0);
533 for (j
= 0; j
< MT7530_NUM_PORTS
; j
++) {
535 val
|= ETAG_CTRL_TAG
<< (j
* 2);
537 val
|= ETAG_CTRL_UNTAG
<< (j
* 2);
539 mt7530_w32(priv
, REG_ESW_VLAN_VAWD2
, val
);
541 /* write to vlan table */
542 mt7530_vtcr(priv
, 1, i
);
545 /* Port Default PVID */
546 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++) {
548 val
= mt7530_r32(priv
, REG_ESW_PORT_PPBV1(i
));
550 val
|= priv
->port_entries
[i
].pvid
;
551 mt7530_w32(priv
, REG_ESW_PORT_PPBV1(i
), val
);
558 mt7530_get_port_link(struct switch_dev
*dev
, int port
,
559 struct switch_port_link
*link
)
561 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
564 if (port
< 0 || port
>= MT7530_NUM_PORTS
)
567 pmsr
= mt7530_r32(priv
, 0x3008 + (0x100 * port
));
569 link
->link
= pmsr
& 1;
570 link
->duplex
= (pmsr
>> 1) & 1;
571 speed
= (pmsr
>> 2) & 3;
575 link
->speed
= SWITCH_PORT_SPEED_10
;
578 link
->speed
= SWITCH_PORT_SPEED_100
;
581 case 3: /* forced gige speed can be 2 or 3 */
582 link
->speed
= SWITCH_PORT_SPEED_1000
;
585 link
->speed
= SWITCH_PORT_SPEED_UNKNOWN
;
592 static const struct switch_attr mt7530_global
[] = {
594 .type
= SWITCH_TYPE_INT
,
595 .name
= "enable_vlan",
596 .description
= "VLAN mode (1:enabled)",
598 .id
= MT7530_ATTR_ENABLE_VLAN
,
599 .get
= mt7530_get_vlan_enable
,
600 .set
= mt7530_set_vlan_enable
,
604 static u64
get_mib_counter(struct mt7530_priv
*priv
, int i
, int port
)
606 unsigned int port_base
;
609 port_base
= MT7621_MIB_COUNTER_BASE
+
610 MT7621_MIB_COUNTER_PORT_OFFSET
* port
;
612 t
= mt7530_r32(priv
, port_base
+ mt7621_mibs
[i
].offset
);
613 if (mt7621_mibs
[i
].size
== 2) {
616 hi
= mt7530_r32(priv
, port_base
+ mt7621_mibs
[i
].offset
+ 4);
623 static int mt7621_sw_get_port_mib(struct switch_dev
*dev
,
624 const struct switch_attr
*attr
,
625 struct switch_val
*val
)
627 static char buf
[4096];
628 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
631 if (val
->port_vlan
>= MT7530_NUM_PORTS
)
634 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
635 "Port %d MIB counters\n", val
->port_vlan
);
637 for (i
= 0; i
< sizeof(mt7621_mibs
) / sizeof(*mt7621_mibs
); ++i
) {
639 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
640 "%-11s: ", mt7621_mibs
[i
].name
);
641 counter
= get_mib_counter(priv
, i
, val
->port_vlan
);
642 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
, "%llu\n",
651 static const struct switch_attr mt7621_port
[] = {
653 .type
= SWITCH_TYPE_STRING
,
655 .description
= "Get MIB counters for port",
656 .get
= mt7621_sw_get_port_mib
,
661 static const struct switch_attr mt7530_port
[] = {
664 static const struct switch_attr mt7530_vlan
[] = {
666 .type
= SWITCH_TYPE_INT
,
668 .description
= "VLAN ID (0-4094)",
669 .set
= mt7530_set_vid
,
670 .get
= mt7530_get_vid
,
675 static const struct switch_dev_ops mt7621_ops
= {
677 .attr
= mt7530_global
,
678 .n_attr
= ARRAY_SIZE(mt7530_global
),
682 .n_attr
= ARRAY_SIZE(mt7621_port
),
686 .n_attr
= ARRAY_SIZE(mt7530_vlan
),
688 .get_vlan_ports
= mt7530_get_vlan_ports
,
689 .set_vlan_ports
= mt7530_set_vlan_ports
,
690 .get_port_pvid
= mt7530_get_port_pvid
,
691 .set_port_pvid
= mt7530_set_port_pvid
,
692 .get_port_link
= mt7530_get_port_link
,
693 .apply_config
= mt7530_apply_config
,
694 .reset_switch
= mt7530_reset_switch
,
697 static const struct switch_dev_ops mt7530_ops
= {
699 .attr
= mt7530_global
,
700 .n_attr
= ARRAY_SIZE(mt7530_global
),
704 .n_attr
= ARRAY_SIZE(mt7530_port
),
708 .n_attr
= ARRAY_SIZE(mt7530_vlan
),
710 .get_vlan_ports
= mt7530_get_vlan_ports
,
711 .set_vlan_ports
= mt7530_set_vlan_ports
,
712 .get_port_pvid
= mt7530_get_port_pvid
,
713 .set_port_pvid
= mt7530_set_port_pvid
,
714 .get_port_link
= mt7530_get_port_link
,
715 .apply_config
= mt7530_apply_config
,
716 .reset_switch
= mt7530_reset_switch
,
720 mt7530_probe(struct device
*dev
, void __iomem
*base
, struct mii_bus
*bus
, int vlan
)
722 struct switch_dev
*swdev
;
723 struct mt7530_priv
*mt7530
;
724 struct mt7530_mapping
*map
;
727 mt7530
= devm_kzalloc(dev
, sizeof(struct mt7530_priv
), GFP_KERNEL
);
733 mt7530
->global_vlan_enable
= vlan
;
735 swdev
= &mt7530
->swdev
;
737 swdev
->alias
= "mt7530";
738 swdev
->name
= "mt7530";
739 } else if (IS_ENABLED(CONFIG_SOC_MT7621
)) {
740 swdev
->alias
= "mt7621";
741 swdev
->name
= "mt7621";
743 swdev
->alias
= "mt7620";
744 swdev
->name
= "mt7620";
746 swdev
->cpu_port
= MT7530_CPU_PORT
;
747 swdev
->ports
= MT7530_NUM_PORTS
;
748 swdev
->vlans
= MT7530_NUM_VLANS
;
749 if (IS_ENABLED(CONFIG_SOC_MT7621
))
750 swdev
->ops
= &mt7621_ops
;
752 swdev
->ops
= &mt7530_ops
;
754 ret
= register_switch(swdev
, NULL
);
756 dev_err(dev
, "failed to register mt7530\n");
761 map
= mt7530_find_mapping(dev
->of_node
);
763 mt7530_apply_mapping(mt7530
, map
);
764 mt7530_apply_config(swdev
);
767 if (!IS_ENABLED(CONFIG_SOC_MT7621
) && bus
&& mt7530_r32(mt7530
, REG_HWTRAP
) != 0x1117edf) {
768 dev_info(dev
, "fixing up MHWTRAP register - bootloader probably played with it\n");
769 mt7530_w32(mt7530
, REG_HWTRAP
, 0x1117edf);
771 dev_info(dev
, "loaded %s driver\n", swdev
->name
);