c86a4a37ee0b39f28f50d8ba7232cce32283ecaf
[openwrt/openwrt.git] / target / linux / ramips / patches-3.10 / 0017-USB-MIPS-ralink-fix-usb-issue-on-mt7620.patch
1 From 3f40514a51b44171d274ef6a7d66dce9ae7c349d Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Fri, 24 May 2013 21:28:08 +0200
4 Subject: [PATCH 17/33] USB: MIPS: ralink: fix usb issue on mt7620
5
6 USB fails when frequency scaling is enabled. Increase the idle cpu speed when
7 scaled.
8
9 Signed-off-by: John Crispin <blogic@openwrt.org>
10 ---
11 arch/mips/include/asm/mach-ralink/mt7620.h | 1 +
12 arch/mips/ralink/mt7620.c | 8 ++++++++
13 2 files changed, 9 insertions(+)
14
15 diff --git a/arch/mips/include/asm/mach-ralink/mt7620.h b/arch/mips/include/asm/mach-ralink/mt7620.h
16 index 9809972..d469c69 100644
17 --- a/arch/mips/include/asm/mach-ralink/mt7620.h
18 +++ b/arch/mips/include/asm/mach-ralink/mt7620.h
19 @@ -20,6 +20,7 @@
20 #define SYSC_REG_CHIP_REV 0x0c
21 #define SYSC_REG_SYSTEM_CONFIG0 0x10
22 #define SYSC_REG_SYSTEM_CONFIG1 0x14
23 +#define SYSC_REG_CPU_SYS_CLKCFG 0x3c
24 #define SYSC_REG_CPLL_CONFIG0 0x54
25 #define SYSC_REG_CPLL_CONFIG1 0x58
26
27 diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
28 index 96422e5..6f6b1c8 100644
29 --- a/arch/mips/ralink/mt7620.c
30 +++ b/arch/mips/ralink/mt7620.c
31 @@ -185,6 +185,14 @@ void __init ralink_clk_init(void)
32 ralink_clk_add("10000500.uart", 40000000);
33 ralink_clk_add("10000b00.spi", 40000000);
34 ralink_clk_add("10000c00.uartlite", 40000000);
35 +
36 +#ifdef CONFIG_USB
37 + /*
38 + * When the CPU goes into sleep mode, the BUS clock will be too low for
39 + * USB to function properly
40 + */
41 + rt_sysc_m32(0x1f1f, 0x303, SYSC_REG_CPU_SYS_CLKCFG);
42 +#endif
43 }
44
45 void __init ralink_of_remap(void)
46 --
47 1.7.10.4
48