target/linux/ramips/patches-3.10/0025-watchdog-adds-ralink-wdt.patch

   1 From f51b3b84af840ea52170ae6444ddee26ec74f7a9 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Mon, 22 Apr 2013 23:23:07 +0200
   4 Subject: [PATCH 25/33] watchdog: adds ralink wdt
   5
   6 Adds the watchdog driver for ralink SoC.
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 ---
  10  arch/mips/ralink/mt7620.c     |    1 +
  11  drivers/watchdog/Kconfig      |    7 ++
  12  drivers/watchdog/Makefile     |    1 +
  13  drivers/watchdog/rt2880_wdt.c |  207 +++++++++++++++++++++++++++++++++++++++++
  14  4 files changed, 216 insertions(+)
  15  create mode 100644 drivers/watchdog/rt2880_wdt.c
  16
  17 --- a/arch/mips/ralink/mt7620.c
  18 +++ b/arch/mips/ralink/mt7620.c
  19 @@ -182,6 +182,7 @@ void __init ralink_clk_init(void)
  20
  21         ralink_clk_add("cpu", cpu_rate);
  22         ralink_clk_add("10000100.timer", 40000000);
  23 +       ralink_clk_add("10000120.watchdog", 40000000);
  24         ralink_clk_add("10000500.uart", 40000000);
  25         ralink_clk_add("10000b00.spi", 40000000);
  26         ralink_clk_add("10000c00.uartlite", 40000000);
  27 --- a/drivers/watchdog/Kconfig
  28 +++ b/drivers/watchdog/Kconfig
  29 @@ -1104,6 +1104,13 @@ config LANTIQ_WDT
  30         help
  31           Hardware driver for the Lantiq SoC Watchdog Timer.
  32
  33 +config RALINK_WDT
  34 +       tristate "Ralink SoC watchdog"
  35 +       select WATCHDOG_CORE
  36 +       depends on RALINK
  37 +       help
  38 +         Hardware driver for the Ralink SoC Watchdog Timer.
  39 +
  40  # PARISC Architecture
  41
  42  # POWERPC Architecture
  43 --- a/drivers/watchdog/Makefile
  44 +++ b/drivers/watchdog/Makefile
  45 @@ -134,6 +134,7 @@ obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
  46  obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
  47  octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o
  48  obj-$(CONFIG_LANTIQ_WDT) += lantiq_wdt.o
  49 +obj-$(CONFIG_RALINK_WDT) += rt2880_wdt.o
  50
  51  # PARISC Architecture
  52
  53 --- /dev/null
  54 +++ b/drivers/watchdog/rt2880_wdt.c
  55 @@ -0,0 +1,207 @@
  56 +/*
  57 + * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
  58 + *
  59 + * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  60 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  61 + *
  62 + * This driver was based on: drivers/watchdog/softdog.c
  63 + *
  64 + * This program is free software; you can redistribute it and/or modify it
  65 + * under the terms of the GNU General Public License version 2 as published
  66 + * by the Free Software Foundation.
  67 + */
  68 +
  69 +#include <linux/clk.h>
  70 +#include <linux/reset.h>
  71 +#include <linux/module.h>
  72 +#include <linux/kernel.h>
  73 +#include <linux/watchdog.h>
  74 +#include <linux/miscdevice.h>
  75 +#include <linux/moduleparam.h>
  76 +#include <linux/platform_device.h>
  77 +
  78 +#include <asm/mach-ralink/ralink_regs.h>
  79 +
  80 +#define SYSC_RSTSTAT                   0x38
  81 +#define WDT_RST_CAUSE                  BIT(1)
  82 +
  83 +#define RALINK_WDT_TIMEOUT             30
  84 +#define RALINK_WDT_PRESCALE            65536
  85 +
  86 +#define TIMER_REG_TMR1LOAD             0x00
  87 +#define TIMER_REG_TMR1CTL              0x08
  88 +
  89 +#define TMRSTAT_TMR1RST                        BIT(5)
  90 +
  91 +#define TMR1CTL_ENABLE                 BIT(7)
  92 +#define TMR1CTL_MODE_SHIFT             4
  93 +#define TMR1CTL_MODE_MASK              0x3
  94 +#define TMR1CTL_MODE_FREE_RUNNING      0x0
  95 +#define TMR1CTL_MODE_PERIODIC          0x1
  96 +#define TMR1CTL_MODE_TIMEOUT           0x2
  97 +#define TMR1CTL_MODE_WDT               0x3
  98 +#define TMR1CTL_PRESCALE_MASK          0xf
  99 +#define TMR1CTL_PRESCALE_65536         0xf
 100 +
 101 +static struct clk *rt288x_wdt_clk;
 102 +static unsigned long rt288x_wdt_freq;
 103 +static void __iomem *rt288x_wdt_base;
 104 +
 105 +static bool nowayout = WATCHDOG_NOWAYOUT;
 106 +module_param(nowayout, bool, 0);
 107 +MODULE_PARM_DESC(nowayout,
 108 +               "Watchdog cannot be stopped once started (default="
 109 +               __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 110 +
 111 +static inline void rt_wdt_w32(unsigned reg, u32 val)
 112 +{
 113 +       iowrite32(val, rt288x_wdt_base + reg);
 114 +}
 115 +
 116 +static inline u32 rt_wdt_r32(unsigned reg)
 117 +{
 118 +       return ioread32(rt288x_wdt_base + reg);
 119 +}
 120 +
 121 +static int rt288x_wdt_ping(struct watchdog_device *w)
 122 +{
 123 +        rt_wdt_w32(TIMER_REG_TMR1LOAD, w->timeout * rt288x_wdt_freq);
 124 +
 125 +       return 0;
 126 +}
 127 +
 128 +static int rt288x_wdt_start(struct watchdog_device *w)
 129 +{
 130 +       u32 t;
 131 +
 132 +       t = rt_wdt_r32(TIMER_REG_TMR1CTL);
 133 +       t &= ~(TMR1CTL_MODE_MASK << TMR1CTL_MODE_SHIFT |
 134 +               TMR1CTL_PRESCALE_MASK);
 135 +       t |= (TMR1CTL_MODE_WDT << TMR1CTL_MODE_SHIFT |
 136 +               TMR1CTL_PRESCALE_65536);
 137 +       rt_wdt_w32(TIMER_REG_TMR1CTL, t);
 138 +
 139 +       rt288x_wdt_ping(w);
 140 +
 141 +       t = rt_wdt_r32(TIMER_REG_TMR1CTL);
 142 +       t |= TMR1CTL_ENABLE;
 143 +       rt_wdt_w32(TIMER_REG_TMR1CTL, t);
 144 +
 145 +       return 0;
 146 +}
 147 +
 148 +static int rt288x_wdt_stop(struct watchdog_device *w)
 149 +{
 150 +       u32 t;
 151 +
 152 +       rt288x_wdt_ping(w);
 153 +
 154 +       t = rt_wdt_r32(TIMER_REG_TMR1CTL);
 155 +       t &= ~TMR1CTL_ENABLE;
 156 +       rt_wdt_w32(TIMER_REG_TMR1CTL, t);
 157 +
 158 +       return 0;
 159 +}
 160 +
 161 +static int rt288x_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
 162 +{
 163 +       w->timeout = t;
 164 +       rt288x_wdt_ping(w);
 165 +
 166 +       return 0;
 167 +}
 168 +
 169 +static int rt288x_wdt_bootcause(void)
 170 +{
 171 +       if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
 172 +               return WDIOF_CARDRESET;
 173 +
 174 +       return 0;
 175 +}
 176 +
 177 +static struct watchdog_info rt288x_wdt_info = {
 178 +       .identity = "Ralink Watchdog",
 179 +       .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
 180 +};
 181 +
 182 +static struct watchdog_ops rt288x_wdt_ops = {
 183 +       .owner = THIS_MODULE,
 184 +       .start = rt288x_wdt_start,
 185 +       .stop = rt288x_wdt_stop,
 186 +       .ping = rt288x_wdt_ping,
 187 +       .set_timeout = rt288x_wdt_set_timeout,
 188 +};
 189 +
 190 +static struct watchdog_device rt288x_wdt_dev = {
 191 +       .info = &rt288x_wdt_info,
 192 +       .ops = &rt288x_wdt_ops,
 193 +       .min_timeout = 1,
 194 +};
 195 +
 196 +static int rt288x_wdt_probe(struct platform_device *pdev)
 197 +{
 198 +       struct resource *res;
 199 +       int ret;
 200 +
 201 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 202 +        rt288x_wdt_base = devm_request_and_ioremap(&pdev->dev, res);
 203 +       if (IS_ERR(rt288x_wdt_base))
 204 +               return PTR_ERR(rt288x_wdt_base);
 205 +
 206 +       rt288x_wdt_clk = devm_clk_get(&pdev->dev, NULL);
 207 +       if (IS_ERR(rt288x_wdt_clk))
 208 +               return PTR_ERR(rt288x_wdt_clk);
 209 +
 210 +       device_reset(&pdev->dev);
 211 +
 212 +       rt288x_wdt_freq = clk_get_rate(rt288x_wdt_clk) / RALINK_WDT_PRESCALE;
 213 +
 214 +       rt288x_wdt_dev.dev = &pdev->dev;
 215 +       rt288x_wdt_dev.bootstatus = rt288x_wdt_bootcause();
 216 +
 217 +       rt288x_wdt_dev.timeout = rt288x_wdt_dev.max_timeout = (0xfffful / rt288x_wdt_freq);
 218 +
 219 +       watchdog_set_nowayout(&rt288x_wdt_dev, nowayout);
 220 +
 221 +       ret = watchdog_register_device(&rt288x_wdt_dev);
 222 +       if (!ret)
 223 +               dev_info(&pdev->dev, "Initialized\n");
 224 +
 225 +       return 0;
 226 +}
 227 +
 228 +static int rt288x_wdt_remove(struct platform_device *pdev)
 229 +{
 230 +       watchdog_unregister_device(&rt288x_wdt_dev);
 231 +
 232 +       return 0;
 233 +}
 234 +
 235 +static void rt288x_wdt_shutdown(struct platform_device *pdev)
 236 +{
 237 +       rt288x_wdt_stop(&rt288x_wdt_dev);
 238 +}
 239 +
 240 +static const struct of_device_id rt288x_wdt_match[] = {
 241 +       { .compatible = "ralink,rt2880-wdt" },
 242 +       {},
 243 +};
 244 +MODULE_DEVICE_TABLE(of, rt288x_wdt_match);
 245 +
 246 +static struct platform_driver rt288x_wdt_driver = {
 247 +       .probe          = rt288x_wdt_probe,
 248 +       .remove         = rt288x_wdt_remove,
 249 +       .shutdown       = rt288x_wdt_shutdown,
 250 +       .driver         = {
 251 +               .name           = KBUILD_MODNAME,
 252 +               .owner          = THIS_MODULE,
 253 +               .of_match_table = rt288x_wdt_match,
 254 +       },
 255 +};
 256 +
 257 +module_platform_driver(rt288x_wdt_driver);
 258 +
 259 +MODULE_DESCRIPTION("MediaTek/Ralink RT288x/RT3xxx hardware watchdog driver");
 260 +MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
 261 +MODULE_LICENSE("GPL v2");
 262 +MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);