391b5901143507939c33402ed674eeccc3547a75
[openwrt/openwrt.git] / target / linux / ramips / patches-3.10 / 999-mt7620n.patch
1 Index: linux-3.10.18/arch/mips/include/asm/mach-ralink/mt7620.h
2 ===================================================================
3 --- linux-3.10.18.orig/arch/mips/include/asm/mach-ralink/mt7620.h 2013-11-17 17:50:01.773020032 +0100
4 +++ linux-3.10.18/arch/mips/include/asm/mach-ralink/mt7620.h 2013-11-17 17:52:24.373025950 +0100
5 @@ -24,11 +24,8 @@
6 #define SYSC_REG_CPLL_CONFIG0 0x54
7 #define SYSC_REG_CPLL_CONFIG1 0x58
8
9 -#define MT7620N_CHIP_NAME0 0x33365452
10 -#define MT7620N_CHIP_NAME1 0x20203235
11 -
12 -#define MT7620A_CHIP_NAME0 0x3637544d
13 -#define MT7620A_CHIP_NAME1 0x20203032
14 +#define MT7620_CHIP_NAME0 0x3637544d
15 +#define MT7620_CHIP_NAME1 0x20203032
16
17 #define CHIP_REV_PKG_MASK 0x1
18 #define CHIP_REV_PKG_SHIFT 16
19 Index: linux-3.10.18/arch/mips/ralink/mt7620.c
20 ===================================================================
21 --- linux-3.10.18.orig/arch/mips/ralink/mt7620.c 2013-11-17 17:50:01.773020032 +0100
22 +++ linux-3.10.18/arch/mips/ralink/mt7620.c 2013-11-17 17:52:24.373025950 +0100
23 @@ -167,22 +167,27 @@
24 u32 cfg0;
25 u32 pmu0;
26 u32 pmu1;
27 + u32 bga;
28
29 n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
30 n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
31 + rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
32 + bga = (rev >> CHIP_REV_PKG_SHIFT) & CHIP_REV_PKG_MASK;
33
34 - if (n0 == MT7620N_CHIP_NAME0 && n1 == MT7620N_CHIP_NAME1) {
35 - name = "MT7620N";
36 - soc_info->compatible = "ralink,mt7620n-soc";
37 - } else if (n0 == MT7620A_CHIP_NAME0 && n1 == MT7620A_CHIP_NAME1) {
38 + if (n0 != MT7620_CHIP_NAME0 || n1 != MT7620_CHIP_NAME1)
39 + panic("mt7620: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
40 +
41 + if (bga) {
42 name = "MT7620A";
43 soc_info->compatible = "ralink,mt7620a-soc";
44 } else {
45 - panic("mt7620: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
46 + name = "MT7620N";
47 + soc_info->compatible = "ralink,mt7620n-soc";
48 +#ifdef CONFIG_PCI
49 + panic("mt7620n is only supported for non pci kernels");
50 +#endif
51 }
52
53 - rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
54 -
55 snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,
56 "Ralink %s ver:%u eco:%u",
57 name,