target/linux/ramips/patches-3.14/0001-MIPS-ralink-add-verbose-pmu-info.patch

   1 From 453850d315070678245f61202ae343153589e5a6 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sun, 27 Jul 2014 09:16:50 +0100
   4 Subject: [PATCH 01/57] MIPS: ralink: add verbose pmu info
   5
   6 Print the PMU and LDO settings on boot.
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 ---
  10  arch/mips/ralink/mt7620.c |   26 ++++++++++++++++++++++++++
  11  1 file changed, 26 insertions(+)
  12
  13 --- a/arch/mips/ralink/mt7620.c
  14 +++ b/arch/mips/ralink/mt7620.c
  15 @@ -20,6 +20,22 @@
  16
  17  #include "common.h"
  18
  19 +/* analog */
  20 +#define PMU0_CFG               0x88
  21 +#define PMU_SW_SET             BIT(28)
  22 +#define A_DCDC_EN              BIT(24)
  23 +#define A_SSC_PERI             BIT(19)
  24 +#define A_SSC_GEN              BIT(18)
  25 +#define A_SSC_M                        0x3
  26 +#define A_SSC_S                        16
  27 +#define A_DLY_M                        0x7
  28 +#define A_DLY_S                        8
  29 +#define A_VTUNE_M              0xff
  30 +
  31 +/* digital */
  32 +#define PMU1_CFG               0x8C
  33 +#define DIG_SW_SEL             BIT(25)
  34 +
  35  /* does the board have sdram or ddram */
  36  static int dram_type;
  37
  38 @@ -339,6 +355,8 @@ void prom_soc_init(struct ralink_soc_inf
  39         u32 n1;
  40         u32 rev;
  41         u32 cfg0;
  42 +       u32 pmu0;
  43 +       u32 pmu1;
  44
  45         n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
  46         n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
  47 @@ -386,4 +404,12 @@ void prom_soc_init(struct ralink_soc_inf
  48                 BUG();
  49         }
  50         soc_info->mem_base = MT7620_DRAM_BASE;
  51 +
  52 +       pmu0 = __raw_readl(sysc + PMU0_CFG);
  53 +       pmu1 = __raw_readl(sysc + PMU1_CFG);
  54 +
  55 +       pr_info("Analog PMU set to %s control\n",
  56 +               (pmu0 & PMU_SW_SET) ? ("sw") : ("hw"));
  57 +       pr_info("Digital PMU set to %s control\n",
  58 +               (pmu1 & DIG_SW_SEL) ? ("sw") : ("hw"));
  59  }