target/linux/ramips/patches-3.14/0007-MIPS-ralink-add-support-for-MT7620n.patch

   1 From efc0f99cebcab21dbabcc634b9dbb963bbbbcab8 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sun, 27 Jul 2014 09:23:36 +0100
   4 Subject: [PATCH 07/57] MIPS: ralink: add support for MT7620n
   5
   6 This is the small version of MT7620a.
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 ---
  10  arch/mips/include/asm/mach-ralink/mt7620.h |    7 ++-----
  11  arch/mips/ralink/mt7620.c                  |   19 ++++++++++++-------
  12  2 files changed, 14 insertions(+), 12 deletions(-)
  13
  14 --- a/arch/mips/include/asm/mach-ralink/mt7620.h
  15 +++ b/arch/mips/include/asm/mach-ralink/mt7620.h
  16 @@ -25,11 +25,8 @@
  17  #define SYSC_REG_CPLL_CONFIG0          0x54
  18  #define SYSC_REG_CPLL_CONFIG1          0x58
  19
  20 -#define MT7620N_CHIP_NAME0             0x33365452
  21 -#define MT7620N_CHIP_NAME1             0x20203235
  22 -
  23 -#define MT7620A_CHIP_NAME0             0x3637544d
  24 -#define MT7620A_CHIP_NAME1             0x20203032
  25 +#define MT7620_CHIP_NAME0              0x3637544d
  26 +#define MT7620_CHIP_NAME1              0x20203032
  27
  28  #define SYSCFG0_XTAL_FREQ_SEL          BIT(6)
  29
  30 --- a/arch/mips/ralink/mt7620.c
  31 +++ b/arch/mips/ralink/mt7620.c
  32 @@ -357,22 +357,27 @@ void prom_soc_init(struct ralink_soc_inf
  33         u32 cfg0;
  34         u32 pmu0;
  35         u32 pmu1;
  36 +       u32 bga;
  37
  38         n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
  39         n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
  40 +       rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
  41 +       bga = (rev >> CHIP_REV_PKG_SHIFT) & CHIP_REV_PKG_MASK;
  42
  43 -       if (n0 == MT7620N_CHIP_NAME0 && n1 == MT7620N_CHIP_NAME1) {
  44 -               name = "MT7620N";
  45 -               soc_info->compatible = "ralink,mt7620n-soc";
  46 -       } else if (n0 == MT7620A_CHIP_NAME0 && n1 == MT7620A_CHIP_NAME1) {
  47 +       if (n0 != MT7620_CHIP_NAME0 || n1 != MT7620_CHIP_NAME1)
  48 +               panic("mt7620: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
  49 +
  50 +       if (bga) {
  51                 name = "MT7620A";
  52                 soc_info->compatible = "ralink,mt7620a-soc";
  53         } else {
  54 -               panic("mt7620: unknown SoC, n0:%08x n1:%08x", n0, n1);
  55 +               name = "MT7620N";
  56 +               soc_info->compatible = "ralink,mt7620n-soc";
  57 +#ifdef CONFIG_PCI
  58 +               panic("mt7620n is only supported for non pci kernels");
  59 +#endif
  60         }
  61
  62 -       rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
  63 -
  64         snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,
  65                 "Ralink %s ver:%u eco:%u",
  66                 name,