target/linux/ramips/patches-3.14/0055-asoc-add-mt7620-support.patch

   1 From 241188942603dc73f62cf2553c53cae2235c9957 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sun, 27 Jul 2014 09:31:47 +0100
   4 Subject: [PATCH 55/57] asoc: add mt7620 support
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/ralink/of.c            |    2 +
   9  sound/soc/Kconfig                |    1 +
  10  sound/soc/Makefile               |    1 +
  11  sound/soc/ralink/Kconfig         |   15 ++
  12  sound/soc/ralink/Makefile        |   11 +
  13  sound/soc/ralink/mt7620-i2s.c    |  466 ++++++++++++++++++++++++++++++++++++++
  14  sound/soc/ralink/mt7620-wm8960.c |  125 ++++++++++
  15  sound/soc/soc-io.c               |   10 -
  16  8 files changed, 621 insertions(+), 10 deletions(-)
  17  create mode 100644 sound/soc/ralink/Kconfig
  18  create mode 100644 sound/soc/ralink/Makefile
  19  create mode 100644 sound/soc/ralink/mt7620-i2s.c
  20  create mode 100644 sound/soc/ralink/mt7620-wm8960.c
  21
  22 Index: linux-3.14.18/arch/mips/ralink/of.c
  23 ===================================================================
  24 --- linux-3.14.18.orig/arch/mips/ralink/of.c    2014-11-18 10:45:55.010989756 +0100
  25 +++ linux-3.14.18/arch/mips/ralink/of.c 2014-11-18 13:54:21.586438562 +0100
  26 @@ -15,6 +15,7 @@
  27  #include <linux/of_fdt.h>
  28  #include <linux/kernel.h>
  29  #include <linux/bootmem.h>
  30 +#include <linux/module.h>
  31  #include <linux/of_platform.h>
  32  #include <linux/of_address.h>
  33
  34 @@ -26,6 +27,7 @@
  35  #include "common.h"
  36
  37  __iomem void *rt_sysc_membase;
  38 +EXPORT_SYMBOL(rt_sysc_membase);
  39  __iomem void *rt_memc_membase;
  40
  41  extern struct boot_param_header __dtb_start;
  42 Index: linux-3.14.18/sound/soc/Kconfig
  43 ===================================================================
  44 --- linux-3.14.18.orig/sound/soc/Kconfig        2014-09-06 01:34:59.000000000 +0200
  45 +++ linux-3.14.18/sound/soc/Kconfig     2014-11-18 10:45:55.351159766 +0100
  46 @@ -47,6 +47,7 @@
  47  source "sound/soc/intel/Kconfig"
  48  source "sound/soc/mxs/Kconfig"
  49  source "sound/soc/pxa/Kconfig"
  50 +source "sound/soc/ralink/Kconfig"
  51  source "sound/soc/samsung/Kconfig"
  52  source "sound/soc/s6000/Kconfig"
  53  source "sound/soc/sh/Kconfig"
  54 Index: linux-3.14.18/sound/soc/Makefile
  55 ===================================================================
  56 --- linux-3.14.18.orig/sound/soc/Makefile       2014-09-06 01:34:59.000000000 +0200
  57 +++ linux-3.14.18/sound/soc/Makefile    2014-11-18 10:45:55.351159766 +0100
  58 @@ -24,6 +24,7 @@
  59  obj-$(CONFIG_SND_SOC)  += omap/
  60  obj-$(CONFIG_SND_SOC)  += kirkwood/
  61  obj-$(CONFIG_SND_SOC)  += pxa/
  62 +obj-$(CONFIG_SND_SOC)  += ralink/
  63  obj-$(CONFIG_SND_SOC)  += samsung/
  64  obj-$(CONFIG_SND_SOC)  += s6000/
  65  obj-$(CONFIG_SND_SOC)  += sh/
  66 Index: linux-3.14.18/sound/soc/ralink/Kconfig
  67 ===================================================================
  68 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
  69 +++ linux-3.14.18/sound/soc/ralink/Kconfig      2014-11-18 10:45:55.351159766 +0100
  70 @@ -0,0 +1,15 @@
  71 +config SND_MT7620_SOC_I2S
  72 +       depends on SOC_MT7620 && SND_SOC
  73 +       select SND_SOC_GENERIC_DMAENGINE_PCM
  74 +       tristate "SoC Audio (I2S protocol) for Ralink MT7620 SoC"
  75 +       help
  76 +         Say Y if you want to use I2S protocol and I2S codec on Ingenic MT7620
  77 +         based boards.
  78 +
  79 +config SND_MT7620_SOC_WM8960
  80 +       tristate "SoC Audio support for Ralink WM8960"
  81 +       select SND_MT7620_SOC_I2S
  82 +       select SND_SOC_WM8960
  83 +       help
  84 +         Say Y if you want to add support for ASoC audio on the Qi LB60 board
  85 +         a.k.a Qi Ben NanoNote.
  86 Index: linux-3.14.18/sound/soc/ralink/Makefile
  87 ===================================================================
  88 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
  89 +++ linux-3.14.18/sound/soc/ralink/Makefile     2014-11-18 10:45:55.351159766 +0100
  90 @@ -0,0 +1,11 @@
  91 +#
  92 +# Jz4740 Platform Support
  93 +#
  94 +snd-soc-mt7620-i2s-objs := mt7620-i2s.o
  95 +
  96 +obj-$(CONFIG_SND_MT7620_SOC_I2S) += snd-soc-mt7620-i2s.o
  97 +
  98 +# Jz4740 Machine Support
  99 +snd-soc-mt7620-wm8960-objs := mt7620-wm8960.o
 100 +
 101 +obj-$(CONFIG_SND_MT7620_SOC_WM8960) += snd-soc-mt7620-wm8960.o
 102 Index: linux-3.14.18/sound/soc/ralink/mt7620-i2s.c
 103 ===================================================================
 104 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
 105 +++ linux-3.14.18/sound/soc/ralink/mt7620-i2s.c 2014-11-18 10:45:55.351159766 +0100
 106 @@ -0,0 +1,436 @@
 107 +/*
 108 + *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
 109 + *
 110 + *  This program is free software; you can redistribute it and/or modify it
 111 + *  under  the terms of the GNU General  Public License as published by the
 112 + *  Free Software Foundation;  either version 2 of the License, or (at your
 113 + *  option) any later version.
 114 + *
 115 + *  You should have received a copy of the GNU General Public License along
 116 + *  with this program; if not, write to the Free Software Foundation, Inc.,
 117 + *  675 Mass Ave, Cambridge, MA 02139, USA.
 118 + *
 119 + */
 120 +
 121 +#include <linux/init.h>
 122 +#include <linux/io.h>
 123 +#include <linux/kernel.h>
 124 +#include <linux/module.h>
 125 +#include <linux/platform_device.h>
 126 +#include <linux/slab.h>
 127 +
 128 +#include <linux/delay.h>
 129 +
 130 +#include <linux/dma-mapping.h>
 131 +
 132 +#include <sound/core.h>
 133 +#include <sound/pcm.h>
 134 +#include <sound/pcm_params.h>
 135 +#include <sound/soc.h>
 136 +#include <sound/initval.h>
 137 +#include <sound/dmaengine_pcm.h>
 138 +
 139 +#include <ralink_regs.h>
 140 +
 141 +#define I2S_REG_CFG0           0x00
 142 +#define I2S_REG_CFG0_EN                BIT(31)
 143 +#define I2S_REG_CFG0_DMA_EN    BIT(30)
 144 +#define I2S_REG_CFG0_BYTE_SWAP BIT(28)
 145 +#define I2S_REG_CFG0_TX_EN     BIT(24)
 146 +#define I2S_REG_CFG0_RX_EN     BIT(20)
 147 +#define I2S_REG_CFG0_SLAVE     BIT(16)
 148 +#define I2S_REG_CFG0_RX_THRES  12
 149 +#define I2S_REG_CFG0_TX_THRES  4
 150 +#define I2S_REG_CFG0_DFT_THRES (4 << I2S_REG_CFG0_RX_THRES) | \
 151 +                                       (4 << I2S_REG_CFG0_TX_THRES)
 152 +
 153 +#define I2S_REG_INT_STATUS     0x04
 154 +#define I2S_REG_INT_EN         0x08
 155 +#define I2S_REG_FF_STATUS      0x0c
 156 +#define I2S_REG_WREG           0x10
 157 +#define I2S_REG_RREG           0x14
 158 +#define I2S_REG_CFG1           0x18
 159 +
 160 +#define I2S_REG_DIVCMP         0x20
 161 +#define I2S_REG_DIVINT         0x24
 162 +#define I2S_REG_CLK_EN         BIT(31)
 163 +
 164 +struct mt7620_i2s {
 165 +       struct resource *mem;
 166 +       void __iomem *base;
 167 +       dma_addr_t phys_base;
 168 +
 169 +       struct snd_dmaengine_dai_dma_data playback_dma_data;
 170 +       struct snd_dmaengine_dai_dma_data capture_dma_data;
 171 +};
 172 +
 173 +static inline uint32_t mt7620_i2s_read(const struct mt7620_i2s *i2s,
 174 +       unsigned int reg)
 175 +{
 176 +       return readl(i2s->base + reg);
 177 +}
 178 +
 179 +static inline void mt7620_i2s_write(const struct mt7620_i2s *i2s,
 180 +       unsigned int reg, uint32_t value)
 181 +{
 182 +       //printk("i2s --> %p = 0x%08X\n", i2s->base + reg, value);
 183 +       writel(value, i2s->base + reg);
 184 +}
 185 +
 186 +static int mt7620_i2s_startup(struct snd_pcm_substream *substream,
 187 +       struct snd_soc_dai *dai)
 188 +{
 189 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 190 +       uint32_t cfg;
 191 +
 192 +       if (dai->active)
 193 +               return 0;
 194 +
 195 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 196 +       cfg |= I2S_REG_CFG0_EN;
 197 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 198 +
 199 +       return 0;
 200 +}
 201 +
 202 +static void mt7620_i2s_shutdown(struct snd_pcm_substream *substream,
 203 +       struct snd_soc_dai *dai)
 204 +{
 205 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 206 +       uint32_t cfg;
 207 +
 208 +       if (dai->active)
 209 +               return;
 210 +
 211 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 212 +       cfg &= ~I2S_REG_CFG0_EN;
 213 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 214 +}
 215 +
 216 +static int mt7620_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
 217 +       struct snd_soc_dai *dai)
 218 +{
 219 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 220 +
 221 +       uint32_t cfg;
 222 +       uint32_t mask;
 223 +
 224 +       if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 225 +               mask = I2S_REG_CFG0_TX_EN;
 226 +       else
 227 +               mask = I2S_REG_CFG0_RX_EN;
 228 +
 229 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 230 +
 231 +       switch (cmd) {
 232 +       case SNDRV_PCM_TRIGGER_START:
 233 +       case SNDRV_PCM_TRIGGER_RESUME:
 234 +       case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 235 +               cfg |= mask;
 236 +               break;
 237 +       case SNDRV_PCM_TRIGGER_STOP:
 238 +       case SNDRV_PCM_TRIGGER_SUSPEND:
 239 +       case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 240 +               cfg &= ~mask;
 241 +               break;
 242 +       default:
 243 +               return -EINVAL;
 244 +       }
 245 +
 246 +       if (cfg & (I2S_REG_CFG0_TX_EN | I2S_REG_CFG0_RX_EN))
 247 +               cfg |= I2S_REG_CFG0_DMA_EN;
 248 +       else
 249 +               cfg &= ~I2S_REG_CFG0_DMA_EN;
 250 +
 251 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 252 +
 253 +       return 0;
 254 +}
 255 +
 256 +static int mt7620_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 257 +{
 258 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 259 +       uint32_t cfg;
 260 +
 261 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 262 +
 263 +       switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 264 +       case SND_SOC_DAIFMT_CBS_CFS:
 265 +               cfg |= I2S_REG_CFG0_SLAVE;
 266 +               break;
 267 +       case SND_SOC_DAIFMT_CBM_CFM:
 268 +               cfg &= ~I2S_REG_CFG0_SLAVE;
 269 +               break;
 270 +       case SND_SOC_DAIFMT_CBM_CFS:
 271 +       default:
 272 +               return -EINVAL;
 273 +       }
 274 +
 275 +       switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 276 +       case SND_SOC_DAIFMT_I2S:
 277 +       case SND_SOC_DAIFMT_MSB:
 278 +               cfg &= ~I2S_REG_CFG0_BYTE_SWAP;
 279 +               break;
 280 +       case SND_SOC_DAIFMT_LSB:
 281 +               cfg |= I2S_REG_CFG0_BYTE_SWAP;
 282 +               break;
 283 +       default:
 284 +               return -EINVAL;
 285 +       }
 286 +
 287 +       switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 288 +       case SND_SOC_DAIFMT_NB_NF:
 289 +               break;
 290 +       default:
 291 +               return -EINVAL;
 292 +       }
 293 +
 294 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 295 +
 296 +       return 0;
 297 +}
 298 +
 299 +static int mt7620_i2s_hw_params(struct snd_pcm_substream *substream,
 300 +       struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 301 +{
 302 +
 303 +       return 0;
 304 +}
 305 +
 306 +unsigned long i2sMaster_inclk_int[11] = {
 307 +       78,     56,     52,     39,     28,     26,     19,     14,     13,     9,      6};
 308 +unsigned long i2sMaster_inclk_comp[11] = {
 309 +       64,     352,    42,     32,     176,    21,     272,    88,     10,     455,    261};
 310 +
 311 +
 312 +static int mt7620_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
 313 +       unsigned int freq, int dir)
 314 +{
 315 +        struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 316 +
 317 +       printk("Internal REFCLK with fractional division\n");
 318 +
 319 +       mt7620_i2s_write(i2s, I2S_REG_DIVINT, i2sMaster_inclk_int[7]);
 320 +       mt7620_i2s_write(i2s, I2S_REG_DIVCMP,
 321 +               i2sMaster_inclk_comp[7] | I2S_REG_CLK_EN);
 322 +
 323 +/*     struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 324 +       struct clk *parent;
 325 +       int ret = 0;
 326 +
 327 +       switch (clk_id) {
 328 +       case JZ4740_I2S_CLKSRC_EXT:
 329 +               parent = clk_get(NULL, "ext");
 330 +               clk_set_parent(i2s->clk_i2s, parent);
 331 +               break;
 332 +       case JZ4740_I2S_CLKSRC_PLL:
 333 +               parent = clk_get(NULL, "pll half");
 334 +               clk_set_parent(i2s->clk_i2s, parent);
 335 +               ret = clk_set_rate(i2s->clk_i2s, freq);
 336 +               break;
 337 +       default:
 338 +               return -EINVAL;
 339 +       }
 340 +       clk_put(parent);
 341 +
 342 +       return ret;*/
 343 +       return 0;
 344 +}
 345 +
 346 +static void mt7620_i2c_init_pcm_config(struct mt7620_i2s *i2s)
 347 +{
 348 +       struct snd_dmaengine_dai_dma_data *dma_data;
 349 +
 350 +       /* Playback */
 351 +       dma_data = &i2s->playback_dma_data;
 352 +       dma_data->maxburst = 16;
 353 +       dma_data->slave_id = 2; //JZ4740_DMA_TYPE_AIC_TRANSMIT;
 354 +       dma_data->addr = i2s->phys_base + I2S_REG_WREG;
 355 +
 356 +       /* Capture */
 357 +       dma_data = &i2s->capture_dma_data;
 358 +       dma_data->maxburst = 16;
 359 +       dma_data->slave_id = 3; //JZ4740_DMA_TYPE_AIC_RECEIVE;
 360 +       dma_data->addr = i2s->phys_base + I2S_REG_RREG;
 361 +}
 362 +
 363 +static int mt7620_i2s_dai_probe(struct snd_soc_dai *dai)
 364 +{
 365 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 366 +       uint32_t data;
 367 +
 368 +       mt7620_i2c_init_pcm_config(i2s);
 369 +       dai->playback_dma_data = &i2s->playback_dma_data;
 370 +       dai->capture_dma_data = &i2s->capture_dma_data;
 371 +
 372 +       /* set share pins to i2s/gpio mode and i2c mode */
 373 +       data = rt_sysc_r32(0x60);
 374 +       data &= 0xFFFFFFE2;
 375 +       data |= 0x00000018;
 376 +       rt_sysc_w32(data, 0x60);
 377 +
 378 +       printk("Internal REFCLK with fractional division\n");
 379 +
 380 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, I2S_REG_CFG0_DFT_THRES);
 381 +       mt7620_i2s_write(i2s, I2S_REG_CFG1, 0);
 382 +       mt7620_i2s_write(i2s, I2S_REG_INT_EN, 0);
 383 +
 384 +       mt7620_i2s_write(i2s, I2S_REG_DIVINT, i2sMaster_inclk_int[7]);
 385 +       mt7620_i2s_write(i2s, I2S_REG_DIVCMP,
 386 +               i2sMaster_inclk_comp[7] | I2S_REG_CLK_EN);
 387 +
 388 +       return 0;
 389 +}
 390 +
 391 +static int mt7620_i2s_dai_remove(struct snd_soc_dai *dai)
 392 +{
 393 +       return 0;
 394 +}
 395 +
 396 +static const struct snd_soc_dai_ops mt7620_i2s_dai_ops = {
 397 +       .startup = mt7620_i2s_startup,
 398 +       .shutdown = mt7620_i2s_shutdown,
 399 +       .trigger = mt7620_i2s_trigger,
 400 +       .hw_params = mt7620_i2s_hw_params,
 401 +       .set_fmt = mt7620_i2s_set_fmt,
 402 +       .set_sysclk = mt7620_i2s_set_sysclk,
 403 +};
 404 +
 405 +#define JZ4740_I2S_FMTS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
 406 +                        SNDRV_PCM_FMTBIT_S24_LE)
 407 +
 408 +static struct snd_soc_dai_driver mt7620_i2s_dai = {
 409 +       .probe = mt7620_i2s_dai_probe,
 410 +       .remove = mt7620_i2s_dai_remove,
 411 +       .playback = {
 412 +               .channels_min = 1,
 413 +               .channels_max = 2,
 414 +               .rates = SNDRV_PCM_RATE_8000_48000,
 415 +               .formats = JZ4740_I2S_FMTS,
 416 +       },
 417 +       .capture = {
 418 +               .channels_min = 2,
 419 +               .channels_max = 2,
 420 +               .rates = SNDRV_PCM_RATE_8000_48000,
 421 +               .formats = JZ4740_I2S_FMTS,
 422 +       },
 423 +       .symmetric_rates = 1,
 424 +       .ops = &mt7620_i2s_dai_ops,
 425 +};
 426 +
 427 +static const struct snd_pcm_hardware mt7620_pcm_hardware = {
 428 +       .info = SNDRV_PCM_INFO_MMAP |
 429 +               SNDRV_PCM_INFO_MMAP_VALID |
 430 +               SNDRV_PCM_INFO_INTERLEAVED |
 431 +               SNDRV_PCM_INFO_BLOCK_TRANSFER,
 432 +       .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
 433 +       .period_bytes_min       = PAGE_SIZE,
 434 +       .period_bytes_max       = 64 * 1024,
 435 +       .periods_min            = 2,
 436 +       .periods_max            = 128,
 437 +       .buffer_bytes_max       = 128 * 1024,
 438 +       .fifo_size              = 32,
 439 +};
 440 +
 441 +static const struct snd_dmaengine_pcm_config mt7620_dmaengine_pcm_config = {
 442 +       .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
 443 +       .pcm_hardware = &mt7620_pcm_hardware,
 444 +       .prealloc_buffer_size = 256 * PAGE_SIZE,
 445 +};
 446 +
 447 +static const struct snd_soc_component_driver mt7620_i2s_component = {
 448 +       .name = "mt7620-i2s",
 449 +};
 450 +
 451 +static int mt7620_i2s_dev_probe(struct platform_device *pdev)
 452 +{
 453 +       struct mt7620_i2s *i2s;
 454 +       int ret;
 455 +
 456 +       snd_dmaengine_pcm_register(&pdev->dev,
 457 +               &mt7620_dmaengine_pcm_config,
 458 +               SND_DMAENGINE_PCM_FLAG_COMPAT);
 459 +
 460 +       i2s = kzalloc(sizeof(*i2s), GFP_KERNEL);
 461 +       if (!i2s)
 462 +               return -ENOMEM;
 463 +
 464 +       i2s->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 465 +       if (!i2s->mem) {
 466 +               ret = -ENOENT;
 467 +               goto err_free;
 468 +       }
 469 +
 470 +       i2s->mem = request_mem_region(i2s->mem->start, resource_size(i2s->mem),
 471 +                               pdev->name);
 472 +       if (!i2s->mem) {
 473 +               ret = -EBUSY;
 474 +               goto err_free;
 475 +       }
 476 +
 477 +       i2s->base = ioremap_nocache(i2s->mem->start, resource_size(i2s->mem));
 478 +       if (!i2s->base) {
 479 +               ret = -EBUSY;
 480 +               goto err_release_mem_region;
 481 +       }
 482 +
 483 +       i2s->phys_base = i2s->mem->start;
 484 +
 485 +       platform_set_drvdata(pdev, i2s);
 486 +       ret = snd_soc_register_component(&pdev->dev, &mt7620_i2s_component,
 487 +                                        &mt7620_i2s_dai, 1);
 488 +
 489 +       if (!ret) {
 490 +               dev_err(&pdev->dev, "loaded\n");
 491 +               return ret;
 492 +       }
 493 +
 494 +       dev_err(&pdev->dev, "Failed to register DAI\n");
 495 +       iounmap(i2s->base);
 496 +
 497 +err_release_mem_region:
 498 +       release_mem_region(i2s->mem->start, resource_size(i2s->mem));
 499 +err_free:
 500 +       kfree(i2s);
 501 +
 502 +       return ret;
 503 +}
 504 +
 505 +static int mt7620_i2s_dev_remove(struct platform_device *pdev)
 506 +{
 507 +       struct mt7620_i2s *i2s = platform_get_drvdata(pdev);
 508 +
 509 +       snd_soc_unregister_component(&pdev->dev);
 510 +
 511 +       iounmap(i2s->base);
 512 +       release_mem_region(i2s->mem->start, resource_size(i2s->mem));
 513 +
 514 +       kfree(i2s);
 515 +
 516 +       snd_dmaengine_pcm_unregister(&pdev->dev);
 517 +
 518 +       return 0;
 519 +}
 520 +
 521 +static const struct of_device_id mt7620_i2s_match[] = {
 522 +       { .compatible = "ralink,mt7620a-i2s" },
 523 +       {},
 524 +};
 525 +MODULE_DEVICE_TABLE(of, mt7620_i2s_match);
 526 +
 527 +static struct platform_driver mt7620_i2s_driver = {
 528 +       .probe = mt7620_i2s_dev_probe,
 529 +       .remove = mt7620_i2s_dev_remove,
 530 +       .driver = {
 531 +               .name = "mt7620-i2s",
 532 +               .owner = THIS_MODULE,
 533 +               .of_match_table = mt7620_i2s_match,
 534 +       },
 535 +};
 536 +
 537 +module_platform_driver(mt7620_i2s_driver);
 538 +
 539 +MODULE_AUTHOR("Lars-Peter Clausen, <lars@metafoo.de>");
 540 +MODULE_DESCRIPTION("Ingenic JZ4740 SoC I2S driver");
 541 +MODULE_LICENSE("GPL");
 542 +MODULE_ALIAS("platform:mt7620-i2s");
 543 Index: linux-3.14.18/sound/soc/ralink/mt7620-wm8960.c
 544 ===================================================================
 545 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
 546 +++ linux-3.14.18/sound/soc/ralink/mt7620-wm8960.c      2014-11-18 11:56:57.570299500 +0100
 547 @@ -0,0 +1,233 @@
 548 +/*
 549 + * Copyright 2013 Freescale Semiconductor, Inc.
 550 + *
 551 + * Based on mt7620-sgtl5000.c
 552 + * Copyright 2012 Freescale Semiconductor, Inc.
 553 + * Copyright 2012 Linaro Ltd.
 554 + *
 555 + * The code contained herein is licensed under the GNU General Public
 556 + * License. You may obtain a copy of the GNU General Public License
 557 + * Version 2 or later at the following locations:
 558 + *
 559 + * http://www.opensource.org/licenses/gpl-license.html
 560 + * http://www.gnu.org/copyleft/gpl.html
 561 + */
 562 +
 563 +#include <linux/module.h>
 564 +#include <linux/of_platform.h>
 565 +#include <linux/i2c.h>
 566 +#include <linux/slab.h>
 567 +#include <sound/soc.h>
 568 +#include <sound/pcm_params.h>
 569 +#include <sound/soc-dapm.h>
 570 +#include <linux/pinctrl/consumer.h>
 571 +
 572 +#include "../codecs/wm8960.h"
 573 +
 574 +#define DAI_NAME_SIZE  32
 575 +
 576 +struct mt7620_wm8960_data {
 577 +       struct snd_soc_dai_link dai;
 578 +       struct snd_soc_card card;
 579 +       char codec_dai_name[DAI_NAME_SIZE];
 580 +       char platform_name[DAI_NAME_SIZE];
 581 +       unsigned int clk_frequency;
 582 +};
 583 +
 584 +struct mt7620_priv {
 585 +       struct platform_device *pdev;
 586 +};
 587 +static struct mt7620_priv card_priv;
 588 +
 589 +static const struct snd_soc_dapm_widget mt7620_wm8960_dapm_widgets[] = {
 590 +       SND_SOC_DAPM_HP("Headphone Jack", NULL),
 591 +       SND_SOC_DAPM_SPK("Ext Spk", NULL),
 592 +       SND_SOC_DAPM_MIC("AMIC", NULL),
 593 +       SND_SOC_DAPM_MIC("DMIC", NULL),
 594 +};
 595 +
 596 +static int sample_rate = 44100;
 597 +static snd_pcm_format_t sample_format = SNDRV_PCM_FORMAT_S16_LE;
 598 +
 599 +static int mt7620_hifi_hw_params(struct snd_pcm_substream *substream,
 600 +               struct snd_pcm_hw_params *params)
 601 +{
 602 +       sample_rate = params_rate(params);
 603 +       sample_format = params_format(params);
 604 +
 605 +       return 0;
 606 +}
 607 +
 608 +static struct snd_soc_ops mt7620_hifi_ops = {
 609 +       .hw_params = mt7620_hifi_hw_params,
 610 +};
 611 +
 612 +static int mt7620_wm8960_set_bias_level(struct snd_soc_card *card,
 613 +                                       struct snd_soc_dapm_context *dapm,
 614 +                                       enum snd_soc_bias_level level)
 615 +{
 616 +       struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
 617 +       struct mt7620_priv *priv = &card_priv;
 618 +       struct mt7620_wm8960_data *data = snd_soc_card_get_drvdata(card);
 619 +       struct device *dev = &priv->pdev->dev;
 620 +       int ret;
 621 +
 622 +       if (dapm->dev != codec_dai->dev)
 623 +               return 0;
 624 +
 625 +       switch (level) {
 626 +       case SND_SOC_BIAS_PREPARE:
 627 +               if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
 628 +               }
 629 +               break;
 630 +
 631 +       case SND_SOC_BIAS_STANDBY:
 632 +               if (dapm->bias_level == SND_SOC_BIAS_PREPARE) {
 633 +                       ret = snd_soc_dai_set_sysclk(codec_dai,
 634 +                                       WM8960_SYSCLK_MCLK, data->clk_frequency,
 635 +                                       SND_SOC_CLOCK_IN);
 636 +                       if (ret < 0) {
 637 +                               dev_err(dev,
 638 +                                       "failed to switch away from FLL: %d\n",
 639 +                                       ret);
 640 +                               return ret;
 641 +                       }
 642 +               }
 643 +               break;
 644 +
 645 +       default:
 646 +               break;
 647 +       }
 648 +
 649 +       return 0;
 650 +}
 651 +
 652 +static int mt7620_wm8960_late_probe(struct snd_soc_card *card)
 653 +{
 654 +       struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
 655 +       struct mt7620_priv *priv = &card_priv;
 656 +       struct mt7620_wm8960_data *data = snd_soc_card_get_drvdata(card);
 657 +       struct device *dev = &priv->pdev->dev;
 658 +       int ret;
 659 +
 660 +       ret = snd_soc_dai_set_sysclk(codec_dai, WM8960_SYSCLK_MCLK,
 661 +                       data->clk_frequency, SND_SOC_CLOCK_IN);
 662 +       if (ret < 0)
 663 +               dev_err(dev, "failed to set sysclk in %s\n", __func__);
 664 +
 665 +       return ret;
 666 +}
 667 +
 668 +static int mt7620_wm8960_probe(struct platform_device *pdev)
 669 +{
 670 +       struct device_node *i2s_np, *codec_np;
 671 +       struct platform_device *i2s_pdev;
 672 +       struct mt7620_priv *priv = &card_priv;
 673 +       struct i2c_client *codec_dev;
 674 +       struct mt7620_wm8960_data *data;
 675 +       int ret;
 676 +
 677 +       priv->pdev = pdev;
 678 +
 679 +       i2s_np = of_parse_phandle(pdev->dev.of_node, "i2s-controller", 0);
 680 +       codec_np = of_parse_phandle(pdev->dev.of_node, "audio-codec", 0);
 681 +       if (!i2s_np || !codec_np) {
 682 +               dev_err(&pdev->dev, "phandle missing or invalid\n");
 683 +               ret = -EINVAL;
 684 +               goto fail;
 685 +       }
 686 +
 687 +       i2s_pdev = of_find_device_by_node(i2s_np);
 688 +       if (!i2s_pdev) {
 689 +               dev_err(&pdev->dev, "failed to find SSI platform device\n");
 690 +               ret = -EINVAL;
 691 +               goto fail;
 692 +       }
 693 +       codec_dev = of_find_i2c_device_by_node(codec_np);
 694 +       if (!codec_dev || !codec_dev->dev.driver) {
 695 +               dev_err(&pdev->dev, "failed to find codec platform device\n");
 696 +               ret = -EINVAL;
 697 +               goto fail;
 698 +       }
 699 +
 700 +       data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
 701 +       if (!data) {
 702 +               ret = -ENOMEM;
 703 +               goto fail;
 704 +       }
 705 +
 706 +       data->clk_frequency = 12000000;
 707 +       data->dai.name = "HiFi";
 708 +       data->dai.stream_name = "HiFi";
 709 +       data->dai.codec_dai_name = "wm8960-hifi";
 710 +       data->dai.codec_of_node = codec_np;
 711 +       data->dai.cpu_dai_name = dev_name(&i2s_pdev->dev);
 712 +       data->dai.platform_of_node = i2s_np;
 713 +       data->dai.ops = &mt7620_hifi_ops;
 714 +       data->dai.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
 715 +                           SND_SOC_DAIFMT_CBM_CFM;
 716 +
 717 +       data->card.dev = &pdev->dev;
 718 +       ret = snd_soc_of_parse_card_name(&data->card, "model");
 719 +       if (ret)
 720 +               goto fail;
 721 +       ret = snd_soc_of_parse_audio_routing(&data->card, "audio-routing");
 722 +       if (ret)
 723 +               goto fail;
 724 +       data->card.num_links = 1;
 725 +       data->card.dai_link = &data->dai;
 726 +       data->card.dapm_widgets = mt7620_wm8960_dapm_widgets;
 727 +       data->card.num_dapm_widgets = ARRAY_SIZE(mt7620_wm8960_dapm_widgets);
 728 +
 729 +       data->card.late_probe = mt7620_wm8960_late_probe;
 730 +       data->card.set_bias_level = mt7620_wm8960_set_bias_level;
 731 +
 732 +       platform_set_drvdata(pdev, &data->card);
 733 +       snd_soc_card_set_drvdata(&data->card, data);
 734 +
 735 +       ret = devm_snd_soc_register_card(&pdev->dev, &data->card);
 736 +       if (ret) {
 737 +               dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret);
 738 +               goto fail;
 739 +       }
 740 +
 741 +       of_node_put(i2s_np);
 742 +       of_node_put(codec_np);
 743 +
 744 +       return 0;
 745 +fail:
 746 +       if (i2s_np)
 747 +               of_node_put(i2s_np);
 748 +       if (codec_np)
 749 +               of_node_put(codec_np);
 750 +
 751 +       return ret;
 752 +}
 753 +
 754 +static int mt7620_wm8960_remove(struct platform_device *pdev)
 755 +{
 756 +       return 0;
 757 +}
 758 +
 759 +static const struct of_device_id mt7620_wm8960_dt_ids[] = {
 760 +       { .compatible = "mediatek,mt7620-audio-wm8960", },
 761 +       { /* sentinel */ }
 762 +};
 763 +MODULE_DEVICE_TABLE(of, mt7620_wm8960_dt_ids);
 764 +
 765 +static struct platform_driver mt7620_wm8960_driver = {
 766 +       .driver = {
 767 +               .name = "mt7620-wm8960",
 768 +               .owner = THIS_MODULE,
 769 +               .pm = &snd_soc_pm_ops,
 770 +               .of_match_table = mt7620_wm8960_dt_ids,
 771 +       },
 772 +       .probe = mt7620_wm8960_probe,
 773 +       .remove = mt7620_wm8960_remove,
 774 +};
 775 +module_platform_driver(mt7620_wm8960_driver);
 776 +
 777 +MODULE_AUTHOR("Freescale Semiconductor, Inc.");
 778 +MODULE_DESCRIPTION("Freescale i.MX WM8962 ASoC machine driver");
 779 +MODULE_LICENSE("GPL v2");
 780 +MODULE_ALIAS("platform:mt7620-wm8962");
 781 Index: linux-3.14.18/sound/soc/soc-io.c
 782 ===================================================================
 783 --- linux-3.14.18.orig/sound/soc/soc-io.c       2014-09-06 01:34:59.000000000 +0200
 784 +++ linux-3.14.18/sound/soc/soc-io.c    2014-11-18 10:45:55.355161766 +0100
 785 @@ -19,7 +19,6 @@
 786
 787  #include <trace/events/asoc.h>
 788
 789 -#ifdef CONFIG_REGMAP
 790  static int hw_write(struct snd_soc_codec *codec, unsigned int reg,
 791                     unsigned int value)
 792  {
 793 @@ -135,12 +134,3 @@
 794         return PTR_ERR_OR_ZERO(codec->control_data);
 795  }
 796  EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
 797 -#else
 798 -int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
 799 -                              int addr_bits, int data_bits,
 800 -                              enum snd_soc_control_type control)
 801 -{
 802 -       return -ENOTSUPP;
 803 -}
 804 -EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
 805 -#endif