target/linux/ramips/patches-3.18/0037-USB-phy-add-ralink-SoC-driver.patch

   1 --- a/drivers/phy/Kconfig
   2 +++ b/drivers/phy/Kconfig
   3 @@ -239,6 +239,11 @@ config PHY_XGENE
   4         help
   5           This option enables support for APM X-Gene SoC multi-purpose PHY.
   6
   7 +config PHY_RALINK_USB
   8 +       tristate "Ralink USB PHY driver"
   9 +       select GENERIC_PHY
  10 +       depends on RALINK
  11 +
  12  config PHY_STIH407_USB
  13         tristate "STMicroelectronics USB2 picoPHY driver for STiH407 family"
  14         depends on RESET_CONTROLLER
  15 --- a/drivers/phy/Makefile
  16 +++ b/drivers/phy/Makefile
  17 @@ -31,3 +31,4 @@ obj-$(CONFIG_PHY_ST_SPEAR1340_MIPHY)  +=
  18  obj-$(CONFIG_PHY_XGENE)                        += phy-xgene.o
  19  obj-$(CONFIG_PHY_STIH407_USB)          += phy-stih407-usb.o
  20  obj-$(CONFIG_PHY_STIH41X_USB)          += phy-stih41x-usb.o
  21 +obj-$(CONFIG_PHY_RALINK_USB)           += phy-ralink-usb.o
  22 --- /dev/null
  23 +++ b/drivers/phy/phy-ralink-usb.c
  24 @@ -0,0 +1,175 @@
  25 +/*
  26 + * Allwinner ralink USB phy driver
  27 + *
  28 + * Copyright (C) 2014 John Crispin <blogic@openwrt.org>
  29 + *
  30 + * Based on code from
  31 + * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  32 + *
  33 + * This program is free software; you can redistribute it and/or modify
  34 + * it under the terms of the GNU General Public License as published by
  35 + * the Free Software Foundation; either version 2 of the License, or
  36 + * (at your option) any later version.
  37 + *
  38 + * This program is distributed in the hope that it will be useful,
  39 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  40 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  41 + * GNU General Public License for more details.
  42 + */
  43 +
  44 +#include <linux/delay.h>
  45 +#include <linux/err.h>
  46 +#include <linux/io.h>
  47 +#include <linux/kernel.h>
  48 +#include <linux/module.h>
  49 +#include <linux/mutex.h>
  50 +#include <linux/phy/phy.h>
  51 +#include <linux/platform_device.h>
  52 +#include <linux/reset.h>
  53 +#include <linux/of_platform.h>
  54 +
  55 +#include <asm/mach-ralink/ralink_regs.h>
  56 +
  57 +#define RT_SYSC_REG_SYSCFG1            0x014
  58 +#define RT_SYSC_REG_CLKCFG1            0x030
  59 +#define RT_SYSC_REG_USB_PHY_CFG                0x05c
  60 +
  61 +#define RT_RSTCTRL_UDEV                        BIT(25)
  62 +#define RT_RSTCTRL_UHST                        BIT(22)
  63 +#define RT_SYSCFG1_USB0_HOST_MODE      BIT(10)
  64 +
  65 +#define MT7620_CLKCFG1_UPHY0_CLK_EN    BIT(25)
  66 +#define MT7620_CLKCFG1_UPHY1_CLK_EN    BIT(22)
  67 +#define RT_CLKCFG1_UPHY1_CLK_EN                BIT(20)
  68 +#define RT_CLKCFG1_UPHY0_CLK_EN                BIT(18)
  69 +
  70 +#define USB_PHY_UTMI_8B60M             BIT(1)
  71 +#define UDEV_WAKEUP                    BIT(0)
  72 +
  73 +static atomic_t usb_pwr_ref = ATOMIC_INIT(0);
  74 +static struct reset_control *rstdev;
  75 +static struct reset_control *rsthost;
  76 +static u32 phy_clk;
  77 +static struct phy *rt_phy;
  78 +
  79 +static void usb_phy_enable(int state)
  80 +{
  81 +       if (state)
  82 +               rt_sysc_m32(0, phy_clk, RT_SYSC_REG_CLKCFG1);
  83 +       else
  84 +               rt_sysc_m32(phy_clk, 0, RT_SYSC_REG_CLKCFG1);
  85 +       mdelay(100);
  86 +}
  87 +
  88 +static int ralink_usb_phy_init(struct phy *_phy)
  89 +{
  90 +       return 0;
  91 +}
  92 +
  93 +static int ralink_usb_phy_exit(struct phy *_phy)
  94 +{
  95 +       return 0;
  96 +}
  97 +
  98 +static int ralink_usb_phy_power_on(struct phy *_phy)
  99 +{
 100 +       if (atomic_inc_return(&usb_pwr_ref) == 1) {
 101 +               int host = 1;
 102 +               u32 t;
 103 +
 104 +               usb_phy_enable(1);
 105 +
 106 +               if (host) {
 107 +                       rt_sysc_m32(0, RT_SYSCFG1_USB0_HOST_MODE, RT_SYSC_REG_SYSCFG1);
 108 +                       if (!IS_ERR(rsthost))
 109 +                               reset_control_deassert(rsthost);
 110 +                       if (!IS_ERR(rstdev))
 111 +                               reset_control_deassert(rstdev);
 112 +               } else {
 113 +                       rt_sysc_m32(RT_SYSCFG1_USB0_HOST_MODE, 0, RT_SYSC_REG_SYSCFG1);
 114 +                       if (!IS_ERR(rstdev))
 115 +                               reset_control_deassert(rstdev);
 116 +               }
 117 +               mdelay(100);
 118 +
 119 +               t = rt_sysc_r32(RT_SYSC_REG_USB_PHY_CFG);
 120 +               dev_info(&_phy->dev, "remote usb device wakeup %s\n",
 121 +                       (t & UDEV_WAKEUP) ? ("enabbled") : ("disabled"));
 122 +               if (t & USB_PHY_UTMI_8B60M)
 123 +                       dev_info(&_phy->dev, "UTMI 8bit 60MHz\n");
 124 +               else
 125 +                       dev_info(&_phy->dev, "UTMI 16bit 30MHz\n");
 126 +       }
 127 +
 128 +       return 0;
 129 +}
 130 +
 131 +static int ralink_usb_phy_power_off(struct phy *_phy)
 132 +{
 133 +       if (atomic_dec_return(&usb_pwr_ref) == 0) {
 134 +               usb_phy_enable(0);
 135 +               if (!IS_ERR(rstdev))
 136 +                       reset_control_assert(rstdev);
 137 +               if (!IS_ERR(rsthost))
 138 +                       reset_control_assert(rsthost);
 139 +       }
 140 +
 141 +       return 0;
 142 +}
 143 +
 144 +static struct phy_ops ralink_usb_phy_ops = {
 145 +       .init           = ralink_usb_phy_init,
 146 +       .exit           = ralink_usb_phy_exit,
 147 +       .power_on       = ralink_usb_phy_power_on,
 148 +       .power_off      = ralink_usb_phy_power_off,
 149 +       .owner          = THIS_MODULE,
 150 +};
 151 +
 152 +static struct phy *ralink_usb_phy_xlate(struct device *dev,
 153 +                                       struct of_phandle_args *args)
 154 +{
 155 +       return rt_phy;
 156 +}
 157 +
 158 +static const struct of_device_id ralink_usb_phy_of_match[] = {
 159 +       { .compatible = "ralink,rt3xxx-usbphy", .data = (void *) (RT_CLKCFG1_UPHY1_CLK_EN | RT_CLKCFG1_UPHY0_CLK_EN) },
 160 +       { .compatible = "ralink,mt7620a-usbphy", .data = (void *) (MT7620_CLKCFG1_UPHY1_CLK_EN | MT7620_CLKCFG1_UPHY0_CLK_EN) },
 161 +       { },
 162 +};
 163 +MODULE_DEVICE_TABLE(of, ralink_usb_phy_of_match);
 164 +
 165 +static int ralink_usb_phy_probe(struct platform_device *pdev)
 166 +{
 167 +       struct device *dev = &pdev->dev;
 168 +       struct phy_provider *phy_provider;
 169 +       const struct of_device_id *match;
 170 +
 171 +       match = of_match_device(ralink_usb_phy_of_match, &pdev->dev);
 172 +       phy_clk = (int) match->data;
 173 +
 174 +       rsthost = devm_reset_control_get(&pdev->dev, "host");
 175 +       rstdev = devm_reset_control_get(&pdev->dev, "device");
 176 +
 177 +       rt_phy = devm_phy_create(dev, NULL, &ralink_usb_phy_ops, NULL);
 178 +       if (IS_ERR(rt_phy)) {
 179 +               dev_err(dev, "failed to create PHY\n");
 180 +               return PTR_ERR(rt_phy);
 181 +       }
 182 +
 183 +       phy_provider = devm_of_phy_provider_register(dev, ralink_usb_phy_xlate);
 184 +
 185 +       return PTR_ERR_OR_ZERO(phy_provider);
 186 +}
 187 +
 188 +static struct platform_driver ralink_usb_phy_driver = {
 189 +       .probe  = ralink_usb_phy_probe,
 190 +       .driver = {
 191 +               .of_match_table = ralink_usb_phy_of_match,
 192 +               .name  = "ralink-usb-phy",
 193 +       }
 194 +};
 195 +module_platform_driver(ralink_usb_phy_driver);
 196 +
 197 +MODULE_DESCRIPTION("Ralink USB phy driver");
 198 +MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
 199 +MODULE_LICENSE("GPL v2");