fix panic on boot due to invalid IORESOURCE for MFD cells, fix gpio value setting
[openwrt/openwrt.git] / target / linux / rdc / patches-2.6.32 / 002-rdc321x_gpio.patch
1 This patch adds a new GPIO driver for the RDC321x SoC GPIO controller.
2
3 Signed-off-by: Florian Fainelli <florian@openwrt.org>
4 ---
5 Changes from v2:
6 - initialize spinlock earlier
7 - do not declare and assign gpch variables on the same line
8 - use the pci_dev pointer passed as platform data
9 - replaced rdc321x_pci_{read,write}
10
11 Index: linux-2.6.32.10/drivers/gpio/Kconfig
12 ===================================================================
13 --- linux-2.6.32.10.orig/drivers/gpio/Kconfig 2010-05-15 22:54:31.000000000 +0200
14 +++ linux-2.6.32.10/drivers/gpio/Kconfig 2010-05-15 22:54:51.000000000 +0200
15 @@ -196,6 +196,14 @@
16 help
17 Say Y here to support Intel Moorestown platform GPIO.
18
19 +config GPIO_RDC321X
20 + tristate "RDC R-321x GPIO support"
21 + depends on PCI && GPIOLIB
22 + select MFD_RDC321X
23 + help
24 + Support for the RDC R321x SoC GPIOs over southbridge
25 + PCI configuration space.
26 +
27 comment "SPI GPIO expanders:"
28
29 config GPIO_MAX7301
30 Index: linux-2.6.32.10/drivers/gpio/Makefile
31 ===================================================================
32 --- linux-2.6.32.10.orig/drivers/gpio/Makefile 2010-05-15 22:54:31.000000000 +0200
33 +++ linux-2.6.32.10/drivers/gpio/Makefile 2010-05-15 22:54:51.000000000 +0200
34 @@ -19,3 +19,4 @@
35 obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o
36 obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o
37 obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o
38 +obj-$(CONFIG_GPIO_RDC321X) += rdc321x-gpio.o
39 Index: linux-2.6.32.10/drivers/gpio/rdc321x-gpio.c
40 ===================================================================
41 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
42 +++ linux-2.6.32.10/drivers/gpio/rdc321x-gpio.c 2010-05-15 22:55:10.000000000 +0200
43 @@ -0,0 +1,245 @@
44 +/*
45 + * RDC321x GPIO driver
46 + *
47 + * Copyright (C) 2008, Volker Weiss <dev@tintuc.de>
48 + * Copyright (C) 2007-2010 Florian Fainelli <florian@openwrt.org>
49 + *
50 + * This program is free software; you can redistribute it and/or modify
51 + * it under the terms of the GNU General Public License as published by
52 + * the Free Software Foundation; either version 2 of the License, or
53 + * (at your option) any later version.
54 + *
55 + * This program is distributed in the hope that it will be useful,
56 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
57 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
58 + * GNU General Public License for more details.
59 + *
60 + * You should have received a copy of the GNU General Public License
61 + * along with this program; if not, write to the Free Software
62 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
63 + *
64 + */
65 +#include <linux/module.h>
66 +#include <linux/kernel.h>
67 +#include <linux/init.h>
68 +#include <linux/spinlock.h>
69 +#include <linux/platform_device.h>
70 +#include <linux/pci.h>
71 +#include <linux/gpio.h>
72 +#include <linux/mfd/rdc321x.h>
73 +
74 +struct rdc321x_gpio {
75 + spinlock_t lock;
76 + struct pci_dev *sb_pdev;
77 + u32 data_reg[2];
78 + int reg1_ctrl_base;
79 + int reg1_data_base;
80 + int reg2_ctrl_base;
81 + int reg2_data_base;
82 + struct gpio_chip chip;
83 +};
84 +
85 +/* read GPIO pin */
86 +static int rdc_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
87 +{
88 + struct rdc321x_gpio *gpch;
89 + u32 value = 0;
90 + int reg;
91 +
92 + gpch = container_of(chip, struct rdc321x_gpio, chip);
93 + reg = gpio < 32 ? gpch->reg1_data_base : gpch->reg2_data_base;
94 +
95 + spin_lock(&gpch->lock);
96 + pci_write_config_dword(gpch->sb_pdev, reg,
97 + gpch->data_reg[gpio < 32 ? 0 : 1]);
98 + pci_read_config_dword(gpch->sb_pdev, reg, &value);
99 + spin_unlock(&gpch->lock);
100 +
101 + return (1 << (gpio & 0x1f)) & value ? 1 : 0;
102 +}
103 +
104 +static void rdc_gpio_set_value_impl(struct gpio_chip *chip,
105 + unsigned gpio, int value)
106 +{
107 + struct rdc321x_gpio *gpch;
108 + int reg = (gpio < 32) ? 0 : 1;
109 +
110 + gpch = container_of(chip, struct rdc321x_gpio, chip);
111 +
112 + if (value)
113 + gpch->data_reg[reg] |= 1 << (gpio & 0x1f);
114 + else
115 + gpch->data_reg[reg] &= ~(1 << (gpio & 0x1f));
116 +
117 + pci_write_config_dword(gpch->sb_pdev,
118 + reg ? gpch->reg2_data_base : gpch->reg1_data_base,
119 + gpch->data_reg[reg]);
120 +}
121 +
122 +/* set GPIO pin to value */
123 +static void rdc_gpio_set_value(struct gpio_chip *chip,
124 + unsigned gpio, int value)
125 +{
126 + struct rdc321x_gpio *gpch;
127 +
128 + gpch = container_of(chip, struct rdc321x_gpio, chip);
129 + spin_lock(&gpch->lock);
130 + rdc_gpio_set_value_impl(chip, gpio, value);
131 + spin_unlock(&gpch->lock);
132 +}
133 +
134 +static int rdc_gpio_config(struct gpio_chip *chip,
135 + unsigned gpio, int value)
136 +{
137 + struct rdc321x_gpio *gpch;
138 + int err;
139 + u32 reg;
140 +
141 + gpch = container_of(chip, struct rdc321x_gpio, chip);
142 +
143 + spin_lock(&gpch->lock);
144 + err = pci_read_config_dword(gpch->sb_pdev, gpio < 32 ?
145 + gpch->reg1_ctrl_base : gpch->reg2_ctrl_base, &reg);
146 + if (err)
147 + goto unlock;
148 +
149 + reg |= 1 << (gpio & 0x1f);
150 +
151 + err = pci_write_config_dword(gpch->sb_pdev, gpio < 32 ?
152 + gpch->reg1_ctrl_base : gpch->reg2_ctrl_base, reg);
153 + if (err)
154 + goto unlock;
155 +
156 + rdc_gpio_set_value_impl(chip, gpio, value);
157 +
158 +unlock:
159 + spin_unlock(&gpch->lock);
160 +
161 + return err;
162 +}
163 +
164 +/* configure GPIO pin as input */
165 +static int rdc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
166 +{
167 + return rdc_gpio_config(chip, gpio, 1);
168 +}
169 +
170 +/*
171 + * Cache the initial value of both GPIO data registers
172 + */
173 +static int __devinit rdc321x_gpio_probe(struct platform_device *pdev)
174 +{
175 + int err;
176 + struct resource *r;
177 + struct rdc321x_gpio *rdc321x_gpio_dev;
178 + struct rdc321x_gpio_pdata *pdata;
179 +
180 + pdata = platform_get_drvdata(pdev);
181 + if (!pdata) {
182 + dev_err(&pdev->dev, "no platform data supplied\n");
183 + return -ENODEV;
184 + }
185 +
186 + rdc321x_gpio_dev = kzalloc(sizeof(struct rdc321x_gpio), GFP_KERNEL);
187 + if (!rdc321x_gpio_dev) {
188 + dev_err(&pdev->dev, "failed to allocate private data\n");
189 + return -ENOMEM;
190 + }
191 +
192 + r = platform_get_resource_byname(pdev, IORESOURCE_IO, "gpio-reg1");
193 + if (!r) {
194 + dev_err(&pdev->dev, "failed to get gpio-reg1 resource\n");
195 + err = -ENODEV;
196 + goto out_free;
197 + }
198 +
199 + spin_lock_init(&rdc321x_gpio_dev->lock);
200 + rdc321x_gpio_dev->sb_pdev = pdata->sb_pdev;
201 + rdc321x_gpio_dev->reg1_ctrl_base = r->start;
202 + rdc321x_gpio_dev->reg1_data_base = r->start + 0x4;
203 +
204 + r = platform_get_resource_byname(pdev, IORESOURCE_IO, "gpio-reg2");
205 + if (!r) {
206 + dev_err(&pdev->dev, "failed to get gpio-reg2 resource\n");
207 + err = -ENODEV;
208 + goto out_free;
209 + }
210 +
211 + rdc321x_gpio_dev->reg2_ctrl_base = r->start;
212 + rdc321x_gpio_dev->reg2_data_base = r->start + 0x4;
213 +
214 + rdc321x_gpio_dev->chip.label = "rdc321x-gpio";
215 + rdc321x_gpio_dev->chip.direction_input = rdc_gpio_direction_input;
216 + rdc321x_gpio_dev->chip.direction_output = rdc_gpio_config;
217 + rdc321x_gpio_dev->chip.get = rdc_gpio_get_value;
218 + rdc321x_gpio_dev->chip.set = rdc_gpio_set_value;
219 + rdc321x_gpio_dev->chip.base = 0;
220 + rdc321x_gpio_dev->chip.ngpio = pdata->max_gpios;
221 +
222 + platform_set_drvdata(pdev, rdc321x_gpio_dev);
223 +
224 + /* This might not be, what others (BIOS, bootloader, etc.)
225 + wrote to these registers before, but it's a good guess. Still
226 + better than just using 0xffffffff. */
227 + err = pci_read_config_dword(rdc321x_gpio_dev->sb_pdev,
228 + rdc321x_gpio_dev->reg1_data_base,
229 + &rdc321x_gpio_dev->data_reg[0]);
230 + if (err)
231 + goto out_drvdata;
232 +
233 + err = pci_read_config_dword(rdc321x_gpio_dev->sb_pdev,
234 + rdc321x_gpio_dev->reg2_data_base,
235 + &rdc321x_gpio_dev->data_reg[1]);
236 + if (err)
237 + goto out_drvdata;
238 +
239 + dev_info(&pdev->dev, "registering %d GPIOs\n",
240 + rdc321x_gpio_dev->chip.ngpio);
241 + return gpiochip_add(&rdc321x_gpio_dev->chip);
242 +
243 +out_drvdata:
244 + platform_set_drvdata(pdev, NULL);
245 +out_free:
246 + kfree(rdc321x_gpio_dev);
247 + return err;
248 +}
249 +
250 +static int __devexit rdc321x_gpio_remove(struct platform_device *pdev)
251 +{
252 + int ret;
253 + struct rdc321x_gpio *rdc321x_gpio_dev = platform_get_drvdata(pdev);
254 +
255 + ret = gpiochip_remove(&rdc321x_gpio_dev->chip);
256 + if (ret)
257 + dev_err(&pdev->dev, "failed to unregister chip\n");
258 +
259 + kfree(rdc321x_gpio_dev);
260 + platform_set_drvdata(pdev, NULL);
261 +
262 + return ret;
263 +}
264 +
265 +static struct platform_driver rdc321x_gpio_driver = {
266 + .driver.name = "rdc321x-gpio",
267 + .driver.owner = THIS_MODULE,
268 + .probe = rdc321x_gpio_probe,
269 + .remove = __devexit_p(rdc321x_gpio_remove),
270 +};
271 +
272 +static int __init rdc321x_gpio_init(void)
273 +{
274 + return platform_driver_register(&rdc321x_gpio_driver);
275 +}
276 +
277 +static void __exit rdc321x_gpio_exit(void)
278 +{
279 + platform_driver_unregister(&rdc321x_gpio_driver);
280 +}
281 +
282 +module_init(rdc321x_gpio_init);
283 +module_exit(rdc321x_gpio_exit);
284 +
285 +MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
286 +MODULE_DESCRIPTION("RDC321x GPIO driver");
287 +MODULE_LICENSE("GPL");
288 +MODULE_ALIAS("platform:rdc321x-gpio");