realtek: add ZyXEL GS1900-24HPv2 support
[openwrt/openwrt.git] / target / linux / realtek / dts / rtl8382_zyxel_gs1900-24hp-v2.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 #include "rtl8380_zyxel_gs1900.dtsi"
4
5 / {
6 compatible = "zyxel,gs1900-24hp-v2", "realtek,rtl838x-soc";
7 model = "ZyXEL GS1900-24HP v2 Switch";
8
9 /* i2c of the left SFP cage: port 25 */
10 i2c0: i2c-gpio-0 {
11 compatible = "i2c-gpio";
12 sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
13 scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
14 i2c-gpio,delay-us = <2>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 };
18
19 sfp0: sfp-p25 {
20 compatible = "sff,sfp";
21 i2c-bus = <&i2c0>;
22 los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
23 tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
24 mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
25 tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
26 };
27
28 /* i2c of the right SFP cage: port 26 */
29 i2c1: i2c-gpio-1 {
30 compatible = "i2c-gpio";
31 sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
32 scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
33 i2c-gpio,delay-us = <2>;
34 #address-cells = <1>;
35 #size-cells = <0>;
36 };
37
38 sfp1: sfp-p26 {
39 compatible = "sff,sfp";
40 i2c-bus = <&i2c1>;
41 los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
42 tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
43 mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
44 tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
45 };
46 };
47
48 &mdio {
49 EXTERNAL_PHY(0)
50 EXTERNAL_PHY(1)
51 EXTERNAL_PHY(2)
52 EXTERNAL_PHY(3)
53 EXTERNAL_PHY(4)
54 EXTERNAL_PHY(5)
55 EXTERNAL_PHY(6)
56 EXTERNAL_PHY(7)
57
58 EXTERNAL_PHY(16)
59 EXTERNAL_PHY(17)
60 EXTERNAL_PHY(18)
61 EXTERNAL_PHY(19)
62 EXTERNAL_PHY(20)
63 EXTERNAL_PHY(21)
64 EXTERNAL_PHY(22)
65 EXTERNAL_PHY(23)
66
67 INTERNAL_PHY(24)
68 INTERNAL_PHY(26)
69 };
70
71 &switch0 {
72 ports {
73 SWITCH_PORT(0, 1, qsgmii)
74 SWITCH_PORT(1, 2, qsgmii)
75 SWITCH_PORT(2, 3, qsgmii)
76 SWITCH_PORT(3, 4, qsgmii)
77 SWITCH_PORT(4, 5, qsgmii)
78 SWITCH_PORT(5, 6, qsgmii)
79 SWITCH_PORT(6, 7, qsgmii)
80 SWITCH_PORT(7, 8, qsgmii)
81
82 SWITCH_PORT(8, 9, internal)
83 SWITCH_PORT(9, 10, internal)
84 SWITCH_PORT(10, 11, internal)
85 SWITCH_PORT(11, 12, internal)
86 SWITCH_PORT(12, 13, internal)
87 SWITCH_PORT(13, 14, internal)
88 SWITCH_PORT(14, 15, internal)
89 SWITCH_PORT(15, 16, internal)
90
91 SWITCH_PORT(16, 17, qsgmii)
92 SWITCH_PORT(17, 18, qsgmii)
93 SWITCH_PORT(18, 19, qsgmii)
94 SWITCH_PORT(19, 20, qsgmii)
95 SWITCH_PORT(20, 21, qsgmii)
96 SWITCH_PORT(21, 22, qsgmii)
97 SWITCH_PORT(22, 23, qsgmii)
98 SWITCH_PORT(23, 24, qsgmii)
99
100
101 port@24 {
102 reg = <24>;
103 label = "lan25";
104 phy-mode = "1000base-x";
105 managed = "in-band-status";
106 sfp = <&sfp0>;
107 };
108
109 port@26 {
110 reg = <26>;
111 label = "lan26";
112 phy-mode = "1000base-x";
113 managed = "in-band-status";
114 sfp = <&sfp1>;
115 };
116 };
117 };