target/linux/sunxi/patches-3.12/116-dt-update-ahb-clock.patch

   1 From 051f43def45e53d93b9998728e398a68c4948114 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
   3 Date: Sat, 14 Sep 2013 20:44:03 -0300
   4 Subject: [PATCH] ARM: sunxi: dt: Update AHB clock to be muxable on sun[57]i
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 sun5i and sun7i have a mux to select the parent clock for AHB. This
  10 commit implements the required changes on the device trees.
  11
  12 Signed-off-by: Emilio López <emilio@elopez.com.ar>
  13 ---
  14  arch/arm/boot/dts/sun5i-a10s.dtsi | 4 ++--
  15  arch/arm/boot/dts/sun5i-a13.dtsi  | 4 ++--
  16  arch/arm/boot/dts/sun7i-a20.dtsi  | 4 ++--
  17  3 files changed, 6 insertions(+), 6 deletions(-)
  18
  19 diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
  20 index 9cb1b14..83e183c 100644
  21 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi
  22 +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
  23 @@ -115,9 +115,9 @@
  24
  25                 ahb: ahb@01c20054 {
  26                         #clock-cells = <0>;
  27 -                       compatible = "allwinner,sun4i-ahb-clk";
  28 +                       compatible = "allwinner,sun5i-a13-ahb-clk";
  29                         reg = <0x01c20054 0x4>;
  30 -                       clocks = <&axi>;
  31 +                       clocks = <&axi>, <&cpu>, <&pll6 1>;
  32                 };
  33
  34                 ahb_gates: ahb_gates@01c20060 {
  35 diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
  36 index 6b74dd0..0bb4300 100644
  37 --- a/arch/arm/boot/dts/sun5i-a13.dtsi
  38 +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
  39 @@ -115,9 +115,9 @@
  40
  41                 ahb: ahb@01c20054 {
  42                         #clock-cells = <0>;
  43 -                       compatible = "allwinner,sun4i-ahb-clk";
  44 +                       compatible = "allwinner,sun5i-a13-ahb-clk";
  45                         reg = <0x01c20054 0x4>;
  46 -                       clocks = <&axi>;
  47 +                       clocks = <&axi>, <&cpu>, <&pll6 1>;
  48                 };
  49
  50                 ahb_gates: ahb_gates@01c20060 {
  51 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
  52 index 55d3e14..63757c5 100644
  53 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
  54 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
  55 @@ -105,9 +105,9 @@
  56
  57                 ahb: ahb@01c20054 {
  58                         #clock-cells = <0>;
  59 -                       compatible = "allwinner,sun4i-ahb-clk";
  60 +                       compatible = "allwinner,sun5i-a13-ahb-clk";
  61                         reg = <0x01c20054 0x4>;
  62 -                       clocks = <&axi>;
  63 +                       clocks = <&axi>, <&pll6 1>, <&pll6 2>;
  64                 };
  65
  66                 ahb_gates: ahb_gates@01c20060 {
  67 --
  68 1.8.5.1
  69