target/linux/sunxi/patches-3.13/140-sun47i-rtc-driver.patch

   1 From c6890cadc2129a07d69f3dcbfca66522c27b8069 Mon Sep 17 00:00:00 2001
   2 From: Carlo Caione <carlo.caione@gmail.com>
   3 Date: Sat, 16 Nov 2013 18:33:54 +0100
   4 Subject: [PATCH] ARM: sun4i/sun7i: RTC driver
   5
   6 This patch introduces the driver for the RTC in the Allwinner A10 and
   7 A20 SoCs.
   8
   9 Signed-off-by: Carlo Caione <carlo.caione@gmail.com>
  10 Acked-by: Alessandro Zummo <a.zummo@towertech.it>
  11 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  12 ---
  13  drivers/rtc/Kconfig     |   7 +
  14  drivers/rtc/Makefile    |   1 +
  15  drivers/rtc/rtc-sunxi.c | 523 ++++++++++++++++++++++++++++++++++++++++++++++++
  16  3 files changed, 531 insertions(+)
  17  create mode 100644 drivers/rtc/rtc-sunxi.c
  18
  19 --- a/drivers/rtc/Kconfig
  20 +++ b/drivers/rtc/Kconfig
  21 @@ -1122,6 +1122,13 @@ config RTC_DRV_SUN4V
  22           If you say Y here you will get support for the Hypervisor
  23           based RTC on SUN4V systems.
  24
  25 +config RTC_DRV_SUNXI
  26 +       tristate "Allwinner sun4i/sun7i RTC"
  27 +       depends on ARCH_SUNXI
  28 +       help
  29 +         If you say Y here you will get support for the RTC found on
  30 +         Allwinner A10/A20.
  31 +
  32  config RTC_DRV_STARFIRE
  33         bool "Starfire RTC"
  34         depends on SPARC64
  35 --- a/drivers/rtc/Makefile
  36 +++ b/drivers/rtc/Makefile
  37 @@ -119,6 +119,7 @@ obj-$(CONFIG_RTC_DRV_STARFIRE)      += rtc-st
  38  obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o
  39  obj-$(CONFIG_RTC_DRV_STMP)     += rtc-stmp3xxx.o
  40  obj-$(CONFIG_RTC_DRV_SUN4V)    += rtc-sun4v.o
  41 +obj-$(CONFIG_RTC_DRV_SUNXI)    += rtc-sunxi.o
  42  obj-$(CONFIG_RTC_DRV_TEGRA)    += rtc-tegra.o
  43  obj-$(CONFIG_RTC_DRV_TEST)     += rtc-test.o
  44  obj-$(CONFIG_RTC_DRV_TILE)     += rtc-tile.o
  45 --- /dev/null
  46 +++ b/drivers/rtc/rtc-sunxi.c
  47 @@ -0,0 +1,523 @@
  48 +/*
  49 + * An RTC driver for Allwinner A10/A20
  50 + *
  51 + * Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
  52 + *
  53 + * This program is free software; you can redistribute it and/or modify
  54 + * it under the terms of the GNU General Public License as published by
  55 + * the Free Software Foundation; either version 2 of the License, or
  56 + * (at your option) any later version.
  57 + *
  58 + * This program is distributed in the hope that it will be useful, but WITHOUT
  59 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  60 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  61 + * more details.
  62 + *
  63 + * You should have received a copy of the GNU General Public License along
  64 + * with this program; if not, write to the Free Software Foundation, Inc.,
  65 + * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  66 + */
  67 +
  68 +#include <linux/delay.h>
  69 +#include <linux/err.h>
  70 +#include <linux/fs.h>
  71 +#include <linux/init.h>
  72 +#include <linux/interrupt.h>
  73 +#include <linux/io.h>
  74 +#include <linux/kernel.h>
  75 +#include <linux/module.h>
  76 +#include <linux/of.h>
  77 +#include <linux/of_address.h>
  78 +#include <linux/of_device.h>
  79 +#include <linux/platform_device.h>
  80 +#include <linux/rtc.h>
  81 +#include <linux/types.h>
  82 +
  83 +#define SUNXI_LOSC_CTRL                                0x0000
  84 +#define SUNXI_LOSC_CTRL_RTC_HMS_ACC            BIT(8)
  85 +#define SUNXI_LOSC_CTRL_RTC_YMD_ACC            BIT(7)
  86 +
  87 +#define SUNXI_RTC_YMD                          0x0004
  88 +
  89 +#define SUNXI_RTC_HMS                          0x0008
  90 +
  91 +#define SUNXI_ALRM_DHMS                                0x000c
  92 +
  93 +#define SUNXI_ALRM_EN                          0x0014
  94 +#define SUNXI_ALRM_EN_CNT_EN                   BIT(8)
  95 +
  96 +#define SUNXI_ALRM_IRQ_EN                      0x0018
  97 +#define SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN           BIT(0)
  98 +
  99 +#define SUNXI_ALRM_IRQ_STA                     0x001c
 100 +#define SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND                BIT(0)
 101 +
 102 +#define SUNXI_MASK_DH                          0x0000001f
 103 +#define SUNXI_MASK_SM                          0x0000003f
 104 +#define SUNXI_MASK_M                           0x0000000f
 105 +#define SUNXI_MASK_LY                          0x00000001
 106 +#define SUNXI_MASK_D                           0x00000ffe
 107 +#define SUNXI_MASK_M                           0x0000000f
 108 +
 109 +#define SUNXI_GET(x, mask, shift)              (((x) & ((mask) << (shift))) \
 110 +                                                       >> (shift))
 111 +
 112 +#define SUNXI_SET(x, mask, shift)              (((x) & (mask)) << (shift))
 113 +
 114 +/*
 115 + * Get date values
 116 + */
 117 +#define SUNXI_DATE_GET_DAY_VALUE(x)            SUNXI_GET(x, SUNXI_MASK_DH, 0)
 118 +#define SUNXI_DATE_GET_MON_VALUE(x)            SUNXI_GET(x, SUNXI_MASK_M, 8)
 119 +#define SUNXI_DATE_GET_YEAR_VALUE(x, mask)     SUNXI_GET(x, mask, 16)
 120 +
 121 +/*
 122 + * Get time values
 123 + */
 124 +#define SUNXI_TIME_GET_SEC_VALUE(x)            SUNXI_GET(x, SUNXI_MASK_SM, 0)
 125 +#define SUNXI_TIME_GET_MIN_VALUE(x)            SUNXI_GET(x, SUNXI_MASK_SM, 8)
 126 +#define SUNXI_TIME_GET_HOUR_VALUE(x)           SUNXI_GET(x, SUNXI_MASK_DH, 16)
 127 +
 128 +/*
 129 + * Get alarm values
 130 + */
 131 +#define SUNXI_ALRM_GET_SEC_VALUE(x)            SUNXI_GET(x, SUNXI_MASK_SM, 0)
 132 +#define SUNXI_ALRM_GET_MIN_VALUE(x)            SUNXI_GET(x, SUNXI_MASK_SM, 8)
 133 +#define SUNXI_ALRM_GET_HOUR_VALUE(x)           SUNXI_GET(x, SUNXI_MASK_DH, 16)
 134 +
 135 +/*
 136 + * Set date values
 137 + */
 138 +#define SUNXI_DATE_SET_DAY_VALUE(x)            SUNXI_DATE_GET_DAY_VALUE(x)
 139 +#define SUNXI_DATE_SET_MON_VALUE(x)            SUNXI_SET(x, SUNXI_MASK_M, 8)
 140 +#define SUNXI_DATE_SET_YEAR_VALUE(x, mask)     SUNXI_SET(x, mask, 16)
 141 +#define SUNXI_LEAP_SET_VALUE(x, shift)         SUNXI_SET(x, SUNXI_MASK_LY, shift)
 142 +
 143 +/*
 144 + * Set time values
 145 + */
 146 +#define SUNXI_TIME_SET_SEC_VALUE(x)            SUNXI_TIME_GET_SEC_VALUE(x)
 147 +#define SUNXI_TIME_SET_MIN_VALUE(x)            SUNXI_SET(x, SUNXI_MASK_SM, 8)
 148 +#define SUNXI_TIME_SET_HOUR_VALUE(x)           SUNXI_SET(x, SUNXI_MASK_DH, 16)
 149 +
 150 +/*
 151 + * Set alarm values
 152 + */
 153 +#define SUNXI_ALRM_SET_SEC_VALUE(x)            SUNXI_ALRM_GET_SEC_VALUE(x)
 154 +#define SUNXI_ALRM_SET_MIN_VALUE(x)            SUNXI_SET(x, SUNXI_MASK_SM, 8)
 155 +#define SUNXI_ALRM_SET_HOUR_VALUE(x)           SUNXI_SET(x, SUNXI_MASK_DH, 16)
 156 +#define SUNXI_ALRM_SET_DAY_VALUE(x)            SUNXI_SET(x, SUNXI_MASK_D, 21)
 157 +
 158 +/*
 159 + * Time unit conversions
 160 + */
 161 +#define SEC_IN_MIN                             60
 162 +#define SEC_IN_HOUR                            (60 * SEC_IN_MIN)
 163 +#define SEC_IN_DAY                             (24 * SEC_IN_HOUR)
 164 +
 165 +/*
 166 + * The year parameter passed to the driver is usually an offset relative to
 167 + * the year 1900. This macro is used to convert this offset to another one
 168 + * relative to the minimum year allowed by the hardware.
 169 + */
 170 +#define SUNXI_YEAR_OFF(x)                      ((x)->min - 1900)
 171 +
 172 +/*
 173 + * min and max year are arbitrary set considering the limited range of the
 174 + * hardware register field
 175 + */
 176 +struct sunxi_rtc_data_year {
 177 +       unsigned int min;               /* min year allowed */
 178 +       unsigned int max;               /* max year allowed */
 179 +       unsigned int mask;              /* mask for the year field */
 180 +       unsigned char leap_shift;       /* bit shift to get the leap year */
 181 +};
 182 +
 183 +static struct sunxi_rtc_data_year data_year_param[] = {
 184 +       [0] = {
 185 +               .min            = 2010,
 186 +               .max            = 2073,
 187 +               .mask           = 0x3f,
 188 +               .leap_shift     = 22,
 189 +       },
 190 +       [1] = {
 191 +               .min            = 1970,
 192 +               .max            = 2225,
 193 +               .mask           = 0xff,
 194 +               .leap_shift     = 24,
 195 +       },
 196 +};
 197 +
 198 +struct sunxi_rtc_dev {
 199 +       struct rtc_device *rtc;
 200 +       struct device *dev;
 201 +       struct sunxi_rtc_data_year *data_year;
 202 +       void __iomem *base;
 203 +       int irq;
 204 +};
 205 +
 206 +static irqreturn_t sunxi_rtc_alarmirq(int irq, void *id)
 207 +{
 208 +       struct sunxi_rtc_dev *chip = (struct sunxi_rtc_dev *) id;
 209 +       u32 val;
 210 +
 211 +       val = readl(chip->base + SUNXI_ALRM_IRQ_STA);
 212 +
 213 +       if (val & SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND) {
 214 +               val |= SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND;
 215 +               writel(val, chip->base + SUNXI_ALRM_IRQ_STA);
 216 +
 217 +               rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
 218 +
 219 +               return IRQ_HANDLED;
 220 +       }
 221 +
 222 +       return IRQ_NONE;
 223 +}
 224 +
 225 +static void sunxi_rtc_setaie(int to, struct sunxi_rtc_dev *chip)
 226 +{
 227 +       u32 alrm_val = 0;
 228 +       u32 alrm_irq_val = 0;
 229 +
 230 +       if (to) {
 231 +               alrm_val = readl(chip->base + SUNXI_ALRM_EN);
 232 +               alrm_val |= SUNXI_ALRM_EN_CNT_EN;
 233 +
 234 +               alrm_irq_val = readl(chip->base + SUNXI_ALRM_IRQ_EN);
 235 +               alrm_irq_val |= SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN;
 236 +       } else {
 237 +               writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND,
 238 +                               chip->base + SUNXI_ALRM_IRQ_STA);
 239 +       }
 240 +
 241 +       writel(alrm_val, chip->base + SUNXI_ALRM_EN);
 242 +       writel(alrm_irq_val, chip->base + SUNXI_ALRM_IRQ_EN);
 243 +}
 244 +
 245 +static int sunxi_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
 246 +{
 247 +       struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
 248 +       struct rtc_time *alrm_tm = &wkalrm->time;
 249 +       u32 alrm;
 250 +       u32 alrm_en;
 251 +       u32 date;
 252 +
 253 +       alrm = readl(chip->base + SUNXI_ALRM_DHMS);
 254 +       date = readl(chip->base + SUNXI_RTC_YMD);
 255 +
 256 +       alrm_tm->tm_sec = SUNXI_ALRM_GET_SEC_VALUE(alrm);
 257 +       alrm_tm->tm_min = SUNXI_ALRM_GET_MIN_VALUE(alrm);
 258 +       alrm_tm->tm_hour = SUNXI_ALRM_GET_HOUR_VALUE(alrm);
 259 +
 260 +       alrm_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
 261 +       alrm_tm->tm_mon = SUNXI_DATE_GET_MON_VALUE(date);
 262 +       alrm_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
 263 +                       chip->data_year->mask);
 264 +
 265 +       alrm_tm->tm_mon -= 1;
 266 +
 267 +       /*
 268 +        * switch from (data_year->min)-relative offset to
 269 +        * a (1900)-relative one
 270 +        */
 271 +       alrm_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
 272 +
 273 +       alrm_en = readl(chip->base + SUNXI_ALRM_IRQ_EN);
 274 +       if (alrm_en & SUNXI_ALRM_EN_CNT_EN)
 275 +               wkalrm->enabled = 1;
 276 +
 277 +       return 0;
 278 +}
 279 +
 280 +static int sunxi_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
 281 +{
 282 +       struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
 283 +       u32 date, time;
 284 +
 285 +       /*
 286 +        * read again in case it changes
 287 +        */
 288 +       do {
 289 +               date = readl(chip->base + SUNXI_RTC_YMD);
 290 +               time = readl(chip->base + SUNXI_RTC_HMS);
 291 +       } while ((date != readl(chip->base + SUNXI_RTC_YMD)) ||
 292 +                (time != readl(chip->base + SUNXI_RTC_HMS)));
 293 +
 294 +       rtc_tm->tm_sec  = SUNXI_TIME_GET_SEC_VALUE(time);
 295 +       rtc_tm->tm_min  = SUNXI_TIME_GET_MIN_VALUE(time);
 296 +       rtc_tm->tm_hour = SUNXI_TIME_GET_HOUR_VALUE(time);
 297 +
 298 +       rtc_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
 299 +       rtc_tm->tm_mon  = SUNXI_DATE_GET_MON_VALUE(date);
 300 +       rtc_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
 301 +                                       chip->data_year->mask);
 302 +
 303 +       rtc_tm->tm_mon  -= 1;
 304 +
 305 +       /*
 306 +        * switch from (data_year->min)-relative offset to
 307 +        * a (1900)-relative one
 308 +        */
 309 +       rtc_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
 310 +
 311 +       return rtc_valid_tm(rtc_tm);
 312 +}
 313 +
 314 +static int sunxi_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
 315 +{
 316 +       struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
 317 +       struct rtc_time *alrm_tm = &wkalrm->time;
 318 +       struct rtc_time tm_now;
 319 +       u32 alrm = 0;
 320 +       unsigned long time_now = 0;
 321 +       unsigned long time_set = 0;
 322 +       unsigned long time_gap = 0;
 323 +       unsigned long time_gap_day = 0;
 324 +       unsigned long time_gap_hour = 0;
 325 +       unsigned long time_gap_min = 0;
 326 +       int ret = 0;
 327 +
 328 +       ret = sunxi_rtc_gettime(dev, &tm_now);
 329 +       if (ret < 0) {
 330 +               dev_err(dev, "Error in getting time\n");
 331 +               return -EINVAL;
 332 +       }
 333 +
 334 +       rtc_tm_to_time(alrm_tm, &time_set);
 335 +       rtc_tm_to_time(&tm_now, &time_now);
 336 +       if (time_set <= time_now) {
 337 +               dev_err(dev, "Date to set in the past\n");
 338 +               return -EINVAL;
 339 +       }
 340 +
 341 +       time_gap = time_set - time_now;
 342 +       time_gap_day = time_gap / SEC_IN_DAY;
 343 +       time_gap -= time_gap_day * SEC_IN_DAY;
 344 +       time_gap_hour = time_gap / SEC_IN_HOUR;
 345 +       time_gap -= time_gap_hour * SEC_IN_HOUR;
 346 +       time_gap_min = time_gap / SEC_IN_MIN;
 347 +       time_gap -= time_gap_min * SEC_IN_MIN;
 348 +
 349 +       if (time_gap_day > 255) {
 350 +               dev_err(dev, "Day must be in the range 0 - 255\n");
 351 +               return -EINVAL;
 352 +       }
 353 +
 354 +       sunxi_rtc_setaie(0, chip);
 355 +       writel(0, chip->base + SUNXI_ALRM_DHMS);
 356 +       usleep_range(100, 300);
 357 +
 358 +       alrm = SUNXI_ALRM_SET_SEC_VALUE(time_gap) |
 359 +               SUNXI_ALRM_SET_MIN_VALUE(time_gap_min) |
 360 +               SUNXI_ALRM_SET_HOUR_VALUE(time_gap_hour) |
 361 +               SUNXI_ALRM_SET_DAY_VALUE(time_gap_day);
 362 +       writel(alrm, chip->base + SUNXI_ALRM_DHMS);
 363 +
 364 +       writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
 365 +       writel(SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN, chip->base + SUNXI_ALRM_IRQ_EN);
 366 +
 367 +       sunxi_rtc_setaie(wkalrm->enabled, chip);
 368 +
 369 +       return 0;
 370 +}
 371 +
 372 +static int sunxi_rtc_wait(struct sunxi_rtc_dev *chip, int offset,
 373 +                         unsigned int mask, unsigned int ms_timeout)
 374 +{
 375 +       const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
 376 +       u32 reg;
 377 +
 378 +       do {
 379 +               reg = readl(chip->base + offset);
 380 +               reg &= mask;
 381 +
 382 +               if (reg == mask)
 383 +                       return 0;
 384 +
 385 +       } while (time_before(jiffies, timeout));
 386 +
 387 +       return -ETIMEDOUT;
 388 +}
 389 +
 390 +static int sunxi_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
 391 +{
 392 +       struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
 393 +       u32 date = 0;
 394 +       u32 time = 0;
 395 +       int year;
 396 +
 397 +       /*
 398 +        * the input rtc_tm->tm_year is the offset relative to 1900. We use
 399 +        * the SUNXI_YEAR_OFF macro to rebase it with respect to the min year
 400 +        * allowed by the hardware
 401 +        */
 402 +
 403 +       year = rtc_tm->tm_year + 1900;
 404 +       if (year < chip->data_year->min || year > chip->data_year->max) {
 405 +               dev_err(dev, "rtc only supports year in range %d - %d\n",
 406 +                               chip->data_year->min, chip->data_year->max);
 407 +               return -EINVAL;
 408 +       }
 409 +
 410 +       rtc_tm->tm_year -= SUNXI_YEAR_OFF(chip->data_year);
 411 +       rtc_tm->tm_mon += 1;
 412 +
 413 +       date = SUNXI_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
 414 +               SUNXI_DATE_SET_MON_VALUE(rtc_tm->tm_mon)  |
 415 +               SUNXI_DATE_SET_YEAR_VALUE(rtc_tm->tm_year,
 416 +                               chip->data_year->mask);
 417 +
 418 +       if (is_leap_year(year))
 419 +               date |= SUNXI_LEAP_SET_VALUE(1, chip->data_year->leap_shift);
 420 +
 421 +       time = SUNXI_TIME_SET_SEC_VALUE(rtc_tm->tm_sec)  |
 422 +               SUNXI_TIME_SET_MIN_VALUE(rtc_tm->tm_min)  |
 423 +               SUNXI_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
 424 +
 425 +       writel(0, chip->base + SUNXI_RTC_HMS);
 426 +       writel(0, chip->base + SUNXI_RTC_YMD);
 427 +
 428 +       writel(time, chip->base + SUNXI_RTC_HMS);
 429 +
 430 +       /*
 431 +        * After writing the RTC HH-MM-SS register, the
 432 +        * SUNXI_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
 433 +        * be cleared until the real writing operation is finished
 434 +        */
 435 +
 436 +       if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
 437 +                               SUNXI_LOSC_CTRL_RTC_HMS_ACC, 50)) {
 438 +               dev_err(dev, "Failed to set rtc time.\n");
 439 +               return -1;
 440 +       }
 441 +
 442 +       writel(date, chip->base + SUNXI_RTC_YMD);
 443 +
 444 +       /*
 445 +        * After writing the RTC YY-MM-DD register, the
 446 +        * SUNXI_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
 447 +        * be cleared until the real writing operation is finished
 448 +        */
 449 +
 450 +       if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
 451 +                               SUNXI_LOSC_CTRL_RTC_YMD_ACC, 50)) {
 452 +               dev_err(dev, "Failed to set rtc time.\n");
 453 +               return -1;
 454 +       }
 455 +
 456 +       return 0;
 457 +}
 458 +
 459 +static int sunxi_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 460 +{
 461 +       struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
 462 +
 463 +       if (!enabled)
 464 +               sunxi_rtc_setaie(enabled, chip);
 465 +
 466 +       return 0;
 467 +}
 468 +
 469 +static const struct rtc_class_ops sunxi_rtc_ops = {
 470 +       .read_time              = sunxi_rtc_gettime,
 471 +       .set_time               = sunxi_rtc_settime,
 472 +       .read_alarm             = sunxi_rtc_getalarm,
 473 +       .set_alarm              = sunxi_rtc_setalarm,
 474 +       .alarm_irq_enable       = sunxi_rtc_alarm_irq_enable
 475 +};
 476 +
 477 +static const struct of_device_id sunxi_rtc_dt_ids[] = {
 478 +       { .compatible = "allwinner,sun4i-rtc", .data = &data_year_param[0] },
 479 +       { .compatible = "allwinner,sun7i-a20-rtc", .data = &data_year_param[1] },
 480 +       { /* sentinel */ },
 481 +};
 482 +MODULE_DEVICE_TABLE(of, sunxi_rtc_dt_ids);
 483 +
 484 +static int sunxi_rtc_probe(struct platform_device *pdev)
 485 +{
 486 +       struct sunxi_rtc_dev *chip;
 487 +       struct resource *res;
 488 +       const struct of_device_id *of_id;
 489 +       int ret;
 490 +
 491 +       chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
 492 +       if (!chip)
 493 +               return -ENOMEM;
 494 +
 495 +       platform_set_drvdata(pdev, chip);
 496 +       chip->dev = &pdev->dev;
 497 +
 498 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 499 +       chip->base = devm_ioremap_resource(&pdev->dev, res);
 500 +       if (IS_ERR(chip->base))
 501 +               return PTR_ERR(chip->base);
 502 +
 503 +       chip->irq = platform_get_irq(pdev, 0);
 504 +       if (chip->irq < 0) {
 505 +               dev_err(&pdev->dev, "No IRQ resource\n");
 506 +               return chip->irq;
 507 +       }
 508 +       ret = devm_request_irq(&pdev->dev, chip->irq, sunxi_rtc_alarmirq,
 509 +                       0, dev_name(&pdev->dev), chip);
 510 +       if (ret) {
 511 +               dev_err(&pdev->dev, "Could not request IRQ\n");
 512 +               return ret;
 513 +       }
 514 +
 515 +       of_id = of_match_device(sunxi_rtc_dt_ids, &pdev->dev);
 516 +       if (!of_id) {
 517 +               dev_err(&pdev->dev, "Unable to setup RTC data\n");
 518 +               return -ENODEV;
 519 +       }
 520 +       chip->data_year = (struct sunxi_rtc_data_year *) of_id->data;
 521 +
 522 +       /* clear the alarm count value */
 523 +       writel(0, chip->base + SUNXI_ALRM_DHMS);
 524 +
 525 +       /* disable alarm, not generate irq pending */
 526 +       writel(0, chip->base + SUNXI_ALRM_EN);
 527 +
 528 +       /* disable alarm week/cnt irq, unset to cpu */
 529 +       writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
 530 +
 531 +       /* clear alarm week/cnt irq pending */
 532 +       writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND, chip->base +
 533 +                       SUNXI_ALRM_IRQ_STA);
 534 +
 535 +       chip->rtc = rtc_device_register("rtc-sunxi", &pdev->dev,
 536 +                       &sunxi_rtc_ops, THIS_MODULE);
 537 +       if (IS_ERR(chip->rtc)) {
 538 +               dev_err(&pdev->dev, "unable to register device\n");
 539 +               return PTR_ERR(chip->rtc);
 540 +       }
 541 +
 542 +       dev_info(&pdev->dev, "RTC enabled\n");
 543 +
 544 +       return 0;
 545 +}
 546 +
 547 +static int sunxi_rtc_remove(struct platform_device *pdev)
 548 +{
 549 +       struct sunxi_rtc_dev *chip = platform_get_drvdata(pdev);
 550 +
 551 +       rtc_device_unregister(chip->rtc);
 552 +
 553 +       return 0;
 554 +}
 555 +
 556 +static struct platform_driver sunxi_rtc_driver = {
 557 +       .probe          = sunxi_rtc_probe,
 558 +       .remove         = sunxi_rtc_remove,
 559 +       .driver         = {
 560 +               .name           = "sunxi-rtc",
 561 +               .owner          = THIS_MODULE,
 562 +               .of_match_table = sunxi_rtc_dt_ids,
 563 +       },
 564 +};
 565 +
 566 +module_platform_driver(sunxi_rtc_driver);
 567 +
 568 +MODULE_DESCRIPTION("sunxi RTC driver");
 569 +MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
 570 +MODULE_LICENSE("GPL");